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drivers/usb/host/uhci-q.c
45.3 KB
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/* * Universal Host Controller Interface driver for USB. * * Maintainer: Alan Stern <stern@rowland.harvard.edu> * * (C) Copyright 1999 Linus Torvalds * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com * (C) Copyright 1999 Randy Dunlap * (C) Copyright 1999 Georg Acher, acher@in.tum.de * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface * support from usb-ohci.c by Adam Richter, adam@yggdrasil.com). * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c) |
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* (C) Copyright 2004-2007 Alan Stern, stern@rowland.harvard.edu |
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*/ |
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/* * Technically, updating td->status here is a race, but it's not really a * problem. The worst that can happen is that we set the IOC bit again * generating a spurious interrupt. We could fix this by creating another * QH and leaving the IOC bit always set, but then we would have to play * games with the FSBR code to make sure we get the correct order in all * the cases. I don't think it's worth the effort */ |
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static void uhci_set_next_interrupt(struct uhci_hcd *uhci) |
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{ |
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if (uhci->is_stopped) |
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mod_timer(&uhci_to_hcd(uhci)->rh_timer, jiffies); |
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uhci->term_td->status |= cpu_to_le32(TD_CTRL_IOC); } static inline void uhci_clear_next_interrupt(struct uhci_hcd *uhci) { uhci->term_td->status &= ~cpu_to_le32(TD_CTRL_IOC); } |
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/* * Full-Speed Bandwidth Reclamation (FSBR). * We turn on FSBR whenever a queue that wants it is advancing, * and leave it on for a short time thereafter. */ static void uhci_fsbr_on(struct uhci_hcd *uhci) { |
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struct uhci_qh *lqh; |
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/* The terminating skeleton QH always points back to the first * FSBR QH. Make the last async QH point to the terminating * skeleton QH. */ |
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uhci->fsbr_is_on = 1; |
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lqh = list_entry(uhci->skel_async_qh->node.prev, struct uhci_qh, node); |
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lqh->link = LINK_TO_QH(uhci->skel_term_qh); |
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} static void uhci_fsbr_off(struct uhci_hcd *uhci) { |
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struct uhci_qh *lqh; |
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/* Remove the link from the last async QH to the terminating * skeleton QH. */ |
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uhci->fsbr_is_on = 0; |
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lqh = list_entry(uhci->skel_async_qh->node.prev, struct uhci_qh, node); |
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lqh->link = UHCI_PTR_TERM; |
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} static void uhci_add_fsbr(struct uhci_hcd *uhci, struct urb *urb) { struct urb_priv *urbp = urb->hcpriv; if (!(urb->transfer_flags & URB_NO_FSBR)) urbp->fsbr = 1; } |
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static void uhci_urbp_wants_fsbr(struct uhci_hcd *uhci, struct urb_priv *urbp) |
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{ |
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if (urbp->fsbr) { |
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uhci->fsbr_is_wanted = 1; |
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if (!uhci->fsbr_is_on) uhci_fsbr_on(uhci); |
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else if (uhci->fsbr_expiring) { uhci->fsbr_expiring = 0; del_timer(&uhci->fsbr_timer); } } } static void uhci_fsbr_timeout(unsigned long _uhci) { struct uhci_hcd *uhci = (struct uhci_hcd *) _uhci; unsigned long flags; spin_lock_irqsave(&uhci->lock, flags); if (uhci->fsbr_expiring) { uhci->fsbr_expiring = 0; uhci_fsbr_off(uhci); |
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} |
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spin_unlock_irqrestore(&uhci->lock, flags); |
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} |
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static struct uhci_td *uhci_alloc_td(struct uhci_hcd *uhci) |
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{ dma_addr_t dma_handle; struct uhci_td *td; td = dma_pool_alloc(uhci->td_pool, GFP_ATOMIC, &dma_handle); if (!td) return NULL; td->dma_handle = dma_handle; |
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td->frame = -1; |
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INIT_LIST_HEAD(&td->list); |
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INIT_LIST_HEAD(&td->fl_list); |
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return td; } |
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static void uhci_free_td(struct uhci_hcd *uhci, struct uhci_td *td) { |
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if (!list_empty(&td->list)) dev_WARN(uhci_dev(uhci), "td %p still in list! ", td); if (!list_empty(&td->fl_list)) dev_WARN(uhci_dev(uhci), "td %p still in fl_list! ", td); |
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dma_pool_free(uhci->td_pool, td, td->dma_handle); } |
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static inline void uhci_fill_td(struct uhci_td *td, u32 status, u32 token, u32 buffer) { td->status = cpu_to_le32(status); td->token = cpu_to_le32(token); td->buffer = cpu_to_le32(buffer); } |
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static void uhci_add_td_to_urbp(struct uhci_td *td, struct urb_priv *urbp) { list_add_tail(&td->list, &urbp->td_list); } static void uhci_remove_td_from_urbp(struct uhci_td *td) { list_del_init(&td->list); } |
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/* |
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* We insert Isochronous URBs directly into the frame list at the beginning |
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*/ |
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static inline void uhci_insert_td_in_frame_list(struct uhci_hcd *uhci, struct uhci_td *td, unsigned framenum) |
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{ framenum &= (UHCI_NUMFRAMES - 1); td->frame = framenum; /* Is there a TD already mapped there? */ |
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if (uhci->frame_cpu[framenum]) { |
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struct uhci_td *ftd, *ltd; |
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ftd = uhci->frame_cpu[framenum]; |
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ltd = list_entry(ftd->fl_list.prev, struct uhci_td, fl_list); list_add_tail(&td->fl_list, &ftd->fl_list); td->link = ltd->link; wmb(); |
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ltd->link = LINK_TO_TD(td); |
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} else { |
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td->link = uhci->frame[framenum]; |
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wmb(); |
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uhci->frame[framenum] = LINK_TO_TD(td); |
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uhci->frame_cpu[framenum] = td; |
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} } |
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static inline void uhci_remove_td_from_frame_list(struct uhci_hcd *uhci, |
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struct uhci_td *td) |
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{ /* If it's not inserted, don't remove it */ |
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if (td->frame == -1) { WARN_ON(!list_empty(&td->fl_list)); |
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return; |
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} |
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if (uhci->frame_cpu[td->frame] == td) { |
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if (list_empty(&td->fl_list)) { |
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uhci->frame[td->frame] = td->link; uhci->frame_cpu[td->frame] = NULL; |
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} else { struct uhci_td *ntd; ntd = list_entry(td->fl_list.next, struct uhci_td, fl_list); |
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uhci->frame[td->frame] = LINK_TO_TD(ntd); |
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uhci->frame_cpu[td->frame] = ntd; |
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} } else { struct uhci_td *ptd; ptd = list_entry(td->fl_list.prev, struct uhci_td, fl_list); ptd->link = td->link; } |
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list_del_init(&td->fl_list); td->frame = -1; } |
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static inline void uhci_remove_tds_from_frame(struct uhci_hcd *uhci, unsigned int framenum) { struct uhci_td *ftd, *ltd; framenum &= (UHCI_NUMFRAMES - 1); ftd = uhci->frame_cpu[framenum]; if (ftd) { ltd = list_entry(ftd->fl_list.prev, struct uhci_td, fl_list); uhci->frame[framenum] = ltd->link; uhci->frame_cpu[framenum] = NULL; while (!list_empty(&ftd->fl_list)) list_del_init(ftd->fl_list.prev); } } |
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/* * Remove all the TDs for an Isochronous URB from the frame list */ static void uhci_unlink_isochronous_tds(struct uhci_hcd *uhci, struct urb *urb) |
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{ struct urb_priv *urbp = (struct urb_priv *) urb->hcpriv; struct uhci_td *td; list_for_each_entry(td, &urbp->td_list, list) |
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uhci_remove_td_from_frame_list(uhci, td); |
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} |
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static struct uhci_qh *uhci_alloc_qh(struct uhci_hcd *uhci, struct usb_device *udev, struct usb_host_endpoint *hep) |
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{ dma_addr_t dma_handle; struct uhci_qh *qh; qh = dma_pool_alloc(uhci->qh_pool, GFP_ATOMIC, &dma_handle); if (!qh) return NULL; |
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memset(qh, 0, sizeof(*qh)); |
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qh->dma_handle = dma_handle; qh->element = UHCI_PTR_TERM; qh->link = UHCI_PTR_TERM; |
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INIT_LIST_HEAD(&qh->queue); INIT_LIST_HEAD(&qh->node); |
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if (udev) { /* Normal QH */ |
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qh->type = usb_endpoint_type(&hep->desc); |
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if (qh->type != USB_ENDPOINT_XFER_ISOC) { qh->dummy_td = uhci_alloc_td(uhci); if (!qh->dummy_td) { dma_pool_free(uhci->qh_pool, qh, dma_handle); return NULL; } |
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} |
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qh->state = QH_STATE_IDLE; qh->hep = hep; qh->udev = udev; hep->hcpriv = qh; |
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if (qh->type == USB_ENDPOINT_XFER_INT || qh->type == USB_ENDPOINT_XFER_ISOC) qh->load = usb_calc_bus_time(udev->speed, usb_endpoint_dir_in(&hep->desc), qh->type == USB_ENDPOINT_XFER_ISOC, le16_to_cpu(hep->desc.wMaxPacketSize)) / 1000 + 1; |
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} else { /* Skeleton QH */ qh->state = QH_STATE_ACTIVE; |
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qh->type = -1; |
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} |
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return qh; } static void uhci_free_qh(struct uhci_hcd *uhci, struct uhci_qh *qh) { |
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WARN_ON(qh->state != QH_STATE_IDLE && qh->udev); |
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if (!list_empty(&qh->queue)) dev_WARN(uhci_dev(uhci), "qh %p list not empty! ", qh); |
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list_del(&qh->node); if (qh->udev) { qh->hep->hcpriv = NULL; |
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if (qh->dummy_td) uhci_free_td(uhci, qh->dummy_td); |
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} |
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dma_pool_free(uhci->qh_pool, qh, qh->dma_handle); } /* |
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* When a queue is stopped and a dequeued URB is given back, adjust * the previous TD link (if the URB isn't first on the queue) or * save its toggle value (if it is first and is currently executing). |
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* * Returns 0 if the URB should not yet be given back, 1 otherwise. |
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*/ |
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static int uhci_cleanup_queue(struct uhci_hcd *uhci, struct uhci_qh *qh, |
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struct urb *urb) |
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{ |
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struct urb_priv *urbp = urb->hcpriv; |
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struct uhci_td *td; |
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int ret = 1; |
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/* Isochronous pipes don't use toggles and their TD link pointers |
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* get adjusted during uhci_urb_dequeue(). But since their queues * cannot truly be stopped, we have to watch out for dequeues * occurring after the nominal unlink frame. */ if (qh->type == USB_ENDPOINT_XFER_ISOC) { ret = (uhci->frame_number + uhci->is_stopped != qh->unlink_frame); |
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goto done; |
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} |
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/* If the URB isn't first on its queue, adjust the link pointer * of the last TD in the previous URB. The toggle doesn't need * to be saved since this URB can't be executing yet. */ if (qh->queue.next != &urbp->node) { struct urb_priv *purbp; struct uhci_td *ptd; purbp = list_entry(urbp->node.prev, struct urb_priv, node); WARN_ON(list_empty(&purbp->td_list)); ptd = list_entry(purbp->td_list.prev, struct uhci_td, list); td = list_entry(urbp->td_list.prev, struct uhci_td, list); ptd->link = td->link; |
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goto done; |
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} |
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/* If the QH element pointer is UHCI_PTR_TERM then then currently * executing URB has already been unlinked, so this one isn't it. */ |
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if (qh_element(qh) == UHCI_PTR_TERM) |
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goto done; |
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qh->element = UHCI_PTR_TERM; |
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/* Control pipes don't have to worry about toggles */ |
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if (qh->type == USB_ENDPOINT_XFER_CONTROL) |
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goto done; |
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/* Save the next toggle value */ |
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WARN_ON(list_empty(&urbp->td_list)); td = list_entry(urbp->td_list.next, struct uhci_td, list); qh->needs_fixup = 1; qh->initial_toggle = uhci_toggle(td_token(td)); |
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done: |
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return ret; |
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} /* * Fix up the data toggles for URBs in a queue, when one of them * terminates early (short transfer, error, or dequeued). */ static void uhci_fixup_toggles(struct uhci_qh *qh, int skip_first) { struct urb_priv *urbp = NULL; struct uhci_td *td; unsigned int toggle = qh->initial_toggle; unsigned int pipe; /* Fixups for a short transfer start with the second URB in the * queue (the short URB is the first). */ if (skip_first) urbp = list_entry(qh->queue.next, struct urb_priv, node); /* When starting with the first URB, if the QH element pointer is * still valid then we know the URB's toggles are okay. */ else if (qh_element(qh) != UHCI_PTR_TERM) toggle = 2; /* Fix up the toggle for the URBs in the queue. Normally this * loop won't run more than once: When an error or short transfer * occurs, the queue usually gets emptied. */ |
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urbp = list_prepare_entry(urbp, &qh->queue, node); |
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list_for_each_entry_continue(urbp, &qh->queue, node) { /* If the first TD has the right toggle value, we don't * need to change any toggles in this URB */ td = list_entry(urbp->td_list.next, struct uhci_td, list); if (toggle > 1 || uhci_toggle(td_token(td)) == toggle) { |
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td = list_entry(urbp->td_list.prev, struct uhci_td, |
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list); toggle = uhci_toggle(td_token(td)) ^ 1; /* Otherwise all the toggles in the URB have to be switched */ } else { list_for_each_entry(td, &urbp->td_list, list) { |
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td->token ^= cpu_to_le32( |
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TD_TOKEN_TOGGLE); toggle ^= 1; } } } wmb(); pipe = list_entry(qh->queue.next, struct urb_priv, node)->urb->pipe; usb_settoggle(qh->udev, usb_pipeendpoint(pipe), usb_pipeout(pipe), toggle); qh->needs_fixup = 0; } /* |
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* Link an Isochronous QH into its skeleton's list |
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*/ |
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static inline void link_iso(struct uhci_hcd *uhci, struct uhci_qh *qh) { list_add_tail(&qh->node, &uhci->skel_iso_qh->node); /* Isochronous QHs aren't linked by the hardware */ } /* * Link a high-period interrupt QH into the schedule at the end of its * skeleton's list */ static void link_interrupt(struct uhci_hcd *uhci, struct uhci_qh *qh) |
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{ |
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struct uhci_qh *pqh; |
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list_add_tail(&qh->node, &uhci->skelqh[qh->skel]->node); pqh = list_entry(qh->node.prev, struct uhci_qh, node); qh->link = pqh->link; wmb(); pqh->link = LINK_TO_QH(qh); } /* * Link a period-1 interrupt or async QH into the schedule at the * correct spot in the async skeleton's list, and update the FSBR link */ static void link_async(struct uhci_hcd *uhci, struct uhci_qh *qh) { |
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struct uhci_qh *pqh; |
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__le32 link_to_new_qh; |
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/* Find the predecessor QH for our new one and insert it in the list. * The list of QHs is expected to be short, so linear search won't * take too long. */ list_for_each_entry_reverse(pqh, &uhci->skel_async_qh->node, node) { if (pqh->skel <= qh->skel) break; } list_add(&qh->node, &pqh->node); |
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/* Link it into the schedule */ |
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qh->link = pqh->link; |
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wmb(); |
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link_to_new_qh = LINK_TO_QH(qh); pqh->link = link_to_new_qh; /* If this is now the first FSBR QH, link the terminating skeleton * QH to it. */ if (pqh->skel < SKEL_FSBR && qh->skel >= SKEL_FSBR) uhci->skel_term_qh->link = link_to_new_qh; |
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} /* * Put a QH on the schedule in both hardware and software */ static void uhci_activate_qh(struct uhci_hcd *uhci, struct uhci_qh *qh) { |
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WARN_ON(list_empty(&qh->queue)); |
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/* Set the element pointer if it isn't set already. * This isn't needed for Isochronous queues, but it doesn't hurt. */ if (qh_element(qh) == UHCI_PTR_TERM) { struct urb_priv *urbp = list_entry(qh->queue.next, struct urb_priv, node); struct uhci_td *td = list_entry(urbp->td_list.next, struct uhci_td, list); |
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qh->element = LINK_TO_TD(td); |
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} |
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/* Treat the queue as if it has just advanced */ qh->wait_expired = 0; qh->advance_jiffies = jiffies; |
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if (qh->state == QH_STATE_ACTIVE) return; qh->state = QH_STATE_ACTIVE; |
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/* Move the QH from its old list to the correct spot in the appropriate |
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* skeleton's list */ |
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|
481 482 483 |
if (qh == uhci->next_qh) uhci->next_qh = list_entry(qh->node.next, struct uhci_qh, node); |
17230acdc
|
484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 |
list_del(&qh->node); if (qh->skel == SKEL_ISO) link_iso(uhci, qh); else if (qh->skel < SKEL_ASYNC) link_interrupt(uhci, qh); else link_async(uhci, qh); } /* * Unlink a high-period interrupt QH from the schedule */ static void unlink_interrupt(struct uhci_hcd *uhci, struct uhci_qh *qh) { struct uhci_qh *pqh; |
dccf4a48d
|
500 |
|
dccf4a48d
|
501 |
pqh = list_entry(qh->node.prev, struct uhci_qh, node); |
17230acdc
|
502 503 504 505 506 507 508 509 510 |
pqh->link = qh->link; mb(); } /* * Unlink a period-1 interrupt or async QH from the schedule */ static void unlink_async(struct uhci_hcd *uhci, struct uhci_qh *qh) { |
e009f1b20
|
511 |
struct uhci_qh *pqh; |
17230acdc
|
512 513 514 |
__le32 link_to_next_qh = qh->link; pqh = list_entry(qh->node.prev, struct uhci_qh, node); |
17230acdc
|
515 |
pqh->link = link_to_next_qh; |
e009f1b20
|
516 517 518 519 520 |
/* If this was the old first FSBR QH, link the terminating skeleton * QH to the next (new first FSBR) QH. */ if (pqh->skel < SKEL_FSBR && qh->skel >= SKEL_FSBR) uhci->skel_term_qh->link = link_to_next_qh; |
17230acdc
|
521 |
mb(); |
1da177e4c
|
522 523 524 |
} /* |
dccf4a48d
|
525 |
* Take a QH off the hardware schedule |
1da177e4c
|
526 |
*/ |
dccf4a48d
|
527 |
static void uhci_unlink_qh(struct uhci_hcd *uhci, struct uhci_qh *qh) |
1da177e4c
|
528 |
{ |
dccf4a48d
|
529 |
if (qh->state == QH_STATE_UNLINKING) |
1da177e4c
|
530 |
return; |
dccf4a48d
|
531 532 |
WARN_ON(qh->state != QH_STATE_ACTIVE || !qh->udev); qh->state = QH_STATE_UNLINKING; |
1da177e4c
|
533 |
|
dccf4a48d
|
534 |
/* Unlink the QH from the schedule and record when we did it */ |
17230acdc
|
535 536 537 538 539 540 |
if (qh->skel == SKEL_ISO) ; else if (qh->skel < SKEL_ASYNC) unlink_interrupt(uhci, qh); else unlink_async(uhci, qh); |
1da177e4c
|
541 542 |
uhci_get_current_frame_number(uhci); |
dccf4a48d
|
543 |
qh->unlink_frame = uhci->frame_number; |
1da177e4c
|
544 |
|
dccf4a48d
|
545 546 |
/* Force an interrupt so we know when the QH is fully unlinked */ if (list_empty(&uhci->skel_unlink_qh->node)) |
1da177e4c
|
547 |
uhci_set_next_interrupt(uhci); |
dccf4a48d
|
548 |
/* Move the QH from its old list to the end of the unlinking list */ |
0ed8fee1c
|
549 550 551 |
if (qh == uhci->next_qh) uhci->next_qh = list_entry(qh->node.next, struct uhci_qh, node); |
dccf4a48d
|
552 |
list_move_tail(&qh->node, &uhci->skel_unlink_qh->node); |
1da177e4c
|
553 |
} |
dccf4a48d
|
554 555 556 557 558 559 560 |
/* * When we and the controller are through with a QH, it becomes IDLE. * This happens when a QH has been off the schedule (on the unlinking * list) for more than one frame, or when an error occurs while adding * the first URB onto a new QH. */ static void uhci_make_qh_idle(struct uhci_hcd *uhci, struct uhci_qh *qh) |
1da177e4c
|
561 |
{ |
dccf4a48d
|
562 |
WARN_ON(qh->state == QH_STATE_ACTIVE); |
1da177e4c
|
563 |
|
0ed8fee1c
|
564 565 566 |
if (qh == uhci->next_qh) uhci->next_qh = list_entry(qh->node.next, struct uhci_qh, node); |
dccf4a48d
|
567 568 |
list_move(&qh->node, &uhci->idle_qh_list); qh->state = QH_STATE_IDLE; |
1da177e4c
|
569 |
|
59e29ed91
|
570 571 572 573 574 |
/* Now that the QH is idle, its post_td isn't being used */ if (qh->post_td) { uhci_free_td(uhci, qh->post_td); qh->post_td = NULL; } |
dccf4a48d
|
575 576 577 |
/* If anyone is waiting for a QH to become idle, wake them up */ if (uhci->num_waiting) wake_up_all(&uhci->waitqh); |
1da177e4c
|
578 |
} |
3ca2a3211
|
579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598 599 600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615 616 617 618 619 620 621 622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649 650 651 652 653 654 655 656 657 658 659 660 661 662 663 664 665 666 667 668 669 670 671 672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 |
/* * Find the highest existing bandwidth load for a given phase and period. */ static int uhci_highest_load(struct uhci_hcd *uhci, int phase, int period) { int highest_load = uhci->load[phase]; for (phase += period; phase < MAX_PHASE; phase += period) highest_load = max_t(int, highest_load, uhci->load[phase]); return highest_load; } /* * Set qh->phase to the optimal phase for a periodic transfer and * check whether the bandwidth requirement is acceptable. */ static int uhci_check_bandwidth(struct uhci_hcd *uhci, struct uhci_qh *qh) { int minimax_load; /* Find the optimal phase (unless it is already set) and get * its load value. */ if (qh->phase >= 0) minimax_load = uhci_highest_load(uhci, qh->phase, qh->period); else { int phase, load; int max_phase = min_t(int, MAX_PHASE, qh->period); qh->phase = 0; minimax_load = uhci_highest_load(uhci, qh->phase, qh->period); for (phase = 1; phase < max_phase; ++phase) { load = uhci_highest_load(uhci, phase, qh->period); if (load < minimax_load) { minimax_load = load; qh->phase = phase; } } } /* Maximum allowable periodic bandwidth is 90%, or 900 us per frame */ if (minimax_load + qh->load > 900) { dev_dbg(uhci_dev(uhci), "bandwidth allocation failed: " "period %d, phase %d, %d + %d us ", qh->period, qh->phase, minimax_load, qh->load); return -ENOSPC; } return 0; } /* * Reserve a periodic QH's bandwidth in the schedule */ static void uhci_reserve_bandwidth(struct uhci_hcd *uhci, struct uhci_qh *qh) { int i; int load = qh->load; char *p = "??"; for (i = qh->phase; i < MAX_PHASE; i += qh->period) { uhci->load[i] += load; uhci->total_load += load; } uhci_to_hcd(uhci)->self.bandwidth_allocated = uhci->total_load / MAX_PHASE; switch (qh->type) { case USB_ENDPOINT_XFER_INT: ++uhci_to_hcd(uhci)->self.bandwidth_int_reqs; p = "INT"; break; case USB_ENDPOINT_XFER_ISOC: ++uhci_to_hcd(uhci)->self.bandwidth_isoc_reqs; p = "ISO"; break; } qh->bandwidth_reserved = 1; dev_dbg(uhci_dev(uhci), "%s dev %d ep%02x-%s, period %d, phase %d, %d us ", "reserve", qh->udev->devnum, qh->hep->desc.bEndpointAddress, p, qh->period, qh->phase, load); } /* * Release a periodic QH's bandwidth reservation */ static void uhci_release_bandwidth(struct uhci_hcd *uhci, struct uhci_qh *qh) { int i; int load = qh->load; char *p = "??"; for (i = qh->phase; i < MAX_PHASE; i += qh->period) { uhci->load[i] -= load; uhci->total_load -= load; } uhci_to_hcd(uhci)->self.bandwidth_allocated = uhci->total_load / MAX_PHASE; switch (qh->type) { case USB_ENDPOINT_XFER_INT: --uhci_to_hcd(uhci)->self.bandwidth_int_reqs; p = "INT"; break; case USB_ENDPOINT_XFER_ISOC: --uhci_to_hcd(uhci)->self.bandwidth_isoc_reqs; p = "ISO"; break; } qh->bandwidth_reserved = 0; dev_dbg(uhci_dev(uhci), "%s dev %d ep%02x-%s, period %d, phase %d, %d us ", "release", qh->udev->devnum, qh->hep->desc.bEndpointAddress, p, qh->period, qh->phase, load); } |
dccf4a48d
|
696 697 |
static inline struct urb_priv *uhci_alloc_urb_priv(struct uhci_hcd *uhci, struct urb *urb) |
1da177e4c
|
698 699 |
{ struct urb_priv *urbp; |
c37622296
|
700 |
urbp = kmem_cache_zalloc(uhci_up_cachep, GFP_ATOMIC); |
1da177e4c
|
701 702 |
if (!urbp) return NULL; |
1da177e4c
|
703 |
urbp->urb = urb; |
dccf4a48d
|
704 |
urb->hcpriv = urbp; |
1da177e4c
|
705 |
|
dccf4a48d
|
706 |
INIT_LIST_HEAD(&urbp->node); |
1da177e4c
|
707 |
INIT_LIST_HEAD(&urbp->td_list); |
1da177e4c
|
708 |
|
1da177e4c
|
709 710 |
return urbp; } |
dccf4a48d
|
711 712 |
static void uhci_free_urb_priv(struct uhci_hcd *uhci, struct urb_priv *urbp) |
1da177e4c
|
713 714 |
{ struct uhci_td *td, *tmp; |
1da177e4c
|
715 |
|
5172046d9
|
716 717 718 |
if (!list_empty(&urbp->node)) dev_WARN(uhci_dev(uhci), "urb %p still on QH's list! ", |
dccf4a48d
|
719 |
urbp->urb); |
1da177e4c
|
720 |
|
1da177e4c
|
721 |
list_for_each_entry_safe(td, tmp, &urbp->td_list, list) { |
04538a255
|
722 723 |
uhci_remove_td_from_urbp(td); uhci_free_td(uhci, td); |
1da177e4c
|
724 |
} |
1da177e4c
|
725 726 |
kmem_cache_free(uhci_up_cachep, urbp); } |
1da177e4c
|
727 728 729 730 731 732 733 734 735 736 737 738 739 740 741 742 743 744 745 746 747 748 749 750 751 752 |
/* * Map status to standard result codes * * <status> is (td_status(td) & 0xF60000), a.k.a. * uhci_status_bits(td_status(td)). * Note: <status> does not include the TD_CTRL_NAK bit. * <dir_out> is True for output TDs and False for input TDs. */ static int uhci_map_status(int status, int dir_out) { if (!status) return 0; if (status & TD_CTRL_BITSTUFF) /* Bitstuff error */ return -EPROTO; if (status & TD_CTRL_CRCTIMEO) { /* CRC/Timeout */ if (dir_out) return -EPROTO; else return -EILSEQ; } if (status & TD_CTRL_BABBLE) /* Babble */ return -EOVERFLOW; if (status & TD_CTRL_DBUFERR) /* Buffer error */ return -ENOSR; if (status & TD_CTRL_STALLED) /* Stalled */ return -EPIPE; |
1da177e4c
|
753 754 755 756 757 758 |
return 0; } /* * Control transfers */ |
dccf4a48d
|
759 760 |
static int uhci_submit_control(struct uhci_hcd *uhci, struct urb *urb, struct uhci_qh *qh) |
1da177e4c
|
761 |
{ |
1da177e4c
|
762 |
struct uhci_td *td; |
1da177e4c
|
763 |
unsigned long destination, status; |
dccf4a48d
|
764 |
int maxsze = le16_to_cpu(qh->hep->desc.wMaxPacketSize); |
1da177e4c
|
765 766 |
int len = urb->transfer_buffer_length; dma_addr_t data = urb->transfer_dma; |
dccf4a48d
|
767 |
__le32 *plink; |
04538a255
|
768 |
struct urb_priv *urbp = urb->hcpriv; |
17230acdc
|
769 |
int skel; |
1da177e4c
|
770 771 772 |
/* The "pipe" thing contains the destination in bits 8--18 */ destination = (urb->pipe & PIPE_DEVEP_MASK) | USB_PID_SETUP; |
af0bb5998
|
773 774 |
/* 3 errors, dummy TD remains inactive */ status = uhci_maxerr(3); |
1da177e4c
|
775 776 777 778 779 780 |
if (urb->dev->speed == USB_SPEED_LOW) status |= TD_CTRL_LS; /* * Build the TD for the control request setup packet */ |
af0bb5998
|
781 |
td = qh->dummy_td; |
04538a255
|
782 |
uhci_add_td_to_urbp(td, urbp); |
fa3465689
|
783 |
uhci_fill_td(td, status, destination | uhci_explen(8), |
dccf4a48d
|
784 785 |
urb->setup_dma); plink = &td->link; |
af0bb5998
|
786 |
status |= TD_CTRL_ACTIVE; |
1da177e4c
|
787 788 789 790 791 |
/* * If direction is "send", change the packet ID from SETUP (0x2D) * to OUT (0xE1). Else change it from SETUP to IN (0x69) and * set Short Packet Detect (SPD) for all data packets. |
e7e7c360f
|
792 793 |
* * 0-length transfers always get treated as "send". |
1da177e4c
|
794 |
*/ |
e7e7c360f
|
795 |
if (usb_pipeout(urb->pipe) || len == 0) |
1da177e4c
|
796 797 798 799 800 801 802 |
destination ^= (USB_PID_SETUP ^ USB_PID_OUT); else { destination ^= (USB_PID_SETUP ^ USB_PID_IN); status |= TD_CTRL_SPD; } /* |
687f5f342
|
803 |
* Build the DATA TDs |
1da177e4c
|
804 805 |
*/ while (len > 0) { |
e7e7c360f
|
806 807 808 809 810 811 |
int pktsze = maxsze; if (len <= pktsze) { /* The last data packet */ pktsze = len; status &= ~TD_CTRL_SPD; } |
1da177e4c
|
812 |
|
2532178a6
|
813 |
td = uhci_alloc_td(uhci); |
1da177e4c
|
814 |
if (!td) |
af0bb5998
|
815 |
goto nomem; |
28b9325e6
|
816 |
*plink = LINK_TO_TD(td); |
1da177e4c
|
817 818 819 820 |
/* Alternate Data0/1 (start with Data1) */ destination ^= TD_TOKEN_TOGGLE; |
04538a255
|
821 |
uhci_add_td_to_urbp(td, urbp); |
fa3465689
|
822 |
uhci_fill_td(td, status, destination | uhci_explen(pktsze), |
dccf4a48d
|
823 824 |
data); plink = &td->link; |
1da177e4c
|
825 826 827 828 829 830 831 832 |
data += pktsze; len -= pktsze; } /* * Build the final TD for control status */ |
2532178a6
|
833 |
td = uhci_alloc_td(uhci); |
1da177e4c
|
834 |
if (!td) |
af0bb5998
|
835 |
goto nomem; |
28b9325e6
|
836 |
*plink = LINK_TO_TD(td); |
1da177e4c
|
837 |
|
e7e7c360f
|
838 839 |
/* Change direction for the status transaction */ destination ^= (USB_PID_IN ^ USB_PID_OUT); |
1da177e4c
|
840 |
destination |= TD_TOKEN_TOGGLE; /* End in Data1 */ |
04538a255
|
841 |
uhci_add_td_to_urbp(td, urbp); |
1da177e4c
|
842 |
uhci_fill_td(td, status | TD_CTRL_IOC, |
dccf4a48d
|
843 |
destination | uhci_explen(0), 0); |
af0bb5998
|
844 845 846 847 848 849 850 851 |
plink = &td->link; /* * Build the new dummy TD and activate the old one */ td = uhci_alloc_td(uhci); if (!td) goto nomem; |
28b9325e6
|
852 |
*plink = LINK_TO_TD(td); |
af0bb5998
|
853 854 855 |
uhci_fill_td(td, 0, USB_PID_OUT | uhci_explen(0), 0); wmb(); |
551509d26
|
856 |
qh->dummy_td->status |= cpu_to_le32(TD_CTRL_ACTIVE); |
af0bb5998
|
857 |
qh->dummy_td = td; |
1da177e4c
|
858 859 860 861 |
/* Low-speed transfers get a different queue, and won't hog the bus. * Also, some devices enumerate better without FSBR; the easiest way * to do that is to put URBs on the low-speed queue while the device |
630aa3cfd
|
862 |
* isn't in the CONFIGURED state. */ |
1da177e4c
|
863 |
if (urb->dev->speed == USB_SPEED_LOW || |
630aa3cfd
|
864 |
urb->dev->state != USB_STATE_CONFIGURED) |
17230acdc
|
865 |
skel = SKEL_LS_CONTROL; |
1da177e4c
|
866 |
else { |
17230acdc
|
867 |
skel = SKEL_FS_CONTROL; |
84afddd7a
|
868 |
uhci_add_fsbr(uhci, urb); |
1da177e4c
|
869 |
} |
17230acdc
|
870 871 |
if (qh->state != QH_STATE_ACTIVE) qh->skel = skel; |
dccf4a48d
|
872 |
return 0; |
af0bb5998
|
873 874 875 |
nomem: /* Remove the dummy TD from the td_list so it doesn't get freed */ |
04538a255
|
876 |
uhci_remove_td_from_urbp(qh->dummy_td); |
af0bb5998
|
877 |
return -ENOMEM; |
1da177e4c
|
878 879 880 |
} /* |
1da177e4c
|
881 882 |
* Common submit for bulk and interrupt */ |
dccf4a48d
|
883 884 |
static int uhci_submit_common(struct uhci_hcd *uhci, struct urb *urb, struct uhci_qh *qh) |
1da177e4c
|
885 886 |
{ struct uhci_td *td; |
1da177e4c
|
887 |
unsigned long destination, status; |
dccf4a48d
|
888 |
int maxsze = le16_to_cpu(qh->hep->desc.wMaxPacketSize); |
1da177e4c
|
889 |
int len = urb->transfer_buffer_length; |
1da177e4c
|
890 |
dma_addr_t data = urb->transfer_dma; |
af0bb5998
|
891 |
__le32 *plink; |
04538a255
|
892 |
struct urb_priv *urbp = urb->hcpriv; |
af0bb5998
|
893 |
unsigned int toggle; |
1da177e4c
|
894 895 896 897 898 899 |
if (len < 0) return -EINVAL; /* The "pipe" thing contains the destination in bits 8--18 */ destination = (urb->pipe & PIPE_DEVEP_MASK) | usb_packetid(urb->pipe); |
af0bb5998
|
900 901 |
toggle = usb_gettoggle(urb->dev, usb_pipeendpoint(urb->pipe), usb_pipeout(urb->pipe)); |
1da177e4c
|
902 |
|
af0bb5998
|
903 904 |
/* 3 errors, dummy TD remains inactive */ status = uhci_maxerr(3); |
1da177e4c
|
905 906 907 908 909 910 |
if (urb->dev->speed == USB_SPEED_LOW) status |= TD_CTRL_LS; if (usb_pipein(urb->pipe)) status |= TD_CTRL_SPD; /* |
687f5f342
|
911 |
* Build the DATA TDs |
1da177e4c
|
912 |
*/ |
af0bb5998
|
913 914 |
plink = NULL; td = qh->dummy_td; |
1da177e4c
|
915 916 |
do { /* Allow zero length packets */ int pktsze = maxsze; |
dccf4a48d
|
917 |
if (len <= pktsze) { /* The last packet */ |
1da177e4c
|
918 919 920 921 |
pktsze = len; if (!(urb->transfer_flags & URB_SHORT_NOT_OK)) status &= ~TD_CTRL_SPD; } |
af0bb5998
|
922 923 924 925 |
if (plink) { td = uhci_alloc_td(uhci); if (!td) goto nomem; |
28b9325e6
|
926 |
*plink = LINK_TO_TD(td); |
af0bb5998
|
927 |
} |
04538a255
|
928 |
uhci_add_td_to_urbp(td, urbp); |
dccf4a48d
|
929 |
uhci_fill_td(td, status, |
af0bb5998
|
930 931 932 |
destination | uhci_explen(pktsze) | (toggle << TD_TOKEN_TOGGLE_SHIFT), data); |
dccf4a48d
|
933 |
plink = &td->link; |
af0bb5998
|
934 |
status |= TD_CTRL_ACTIVE; |
1da177e4c
|
935 936 937 |
data += pktsze; len -= maxsze; |
af0bb5998
|
938 |
toggle ^= 1; |
1da177e4c
|
939 940 941 942 943 944 945 946 947 |
} while (len > 0); /* * URB_ZERO_PACKET means adding a 0-length packet, if direction * is OUT and the transfer_length was an exact multiple of maxsze, * hence (len = transfer_length - N * maxsze) == 0 * however, if transfer_length == 0, the zero packet was already * prepared above. */ |
dccf4a48d
|
948 949 950 |
if ((urb->transfer_flags & URB_ZERO_PACKET) && usb_pipeout(urb->pipe) && len == 0 && urb->transfer_buffer_length > 0) { |
2532178a6
|
951 |
td = uhci_alloc_td(uhci); |
1da177e4c
|
952 |
if (!td) |
af0bb5998
|
953 |
goto nomem; |
28b9325e6
|
954 |
*plink = LINK_TO_TD(td); |
1da177e4c
|
955 |
|
04538a255
|
956 |
uhci_add_td_to_urbp(td, urbp); |
af0bb5998
|
957 958 959 960 961 |
uhci_fill_td(td, status, destination | uhci_explen(0) | (toggle << TD_TOKEN_TOGGLE_SHIFT), data); plink = &td->link; |
1da177e4c
|
962 |
|
af0bb5998
|
963 |
toggle ^= 1; |
1da177e4c
|
964 965 966 967 968 969 970 971 |
} /* Set the interrupt-on-completion flag on the last packet. * A more-or-less typical 4 KB URB (= size of one memory page) * will require about 3 ms to transfer; that's a little on the * fast side but not enough to justify delaying an interrupt * more than 2 or 3 URBs, so we will ignore the URB_NO_INTERRUPT * flag setting. */ |
551509d26
|
972 |
td->status |= cpu_to_le32(TD_CTRL_IOC); |
1da177e4c
|
973 |
|
af0bb5998
|
974 975 976 977 978 979 |
/* * Build the new dummy TD and activate the old one */ td = uhci_alloc_td(uhci); if (!td) goto nomem; |
28b9325e6
|
980 |
*plink = LINK_TO_TD(td); |
af0bb5998
|
981 982 983 |
uhci_fill_td(td, 0, USB_PID_OUT | uhci_explen(0), 0); wmb(); |
551509d26
|
984 |
qh->dummy_td->status |= cpu_to_le32(TD_CTRL_ACTIVE); |
af0bb5998
|
985 986 987 988 |
qh->dummy_td = td; usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe), usb_pipeout(urb->pipe), toggle); |
dccf4a48d
|
989 |
return 0; |
af0bb5998
|
990 991 992 |
nomem: /* Remove the dummy TD from the td_list so it doesn't get freed */ |
04538a255
|
993 |
uhci_remove_td_from_urbp(qh->dummy_td); |
af0bb5998
|
994 |
return -ENOMEM; |
1da177e4c
|
995 |
} |
17230acdc
|
996 |
static int uhci_submit_bulk(struct uhci_hcd *uhci, struct urb *urb, |
dccf4a48d
|
997 |
struct uhci_qh *qh) |
1da177e4c
|
998 999 1000 1001 1002 1003 |
{ int ret; /* Can't have low-speed bulk transfers */ if (urb->dev->speed == USB_SPEED_LOW) return -EINVAL; |
17230acdc
|
1004 1005 |
if (qh->state != QH_STATE_ACTIVE) qh->skel = SKEL_BULK; |
dccf4a48d
|
1006 1007 |
ret = uhci_submit_common(uhci, urb, qh); if (ret == 0) |
84afddd7a
|
1008 |
uhci_add_fsbr(uhci, urb); |
1da177e4c
|
1009 1010 |
return ret; } |
caf3827a6
|
1011 |
static int uhci_submit_interrupt(struct uhci_hcd *uhci, struct urb *urb, |
dccf4a48d
|
1012 |
struct uhci_qh *qh) |
1da177e4c
|
1013 |
{ |
3ca2a3211
|
1014 |
int ret; |
caf3827a6
|
1015 |
|
dccf4a48d
|
1016 1017 1018 |
/* USB 1.1 interrupt transfers only involve one packet per interval. * Drivers can submit URBs of any length, but longer ones will need * multiple intervals to complete. |
1da177e4c
|
1019 |
*/ |
caf3827a6
|
1020 |
|
3ca2a3211
|
1021 1022 |
if (!qh->bandwidth_reserved) { int exponent; |
caf3827a6
|
1023 |
|
3ca2a3211
|
1024 1025 1026 1027 1028 1029 1030 |
/* Figure out which power-of-two queue to use */ for (exponent = 7; exponent >= 0; --exponent) { if ((1 << exponent) <= urb->interval) break; } if (exponent < 0) return -EINVAL; |
caf3827a6
|
1031 |
|
e58dcebcd
|
1032 1033 1034 1035 1036 1037 1038 1039 1040 1041 1042 |
/* If the slot is full, try a lower period */ do { qh->period = 1 << exponent; qh->skel = SKEL_INDEX(exponent); /* For now, interrupt phase is fixed by the layout * of the QH lists. */ qh->phase = (qh->period / 2) & (MAX_PHASE - 1); ret = uhci_check_bandwidth(uhci, qh); } while (ret != 0 && --exponent >= 0); |
3ca2a3211
|
1043 1044 1045 1046 1047 1048 1049 1050 1051 1052 1053 1054 |
if (ret) return ret; } else if (qh->period > urb->interval) return -EINVAL; /* Can't decrease the period */ ret = uhci_submit_common(uhci, urb, qh); if (ret == 0) { urb->interval = qh->period; if (!qh->bandwidth_reserved) uhci_reserve_bandwidth(uhci, qh); } return ret; |
1da177e4c
|
1055 1056 1057 |
} /* |
b1869000a
|
1058 1059 1060 |
* Fix up the data structures following a short transfer */ static int uhci_fixup_short_transfer(struct uhci_hcd *uhci, |
59e29ed91
|
1061 |
struct uhci_qh *qh, struct urb_priv *urbp) |
b1869000a
|
1062 1063 |
{ struct uhci_td *td; |
59e29ed91
|
1064 1065 |
struct list_head *tmp; int ret; |
b1869000a
|
1066 1067 1068 |
td = list_entry(urbp->td_list.prev, struct uhci_td, list); if (qh->type == USB_ENDPOINT_XFER_CONTROL) { |
b1869000a
|
1069 1070 1071 1072 |
/* When a control transfer is short, we have to restart * the queue at the status stage transaction, which is * the last TD. */ |
59e29ed91
|
1073 |
WARN_ON(list_empty(&urbp->td_list)); |
28b9325e6
|
1074 |
qh->element = LINK_TO_TD(td); |
59e29ed91
|
1075 |
tmp = td->list.prev; |
b1869000a
|
1076 |
ret = -EINPROGRESS; |
59e29ed91
|
1077 |
} else { |
b1869000a
|
1078 1079 1080 1081 |
/* When a bulk/interrupt transfer is short, we have to * fix up the toggles of the following URBs on the queue * before restarting the queue at the next URB. */ |
59e29ed91
|
1082 |
qh->initial_toggle = uhci_toggle(td_token(qh->post_td)) ^ 1; |
b1869000a
|
1083 |
uhci_fixup_toggles(qh, 1); |
59e29ed91
|
1084 1085 |
if (list_empty(&urbp->td_list)) td = qh->post_td; |
b1869000a
|
1086 |
qh->element = td->link; |
59e29ed91
|
1087 1088 |
tmp = urbp->td_list.prev; ret = 0; |
b1869000a
|
1089 |
} |
59e29ed91
|
1090 1091 1092 1093 |
/* Remove all the TDs we skipped over, from tmp back to the start */ while (tmp != &urbp->td_list) { td = list_entry(tmp, struct uhci_td, list); tmp = tmp->prev; |
04538a255
|
1094 1095 |
uhci_remove_td_from_urbp(td); uhci_free_td(uhci, td); |
59e29ed91
|
1096 |
} |
b1869000a
|
1097 1098 1099 1100 1101 1102 1103 1104 1105 1106 |
return ret; } /* * Common result for control, bulk, and interrupt */ static int uhci_result_common(struct uhci_hcd *uhci, struct urb *urb) { struct urb_priv *urbp = urb->hcpriv; struct uhci_qh *qh = urbp->qh; |
59e29ed91
|
1107 |
struct uhci_td *td, *tmp; |
b1869000a
|
1108 1109 |
unsigned status; int ret = 0; |
59e29ed91
|
1110 |
list_for_each_entry_safe(td, tmp, &urbp->td_list, list) { |
b1869000a
|
1111 1112 |
unsigned int ctrlstat; int len; |
b1869000a
|
1113 1114 1115 1116 1117 1118 1119 1120 1121 1122 1123 1124 1125 |
ctrlstat = td_status(td); status = uhci_status_bits(ctrlstat); if (status & TD_CTRL_ACTIVE) return -EINPROGRESS; len = uhci_actual_length(ctrlstat); urb->actual_length += len; if (status) { ret = uhci_map_status(status, uhci_packetout(td_token(td))); if ((debug == 1 && ret != -EPIPE) || debug > 1) { /* Some debugging code */ |
be3cbc5f8
|
1126 |
dev_dbg(&urb->dev->dev, |
b1869000a
|
1127 1128 |
"%s: failed with status %x ", |
441b62c1e
|
1129 |
__func__, status); |
b1869000a
|
1130 1131 1132 |
if (debug > 1 && errbuf) { /* Print the chain for debugging */ |
e009f1b20
|
1133 |
uhci_show_qh(uhci, urbp->qh, errbuf, |
b1869000a
|
1134 1135 1136 1137 |
ERRBUF_LEN, 0); lprintk(errbuf); } } |
e7e7c360f
|
1138 |
/* Did we receive a short packet? */ |
b1869000a
|
1139 |
} else if (len < uhci_expected_length(td_token(td))) { |
e7e7c360f
|
1140 1141 1142 1143 1144 1145 1146 1147 1148 |
/* For control transfers, go to the status TD if * this isn't already the last data TD */ if (qh->type == USB_ENDPOINT_XFER_CONTROL) { if (td->list.next != urbp->td_list.prev) ret = 1; } /* For bulk and interrupt, this may be an error */ else if (urb->transfer_flags & URB_SHORT_NOT_OK) |
b1869000a
|
1149 |
ret = -EREMOTEIO; |
f443ddf10
|
1150 1151 1152 |
/* Fixup needed only if this isn't the URB's last TD */ else if (&td->list != urbp->td_list.prev) |
b1869000a
|
1153 1154 |
ret = 1; } |
04538a255
|
1155 |
uhci_remove_td_from_urbp(td); |
59e29ed91
|
1156 |
if (qh->post_td) |
04538a255
|
1157 |
uhci_free_td(uhci, qh->post_td); |
59e29ed91
|
1158 |
qh->post_td = td; |
b1869000a
|
1159 1160 1161 1162 1163 1164 1165 |
if (ret != 0) goto err; } return ret; err: if (ret < 0) { |
b1869000a
|
1166 1167 1168 1169 1170 1171 1172 1173 1174 |
/* Note that the queue has stopped and save * the next toggle value */ qh->element = UHCI_PTR_TERM; qh->is_stopped = 1; qh->needs_fixup = (qh->type != USB_ENDPOINT_XFER_CONTROL); qh->initial_toggle = uhci_toggle(td_token(td)) ^ (ret == -EREMOTEIO); } else /* Short packet received */ |
59e29ed91
|
1175 |
ret = uhci_fixup_short_transfer(uhci, qh, urbp); |
b1869000a
|
1176 1177 1178 1179 |
return ret; } /* |
1da177e4c
|
1180 1181 |
* Isochronous transfers */ |
0ed8fee1c
|
1182 1183 |
static int uhci_submit_isochronous(struct uhci_hcd *uhci, struct urb *urb, struct uhci_qh *qh) |
1da177e4c
|
1184 |
{ |
0ed8fee1c
|
1185 1186 1187 1188 |
struct uhci_td *td = NULL; /* Since urb->number_of_packets > 0 */ int i, frame; unsigned long destination, status; struct urb_priv *urbp = (struct urb_priv *) urb->hcpriv; |
1da177e4c
|
1189 |
|
caf3827a6
|
1190 1191 1192 |
/* Values must not be too big (could overflow below) */ if (urb->interval >= UHCI_NUMFRAMES || urb->number_of_packets >= UHCI_NUMFRAMES) |
1da177e4c
|
1193 |
return -EFBIG; |
caf3827a6
|
1194 |
/* Check the period and figure out the starting frame number */ |
3ca2a3211
|
1195 1196 |
if (!qh->bandwidth_reserved) { qh->period = urb->interval; |
caf3827a6
|
1197 |
if (urb->transfer_flags & URB_ISO_ASAP) { |
3ca2a3211
|
1198 1199 1200 1201 1202 1203 |
qh->phase = -1; /* Find the best phase */ i = uhci_check_bandwidth(uhci, qh); if (i) return i; /* Allow a little time to allocate the TDs */ |
c8155cc5d
|
1204 |
uhci_get_current_frame_number(uhci); |
3ca2a3211
|
1205 1206 1207 1208 1209 1210 |
frame = uhci->frame_number + 10; /* Move forward to the first frame having the * correct phase */ urb->start_frame = frame + ((qh->phase - frame) & (qh->period - 1)); |
caf3827a6
|
1211 |
} else { |
c8155cc5d
|
1212 |
i = urb->start_frame - uhci->last_iso_frame; |
caf3827a6
|
1213 1214 |
if (i <= 0 || i >= UHCI_NUMFRAMES) return -EINVAL; |
3ca2a3211
|
1215 1216 1217 1218 |
qh->phase = urb->start_frame & (qh->period - 1); i = uhci_check_bandwidth(uhci, qh); if (i) return i; |
caf3827a6
|
1219 |
} |
3ca2a3211
|
1220 |
|
caf3827a6
|
1221 1222 |
} else if (qh->period != urb->interval) { return -EINVAL; /* Can't change the period */ |
1da177e4c
|
1223 |
|
7898ffc54
|
1224 1225 |
} else { /* Find the next unused frame */ |
0ed8fee1c
|
1226 |
if (list_empty(&qh->queue)) { |
c8155cc5d
|
1227 |
frame = qh->iso_frame; |
caf3827a6
|
1228 1229 |
} else { struct urb *lurb; |
0ed8fee1c
|
1230 |
|
caf3827a6
|
1231 |
lurb = list_entry(qh->queue.prev, |
0ed8fee1c
|
1232 |
struct urb_priv, node)->urb; |
caf3827a6
|
1233 1234 1235 |
frame = lurb->start_frame + lurb->number_of_packets * lurb->interval; |
0ed8fee1c
|
1236 |
} |
7898ffc54
|
1237 1238 1239 1240 1241 1242 1243 1244 1245 1246 1247 1248 |
if (urb->transfer_flags & URB_ISO_ASAP) { /* Skip some frames if necessary to insure * the start frame is in the future. */ uhci_get_current_frame_number(uhci); if (uhci_frame_before_eq(frame, uhci->frame_number)) { frame = uhci->frame_number + 1; frame += ((qh->phase - frame) & (qh->period - 1)); } } /* Otherwise pick up where the last URB leaves off */ urb->start_frame = frame; |
1da177e4c
|
1249 |
} |
1da177e4c
|
1250 |
|
caf3827a6
|
1251 |
/* Make sure we won't have to go too far into the future */ |
c8155cc5d
|
1252 |
if (uhci_frame_before_eq(uhci->last_iso_frame + UHCI_NUMFRAMES, |
caf3827a6
|
1253 1254 1255 1256 1257 1258 |
urb->start_frame + urb->number_of_packets * urb->interval)) return -EFBIG; status = TD_CTRL_ACTIVE | TD_CTRL_IOS; destination = (urb->pipe & PIPE_DEVEP_MASK) | usb_packetid(urb->pipe); |
b81d34363
|
1259 |
for (i = 0; i < urb->number_of_packets; i++) { |
2532178a6
|
1260 |
td = uhci_alloc_td(uhci); |
1da177e4c
|
1261 1262 |
if (!td) return -ENOMEM; |
04538a255
|
1263 |
uhci_add_td_to_urbp(td, urbp); |
dccf4a48d
|
1264 1265 1266 1267 |
uhci_fill_td(td, status, destination | uhci_explen(urb->iso_frame_desc[i].length), urb->transfer_dma + urb->iso_frame_desc[i].offset); |
b81d34363
|
1268 |
} |
1da177e4c
|
1269 |
|
dccf4a48d
|
1270 |
/* Set the interrupt-on-completion flag on the last packet. */ |
551509d26
|
1271 |
td->status |= cpu_to_le32(TD_CTRL_IOC); |
dccf4a48d
|
1272 |
|
dccf4a48d
|
1273 |
/* Add the TDs to the frame list */ |
b81d34363
|
1274 1275 |
frame = urb->start_frame; list_for_each_entry(td, &urbp->td_list, list) { |
dccf4a48d
|
1276 |
uhci_insert_td_in_frame_list(uhci, td, frame); |
c8155cc5d
|
1277 1278 1279 1280 1281 1282 |
frame += qh->period; } if (list_empty(&qh->queue)) { qh->iso_packet_desc = &urb->iso_frame_desc[0]; qh->iso_frame = urb->start_frame; |
1da177e4c
|
1283 |
} |
17230acdc
|
1284 |
qh->skel = SKEL_ISO; |
3ca2a3211
|
1285 1286 |
if (!qh->bandwidth_reserved) uhci_reserve_bandwidth(uhci, qh); |
dccf4a48d
|
1287 |
return 0; |
1da177e4c
|
1288 1289 1290 1291 |
} static int uhci_result_isochronous(struct uhci_hcd *uhci, struct urb *urb) { |
c8155cc5d
|
1292 1293 1294 |
struct uhci_td *td, *tmp; struct urb_priv *urbp = urb->hcpriv; struct uhci_qh *qh = urbp->qh; |
1da177e4c
|
1295 |
|
c8155cc5d
|
1296 1297 1298 |
list_for_each_entry_safe(td, tmp, &urbp->td_list, list) { unsigned int ctrlstat; int status; |
1da177e4c
|
1299 |
int actlength; |
1da177e4c
|
1300 |
|
c8155cc5d
|
1301 |
if (uhci_frame_before_eq(uhci->cur_iso_frame, qh->iso_frame)) |
1da177e4c
|
1302 |
return -EINPROGRESS; |
c8155cc5d
|
1303 1304 1305 1306 1307 1308 1309 1310 1311 1312 1313 1314 1315 1316 |
uhci_remove_tds_from_frame(uhci, qh->iso_frame); ctrlstat = td_status(td); if (ctrlstat & TD_CTRL_ACTIVE) { status = -EXDEV; /* TD was added too late? */ } else { status = uhci_map_status(uhci_status_bits(ctrlstat), usb_pipeout(urb->pipe)); actlength = uhci_actual_length(ctrlstat); urb->actual_length += actlength; qh->iso_packet_desc->actual_length = actlength; qh->iso_packet_desc->status = status; } |
ee7d1f3f0
|
1317 |
if (status) |
1da177e4c
|
1318 |
urb->error_count++; |
1da177e4c
|
1319 |
|
c8155cc5d
|
1320 1321 1322 1323 |
uhci_remove_td_from_urbp(td); uhci_free_td(uhci, td); qh->iso_frame += qh->period; ++qh->iso_packet_desc; |
1da177e4c
|
1324 |
} |
ee7d1f3f0
|
1325 |
return 0; |
1da177e4c
|
1326 |
} |
1da177e4c
|
1327 |
static int uhci_urb_enqueue(struct usb_hcd *hcd, |
55016f10e
|
1328 |
struct urb *urb, gfp_t mem_flags) |
1da177e4c
|
1329 1330 1331 1332 |
{ int ret; struct uhci_hcd *uhci = hcd_to_uhci(hcd); unsigned long flags; |
dccf4a48d
|
1333 1334 |
struct urb_priv *urbp; struct uhci_qh *qh; |
1da177e4c
|
1335 1336 |
spin_lock_irqsave(&uhci->lock, flags); |
e9df41c5c
|
1337 1338 1339 |
ret = usb_hcd_link_urb_to_ep(hcd, urb); if (ret) goto done_not_linked; |
1da177e4c
|
1340 |
|
dccf4a48d
|
1341 1342 1343 1344 |
ret = -ENOMEM; urbp = uhci_alloc_urb_priv(uhci, urb); if (!urbp) goto done; |
1da177e4c
|
1345 |
|
e9df41c5c
|
1346 1347 |
if (urb->ep->hcpriv) qh = urb->ep->hcpriv; |
dccf4a48d
|
1348 |
else { |
e9df41c5c
|
1349 |
qh = uhci_alloc_qh(uhci, urb->dev, urb->ep); |
dccf4a48d
|
1350 1351 |
if (!qh) goto err_no_qh; |
1da177e4c
|
1352 |
} |
dccf4a48d
|
1353 |
urbp->qh = qh; |
1da177e4c
|
1354 |
|
4de7d2c23
|
1355 1356 |
switch (qh->type) { case USB_ENDPOINT_XFER_CONTROL: |
dccf4a48d
|
1357 1358 |
ret = uhci_submit_control(uhci, urb, qh); break; |
4de7d2c23
|
1359 |
case USB_ENDPOINT_XFER_BULK: |
dccf4a48d
|
1360 |
ret = uhci_submit_bulk(uhci, urb, qh); |
1da177e4c
|
1361 |
break; |
4de7d2c23
|
1362 |
case USB_ENDPOINT_XFER_INT: |
3ca2a3211
|
1363 |
ret = uhci_submit_interrupt(uhci, urb, qh); |
1da177e4c
|
1364 |
break; |
4de7d2c23
|
1365 |
case USB_ENDPOINT_XFER_ISOC: |
c8155cc5d
|
1366 |
urb->error_count = 0; |
dccf4a48d
|
1367 |
ret = uhci_submit_isochronous(uhci, urb, qh); |
1da177e4c
|
1368 1369 |
break; } |
dccf4a48d
|
1370 1371 |
if (ret != 0) goto err_submit_failed; |
1da177e4c
|
1372 |
|
dccf4a48d
|
1373 |
/* Add this URB to the QH */ |
dccf4a48d
|
1374 |
list_add_tail(&urbp->node, &qh->queue); |
1da177e4c
|
1375 |
|
dccf4a48d
|
1376 1377 |
/* If the new URB is the first and only one on this QH then either * the QH is new and idle or else it's unlinked and waiting to |
2775562ad
|
1378 1379 |
* become idle, so we can activate it right away. But only if the * queue isn't stopped. */ |
84afddd7a
|
1380 |
if (qh->queue.next == &urbp->node && !qh->is_stopped) { |
dccf4a48d
|
1381 |
uhci_activate_qh(uhci, qh); |
c5e3b741a
|
1382 |
uhci_urbp_wants_fsbr(uhci, urbp); |
84afddd7a
|
1383 |
} |
dccf4a48d
|
1384 1385 1386 1387 1388 |
goto done; err_submit_failed: if (qh->state == QH_STATE_IDLE) uhci_make_qh_idle(uhci, qh); /* Reclaim unused QH */ |
dccf4a48d
|
1389 1390 |
err_no_qh: uhci_free_urb_priv(uhci, urbp); |
dccf4a48d
|
1391 |
done: |
e9df41c5c
|
1392 1393 1394 |
if (ret) usb_hcd_unlink_urb_from_ep(hcd, urb); done_not_linked: |
1da177e4c
|
1395 1396 1397 |
spin_unlock_irqrestore(&uhci->lock, flags); return ret; } |
e9df41c5c
|
1398 |
static int uhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status) |
0ed8fee1c
|
1399 1400 1401 |
{ struct uhci_hcd *uhci = hcd_to_uhci(hcd); unsigned long flags; |
10b8e47d6
|
1402 |
struct uhci_qh *qh; |
e9df41c5c
|
1403 |
int rc; |
0ed8fee1c
|
1404 1405 |
spin_lock_irqsave(&uhci->lock, flags); |
e9df41c5c
|
1406 1407 |
rc = usb_hcd_check_unlink_urb(hcd, urb, status); if (rc) |
0ed8fee1c
|
1408 |
goto done; |
e9df41c5c
|
1409 1410 |
qh = ((struct urb_priv *) urb->hcpriv)->qh; |
0ed8fee1c
|
1411 1412 |
/* Remove Isochronous TDs from the frame list ASAP */ |
10b8e47d6
|
1413 |
if (qh->type == USB_ENDPOINT_XFER_ISOC) { |
0ed8fee1c
|
1414 |
uhci_unlink_isochronous_tds(uhci, urb); |
10b8e47d6
|
1415 1416 1417 1418 1419 1420 1421 1422 1423 |
mb(); /* If the URB has already started, update the QH unlink time */ uhci_get_current_frame_number(uhci); if (uhci_frame_before_eq(urb->start_frame, uhci->frame_number)) qh->unlink_frame = uhci->frame_number; } uhci_unlink_qh(uhci, qh); |
0ed8fee1c
|
1424 1425 1426 |
done: spin_unlock_irqrestore(&uhci->lock, flags); |
e9df41c5c
|
1427 |
return rc; |
0ed8fee1c
|
1428 |
} |
1da177e4c
|
1429 |
/* |
0ed8fee1c
|
1430 |
* Finish unlinking an URB and give it back |
1da177e4c
|
1431 |
*/ |
0ed8fee1c
|
1432 |
static void uhci_giveback_urb(struct uhci_hcd *uhci, struct uhci_qh *qh, |
4a00027dc
|
1433 |
struct urb *urb, int status) |
0ed8fee1c
|
1434 1435 |
__releases(uhci->lock) __acquires(uhci->lock) |
1da177e4c
|
1436 |
{ |
dccf4a48d
|
1437 |
struct urb_priv *urbp = (struct urb_priv *) urb->hcpriv; |
1da177e4c
|
1438 |
|
e7e7c360f
|
1439 |
if (qh->type == USB_ENDPOINT_XFER_CONTROL) { |
7ea0a2bcf
|
1440 1441 1442 1443 |
/* Subtract off the length of the SETUP packet from * urb->actual_length. */ urb->actual_length -= min_t(u32, 8, urb->actual_length); |
e7e7c360f
|
1444 |
} |
c8155cc5d
|
1445 1446 |
/* When giving back the first URB in an Isochronous queue, * reinitialize the QH's iso-related members for the next URB. */ |
e7e7c360f
|
1447 |
else if (qh->type == USB_ENDPOINT_XFER_ISOC && |
c8155cc5d
|
1448 1449 1450 1451 1452 1453 1454 |
urbp->node.prev == &qh->queue && urbp->node.next != &qh->queue) { struct urb *nurb = list_entry(urbp->node.next, struct urb_priv, node)->urb; qh->iso_packet_desc = &nurb->iso_frame_desc[0]; qh->iso_frame = nurb->start_frame; |
c8155cc5d
|
1455 |
} |
1da177e4c
|
1456 |
|
0ed8fee1c
|
1457 1458 1459 1460 1461 1462 1463 1464 |
/* Take the URB off the QH's queue. If the queue is now empty, * this is a perfect time for a toggle fixup. */ list_del_init(&urbp->node); if (list_empty(&qh->queue) && qh->needs_fixup) { usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe), usb_pipeout(urb->pipe), qh->initial_toggle); qh->needs_fixup = 0; } |
0ed8fee1c
|
1465 |
uhci_free_urb_priv(uhci, urbp); |
e9df41c5c
|
1466 |
usb_hcd_unlink_urb_from_ep(uhci_to_hcd(uhci), urb); |
1da177e4c
|
1467 |
|
0ed8fee1c
|
1468 |
spin_unlock(&uhci->lock); |
4a00027dc
|
1469 |
usb_hcd_giveback_urb(uhci_to_hcd(uhci), urb, status); |
0ed8fee1c
|
1470 |
spin_lock(&uhci->lock); |
1da177e4c
|
1471 |
|
0ed8fee1c
|
1472 1473 1474 1475 |
/* If the queue is now empty, we can unlink the QH and give up its * reserved bandwidth. */ if (list_empty(&qh->queue)) { uhci_unlink_qh(uhci, qh); |
3ca2a3211
|
1476 1477 |
if (qh->bandwidth_reserved) uhci_release_bandwidth(uhci, qh); |
0ed8fee1c
|
1478 |
} |
dccf4a48d
|
1479 |
} |
1da177e4c
|
1480 |
|
dccf4a48d
|
1481 |
/* |
0ed8fee1c
|
1482 |
* Scan the URBs in a QH's queue |
dccf4a48d
|
1483 |
*/ |
0ed8fee1c
|
1484 1485 1486 |
#define QH_FINISHED_UNLINKING(qh) \ (qh->state == QH_STATE_UNLINKING && \ uhci->frame_number + uhci->is_stopped != qh->unlink_frame) |
1da177e4c
|
1487 |
|
7d12e780e
|
1488 |
static void uhci_scan_qh(struct uhci_hcd *uhci, struct uhci_qh *qh) |
1da177e4c
|
1489 |
{ |
1da177e4c
|
1490 |
struct urb_priv *urbp; |
0ed8fee1c
|
1491 1492 |
struct urb *urb; int status; |
1da177e4c
|
1493 |
|
0ed8fee1c
|
1494 1495 1496 |
while (!list_empty(&qh->queue)) { urbp = list_entry(qh->queue.next, struct urb_priv, node); urb = urbp->urb; |
1da177e4c
|
1497 |
|
b1869000a
|
1498 |
if (qh->type == USB_ENDPOINT_XFER_ISOC) |
0ed8fee1c
|
1499 |
status = uhci_result_isochronous(uhci, urb); |
b1869000a
|
1500 |
else |
0ed8fee1c
|
1501 |
status = uhci_result_common(uhci, urb); |
0ed8fee1c
|
1502 1503 |
if (status == -EINPROGRESS) break; |
1da177e4c
|
1504 |
|
0ed8fee1c
|
1505 1506 |
/* Dequeued but completed URBs can't be given back unless * the QH is stopped or has finished unlinking. */ |
eb2310546
|
1507 |
if (urb->unlinked) { |
2775562ad
|
1508 1509 1510 1511 1512 |
if (QH_FINISHED_UNLINKING(qh)) qh->is_stopped = 1; else if (!qh->is_stopped) return; } |
1da177e4c
|
1513 |
|
4a00027dc
|
1514 |
uhci_giveback_urb(uhci, qh, urb, status); |
ee7d1f3f0
|
1515 |
if (status < 0) |
0ed8fee1c
|
1516 1517 |
break; } |
1da177e4c
|
1518 |
|
0ed8fee1c
|
1519 1520 |
/* If the QH is neither stopped nor finished unlinking (normal case), * our work here is done. */ |
2775562ad
|
1521 1522 1523 |
if (QH_FINISHED_UNLINKING(qh)) qh->is_stopped = 1; else if (!qh->is_stopped) |
0ed8fee1c
|
1524 |
return; |
1da177e4c
|
1525 |
|
0ed8fee1c
|
1526 |
/* Otherwise give back each of the dequeued URBs */ |
2775562ad
|
1527 |
restart: |
0ed8fee1c
|
1528 1529 |
list_for_each_entry(urbp, &qh->queue, node) { urb = urbp->urb; |
eb2310546
|
1530 |
if (urb->unlinked) { |
10b8e47d6
|
1531 1532 1533 1534 1535 1536 1537 1538 |
/* Fix up the TD links and save the toggles for * non-Isochronous queues. For Isochronous queues, * test for too-recent dequeues. */ if (!uhci_cleanup_queue(uhci, qh, urb)) { qh->is_stopped = 0; return; } |
4a00027dc
|
1539 |
uhci_giveback_urb(uhci, qh, urb, 0); |
0ed8fee1c
|
1540 1541 1542 1543 |
goto restart; } } qh->is_stopped = 0; |
1da177e4c
|
1544 |
|
0ed8fee1c
|
1545 1546 1547 1548 1549 |
/* There are no more dequeued URBs. If there are still URBs on the * queue, the QH can now be re-activated. */ if (!list_empty(&qh->queue)) { if (qh->needs_fixup) uhci_fixup_toggles(qh, 0); |
84afddd7a
|
1550 1551 1552 1553 1554 1555 1556 1557 1558 1559 1560 |
/* If the first URB on the queue wants FSBR but its time * limit has expired, set the next TD to interrupt on * completion before reactivating the QH. */ urbp = list_entry(qh->queue.next, struct urb_priv, node); if (urbp->fsbr && qh->wait_expired) { struct uhci_td *td = list_entry(urbp->td_list.next, struct uhci_td, list); td->status |= __cpu_to_le32(TD_CTRL_IOC); } |
0ed8fee1c
|
1561 |
uhci_activate_qh(uhci, qh); |
1da177e4c
|
1562 |
} |
0ed8fee1c
|
1563 1564 1565 1566 |
/* The queue is empty. The QH can become idle if it is fully * unlinked. */ else if (QH_FINISHED_UNLINKING(qh)) uhci_make_qh_idle(uhci, qh); |
1da177e4c
|
1567 |
} |
0ed8fee1c
|
1568 |
/* |
84afddd7a
|
1569 1570 1571 |
* Check for queues that have made some forward progress. * Returns 0 if the queue is not Isochronous, is ACTIVE, and * has not advanced since last examined; 1 otherwise. |
b761d9d86
|
1572 1573 1574 1575 1576 |
* * Early Intel controllers have a bug which causes qh->element sometimes * not to advance when a TD completes successfully. The queue remains * stuck on the inactive completed TD. We detect such cases and advance * the element pointer by hand. |
84afddd7a
|
1577 1578 1579 1580 1581 1582 1583 1584 1585 |
*/ static int uhci_advance_check(struct uhci_hcd *uhci, struct uhci_qh *qh) { struct urb_priv *urbp = NULL; struct uhci_td *td; int ret = 1; unsigned status; if (qh->type == USB_ENDPOINT_XFER_ISOC) |
c5e3b741a
|
1586 |
goto done; |
84afddd7a
|
1587 1588 1589 1590 1591 1592 1593 1594 1595 1596 1597 1598 1599 1600 1601 1602 1603 1604 1605 1606 1607 1608 |
/* Treat an UNLINKING queue as though it hasn't advanced. * This is okay because reactivation will treat it as though * it has advanced, and if it is going to become IDLE then * this doesn't matter anyway. Furthermore it's possible * for an UNLINKING queue not to have any URBs at all, or * for its first URB not to have any TDs (if it was dequeued * just as it completed). So it's not easy in any case to * test whether such queues have advanced. */ if (qh->state != QH_STATE_ACTIVE) { urbp = NULL; status = 0; } else { urbp = list_entry(qh->queue.next, struct urb_priv, node); td = list_entry(urbp->td_list.next, struct uhci_td, list); status = td_status(td); if (!(status & TD_CTRL_ACTIVE)) { /* We're okay, the queue has advanced */ qh->wait_expired = 0; qh->advance_jiffies = jiffies; |
c5e3b741a
|
1609 |
goto done; |
84afddd7a
|
1610 1611 1612 1613 1614 |
} ret = 0; } /* The queue hasn't advanced; check for timeout */ |
c5e3b741a
|
1615 1616 1617 1618 |
if (qh->wait_expired) goto done; if (time_after(jiffies, qh->advance_jiffies + QH_WAIT_TIMEOUT)) { |
b761d9d86
|
1619 1620 |
/* Detect the Intel bug and work around it */ |
28b9325e6
|
1621 |
if (qh->post_td && qh_element(qh) == LINK_TO_TD(qh->post_td)) { |
b761d9d86
|
1622 1623 |
qh->element = qh->post_td->link; qh->advance_jiffies = jiffies; |
c5e3b741a
|
1624 1625 |
ret = 1; goto done; |
b761d9d86
|
1626 |
} |
84afddd7a
|
1627 1628 1629 1630 1631 1632 1633 1634 |
qh->wait_expired = 1; /* If the current URB wants FSBR, unlink it temporarily * so that we can safely set the next TD to interrupt on * completion. That way we'll know as soon as the queue * starts moving again. */ if (urbp && urbp->fsbr && !(status & TD_CTRL_IOC)) uhci_unlink_qh(uhci, qh); |
c5e3b741a
|
1635 1636 1637 1638 1639 |
} else { /* Unmoving but not-yet-expired queues keep FSBR alive */ if (urbp) uhci_urbp_wants_fsbr(uhci, urbp); |
84afddd7a
|
1640 |
} |
c5e3b741a
|
1641 1642 |
done: |
84afddd7a
|
1643 1644 1645 1646 |
return ret; } /* |
0ed8fee1c
|
1647 1648 |
* Process events in the schedule, but only in one thread at a time */ |
7d12e780e
|
1649 |
static void uhci_scan_schedule(struct uhci_hcd *uhci) |
1da177e4c
|
1650 |
{ |
0ed8fee1c
|
1651 1652 |
int i; struct uhci_qh *qh; |
1da177e4c
|
1653 1654 1655 1656 1657 1658 1659 |
/* Don't allow re-entrant calls */ if (uhci->scan_in_progress) { uhci->need_rescan = 1; return; } uhci->scan_in_progress = 1; |
84afddd7a
|
1660 |
rescan: |
1da177e4c
|
1661 |
uhci->need_rescan = 0; |
c5e3b741a
|
1662 |
uhci->fsbr_is_wanted = 0; |
1da177e4c
|
1663 |
|
6c1b445c2
|
1664 |
uhci_clear_next_interrupt(uhci); |
1da177e4c
|
1665 |
uhci_get_current_frame_number(uhci); |
c8155cc5d
|
1666 |
uhci->cur_iso_frame = uhci->frame_number; |
1da177e4c
|
1667 |
|
0ed8fee1c
|
1668 1669 1670 1671 1672 1673 1674 |
/* Go through all the QH queues and process the URBs in each one */ for (i = 0; i < UHCI_NUM_SKELQH - 1; ++i) { uhci->next_qh = list_entry(uhci->skelqh[i]->node.next, struct uhci_qh, node); while ((qh = uhci->next_qh) != uhci->skelqh[i]) { uhci->next_qh = list_entry(qh->node.next, struct uhci_qh, node); |
84afddd7a
|
1675 1676 |
if (uhci_advance_check(uhci, qh)) { |
7d12e780e
|
1677 |
uhci_scan_qh(uhci, qh); |
c5e3b741a
|
1678 1679 1680 1681 |
if (qh->state == QH_STATE_ACTIVE) { uhci_urbp_wants_fsbr(uhci, list_entry(qh->queue.next, struct urb_priv, node)); } |
84afddd7a
|
1682 |
} |
0ed8fee1c
|
1683 |
} |
1da177e4c
|
1684 |
} |
1da177e4c
|
1685 |
|
c8155cc5d
|
1686 |
uhci->last_iso_frame = uhci->cur_iso_frame; |
1da177e4c
|
1687 1688 1689 |
if (uhci->need_rescan) goto rescan; uhci->scan_in_progress = 0; |
c5e3b741a
|
1690 1691 1692 1693 1694 |
if (uhci->fsbr_is_on && !uhci->fsbr_is_wanted && !uhci->fsbr_expiring) { uhci->fsbr_expiring = 1; mod_timer(&uhci->fsbr_timer, jiffies + FSBR_OFF_DELAY); } |
84afddd7a
|
1695 |
|
04538a255
|
1696 |
if (list_empty(&uhci->skel_unlink_qh->node)) |
1da177e4c
|
1697 1698 1699 |
uhci_clear_next_interrupt(uhci); else uhci_set_next_interrupt(uhci); |
1da177e4c
|
1700 |
} |