Blame view
drivers/watchdog/ar7_wdt.c
7.05 KB
2e62c4988
|
1 |
// SPDX-License-Identifier: GPL-2.0+ |
c283cf2c0
|
2 3 4 5 6 7 8 9 10 11 |
/* * drivers/watchdog/ar7_wdt.c * * Copyright (C) 2007 Nicolas Thill <nico@openwrt.org> * Copyright (c) 2005 Enrik Berkhan <Enrik.Berkhan@akk.org> * * Some code taken from: * National Semiconductor SCx200 Watchdog support * Copyright (c) 2001,2002 Christer Weinigel <wingel@nano-system.com> * |
c283cf2c0
|
12 |
*/ |
27c766aaa
|
13 |
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
c283cf2c0
|
14 15 16 |
#include <linux/module.h> #include <linux/moduleparam.h> #include <linux/errno.h> |
c283cf2c0
|
17 |
#include <linux/miscdevice.h> |
64d4062a3
|
18 |
#include <linux/platform_device.h> |
c283cf2c0
|
19 |
#include <linux/watchdog.h> |
c283cf2c0
|
20 21 22 23 |
#include <linux/fs.h> #include <linux/ioport.h> #include <linux/io.h> #include <linux/uaccess.h> |
780019ddf
|
24 |
#include <linux/clk.h> |
c283cf2c0
|
25 26 |
#include <asm/addrspace.h> |
c5e7f5a38
|
27 |
#include <asm/mach-ar7/ar7.h> |
c283cf2c0
|
28 |
|
c283cf2c0
|
29 30 31 32 33 |
#define LONGNAME "TI AR7 Watchdog Timer" MODULE_AUTHOR("Nicolas Thill <nico@openwrt.org>"); MODULE_DESCRIPTION(LONGNAME); MODULE_LICENSE("GPL"); |
c283cf2c0
|
34 35 36 37 |
static int margin = 60; module_param(margin, int, 0); MODULE_PARM_DESC(margin, "Watchdog margin in seconds"); |
86a1e1896
|
38 39 |
static bool nowayout = WATCHDOG_NOWAYOUT; module_param(nowayout, bool, 0); |
c283cf2c0
|
40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 |
MODULE_PARM_DESC(nowayout, "Disable watchdog shutdown on close"); #define READ_REG(x) readl((void __iomem *)&(x)) #define WRITE_REG(x, v) writel((v), (void __iomem *)&(x)) struct ar7_wdt { u32 kick_lock; u32 kick; u32 change_lock; u32 change; u32 disable_lock; u32 disable; u32 prescale_lock; u32 prescale; }; |
670d59c0a
|
55 |
static unsigned long wdt_is_open; |
c283cf2c0
|
56 |
static unsigned expect_close; |
1334f3293
|
57 |
static DEFINE_SPINLOCK(wdt_lock); |
c283cf2c0
|
58 59 60 |
/* XXX currently fixed, allows max margin ~68.72 secs */ #define prescale_value 0xffff |
64d4062a3
|
61 62 |
/* Resource of the WDT registers */ static struct resource *ar7_regs_wdt; |
c283cf2c0
|
63 64 |
/* Pointer to the remapped WDT IO space */ static struct ar7_wdt *ar7_wdt; |
c283cf2c0
|
65 |
|
780019ddf
|
66 |
static struct clk *vbus_clk; |
c283cf2c0
|
67 68 69 70 71 72 73 74 75 76 |
static void ar7_wdt_kick(u32 value) { WRITE_REG(ar7_wdt->kick_lock, 0x5555); if ((READ_REG(ar7_wdt->kick_lock) & 3) == 1) { WRITE_REG(ar7_wdt->kick_lock, 0xaaaa); if ((READ_REG(ar7_wdt->kick_lock) & 3) == 3) { WRITE_REG(ar7_wdt->kick, value); return; } } |
27c766aaa
|
77 78 |
pr_err("failed to unlock WDT kick reg "); |
c283cf2c0
|
79 80 81 82 83 84 85 86 87 88 89 90 |
} static void ar7_wdt_prescale(u32 value) { WRITE_REG(ar7_wdt->prescale_lock, 0x5a5a); if ((READ_REG(ar7_wdt->prescale_lock) & 3) == 1) { WRITE_REG(ar7_wdt->prescale_lock, 0xa5a5); if ((READ_REG(ar7_wdt->prescale_lock) & 3) == 3) { WRITE_REG(ar7_wdt->prescale, value); return; } } |
27c766aaa
|
91 92 |
pr_err("failed to unlock WDT prescale reg "); |
c283cf2c0
|
93 94 95 96 97 98 99 100 101 102 103 104 |
} static void ar7_wdt_change(u32 value) { WRITE_REG(ar7_wdt->change_lock, 0x6666); if ((READ_REG(ar7_wdt->change_lock) & 3) == 1) { WRITE_REG(ar7_wdt->change_lock, 0xbbbb); if ((READ_REG(ar7_wdt->change_lock) & 3) == 3) { WRITE_REG(ar7_wdt->change, value); return; } } |
27c766aaa
|
105 106 |
pr_err("failed to unlock WDT change reg "); |
c283cf2c0
|
107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 |
} static void ar7_wdt_disable(u32 value) { WRITE_REG(ar7_wdt->disable_lock, 0x7777); if ((READ_REG(ar7_wdt->disable_lock) & 3) == 1) { WRITE_REG(ar7_wdt->disable_lock, 0xcccc); if ((READ_REG(ar7_wdt->disable_lock) & 3) == 2) { WRITE_REG(ar7_wdt->disable_lock, 0xdddd); if ((READ_REG(ar7_wdt->disable_lock) & 3) == 3) { WRITE_REG(ar7_wdt->disable, value); return; } } } |
27c766aaa
|
122 123 |
pr_err("failed to unlock WDT disable reg "); |
c283cf2c0
|
124 125 126 127 128 |
} static void ar7_wdt_update_margin(int new_margin) { u32 change; |
780019ddf
|
129 |
u32 vbus_rate; |
c283cf2c0
|
130 |
|
780019ddf
|
131 132 |
vbus_rate = clk_get_rate(vbus_clk); change = new_margin * (vbus_rate / prescale_value); |
670d59c0a
|
133 134 135 136 |
if (change < 1) change = 1; if (change > 0xffff) change = 0xffff; |
c283cf2c0
|
137 |
ar7_wdt_change(change); |
780019ddf
|
138 |
margin = change * prescale_value / vbus_rate; |
27c766aaa
|
139 140 141 |
pr_info("timer margin %d seconds (prescale %d, change %d, freq %d) ", margin, prescale_value, change, vbus_rate); |
c283cf2c0
|
142 143 144 145 |
} static void ar7_wdt_enable_wdt(void) { |
27c766aaa
|
146 147 |
pr_debug("enabling watchdog timer "); |
c283cf2c0
|
148 149 150 151 152 153 |
ar7_wdt_disable(1); ar7_wdt_kick(1); } static void ar7_wdt_disable_wdt(void) { |
27c766aaa
|
154 155 |
pr_debug("disabling watchdog timer "); |
c283cf2c0
|
156 157 158 159 160 161 |
ar7_wdt_disable(0); } static int ar7_wdt_open(struct inode *inode, struct file *file) { /* only allow one at a time */ |
670d59c0a
|
162 |
if (test_and_set_bit(0, &wdt_is_open)) |
c283cf2c0
|
163 164 165 |
return -EBUSY; ar7_wdt_enable_wdt(); expect_close = 0; |
c5bf68fe0
|
166 |
return stream_open(inode, file); |
c283cf2c0
|
167 168 169 170 171 |
} static int ar7_wdt_release(struct inode *inode, struct file *file) { if (!expect_close) |
27c766aaa
|
172 173 |
pr_warn("watchdog device closed unexpectedly, will not disable the watchdog timer "); |
c283cf2c0
|
174 175 |
else if (!nowayout) ar7_wdt_disable_wdt(); |
670d59c0a
|
176 |
clear_bit(0, &wdt_is_open); |
c283cf2c0
|
177 178 |
return 0; } |
c283cf2c0
|
179 180 181 182 183 184 |
static ssize_t ar7_wdt_write(struct file *file, const char *data, size_t len, loff_t *ppos) { /* check for a magic close character */ if (len) { size_t i; |
670d59c0a
|
185 |
spin_lock(&wdt_lock); |
c283cf2c0
|
186 |
ar7_wdt_kick(1); |
670d59c0a
|
187 |
spin_unlock(&wdt_lock); |
c283cf2c0
|
188 189 190 191 |
expect_close = 0; for (i = 0; i < len; ++i) { char c; |
7944d3a5a
|
192 |
if (get_user(c, data + i)) |
c283cf2c0
|
193 194 195 196 197 198 199 200 |
return -EFAULT; if (c == 'V') expect_close = 1; } } return len; } |
670d59c0a
|
201 202 |
static long ar7_wdt_ioctl(struct file *file, unsigned int cmd, unsigned long arg) |
c283cf2c0
|
203 |
{ |
42747d712
|
204 |
static const struct watchdog_info ident = { |
c283cf2c0
|
205 206 |
.identity = LONGNAME, .firmware_version = 1, |
e73a78027
|
207 208 |
.options = (WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE), |
c283cf2c0
|
209 210 211 212 |
}; int new_margin; switch (cmd) { |
c283cf2c0
|
213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 |
case WDIOC_GETSUPPORT: if (copy_to_user((struct watchdog_info *)arg, &ident, sizeof(ident))) return -EFAULT; return 0; case WDIOC_GETSTATUS: case WDIOC_GETBOOTSTATUS: if (put_user(0, (int *)arg)) return -EFAULT; return 0; case WDIOC_KEEPALIVE: ar7_wdt_kick(1); return 0; case WDIOC_SETTIMEOUT: if (get_user(new_margin, (int *)arg)) return -EFAULT; if (new_margin < 1) return -EINVAL; |
670d59c0a
|
231 |
spin_lock(&wdt_lock); |
c283cf2c0
|
232 233 |
ar7_wdt_update_margin(new_margin); ar7_wdt_kick(1); |
670d59c0a
|
234 |
spin_unlock(&wdt_lock); |
d259f94f7
|
235 |
/* Fall through */ |
c283cf2c0
|
236 237 238 239 240 |
case WDIOC_GETTIMEOUT: if (put_user(margin, (int *)arg)) return -EFAULT; return 0; |
0c06090c9
|
241 242 |
default: return -ENOTTY; |
c283cf2c0
|
243 244 |
} } |
b47a166ed
|
245 |
static const struct file_operations ar7_wdt_fops = { |
c283cf2c0
|
246 247 |
.owner = THIS_MODULE, .write = ar7_wdt_write, |
670d59c0a
|
248 |
.unlocked_ioctl = ar7_wdt_ioctl, |
c283cf2c0
|
249 250 |
.open = ar7_wdt_open, .release = ar7_wdt_release, |
6038f373a
|
251 |
.llseek = no_llseek, |
c283cf2c0
|
252 253 254 255 256 257 258 |
}; static struct miscdevice ar7_wdt_miscdev = { .minor = WATCHDOG_MINOR, .name = "watchdog", .fops = &ar7_wdt_fops, }; |
2d991a164
|
259 |
static int ar7_wdt_probe(struct platform_device *pdev) |
c283cf2c0
|
260 261 |
{ int rc; |
64d4062a3
|
262 263 |
ar7_regs_wdt = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs"); |
4c271bb67
|
264 265 266 |
ar7_wdt = devm_ioremap_resource(&pdev->dev, ar7_regs_wdt); if (IS_ERR(ar7_wdt)) return PTR_ERR(ar7_wdt); |
c283cf2c0
|
267 |
|
780019ddf
|
268 269 |
vbus_clk = clk_get(NULL, "vbus"); if (IS_ERR(vbus_clk)) { |
27c766aaa
|
270 271 |
pr_err("could not get vbus clock "); |
ae21cc20a
|
272 |
return PTR_ERR(vbus_clk); |
780019ddf
|
273 |
} |
c283cf2c0
|
274 275 276 |
ar7_wdt_disable_wdt(); ar7_wdt_prescale(prescale_value); ar7_wdt_update_margin(margin); |
c283cf2c0
|
277 278 |
rc = misc_register(&ar7_wdt_miscdev); if (rc) { |
27c766aaa
|
279 280 |
pr_err("unable to register misc device "); |
ae21cc20a
|
281 |
goto out; |
c283cf2c0
|
282 |
} |
ae21cc20a
|
283 |
return 0; |
c283cf2c0
|
284 |
|
c283cf2c0
|
285 |
out: |
ae21cc20a
|
286 287 |
clk_put(vbus_clk); vbus_clk = NULL; |
c283cf2c0
|
288 289 |
return rc; } |
4b12b896c
|
290 |
static int ar7_wdt_remove(struct platform_device *pdev) |
c283cf2c0
|
291 292 |
{ misc_deregister(&ar7_wdt_miscdev); |
ae21cc20a
|
293 294 |
clk_put(vbus_clk); vbus_clk = NULL; |
64d4062a3
|
295 296 297 298 299 300 301 302 303 304 305 |
return 0; } static void ar7_wdt_shutdown(struct platform_device *pdev) { if (!nowayout) ar7_wdt_disable_wdt(); } static struct platform_driver ar7_wdt_driver = { .probe = ar7_wdt_probe, |
82268714b
|
306 |
.remove = ar7_wdt_remove, |
64d4062a3
|
307 308 |
.shutdown = ar7_wdt_shutdown, .driver = { |
64d4062a3
|
309 310 311 |
.name = "ar7_wdt", }, }; |
b8ec61189
|
312 |
module_platform_driver(ar7_wdt_driver); |