Blame view
drivers/ata/sata_inic162x.c
23.6 KB
59bd9ded4 treewide: Replace... |
1 |
// SPDX-License-Identifier: GPL-2.0-only |
1fd7a697a sata_inic162x: fi... |
2 3 4 5 6 7 |
/* * sata_inic162x.c - Driver for Initio 162x SATA controllers * * Copyright 2006 SUSE Linux Products GmbH * Copyright 2006 Tejun Heo <teheo@novell.com> * |
bb9696192 libata: make it c... |
8 9 10 11 12 13 14 15 16 17 18 19 |
* **** WARNING **** * * This driver never worked properly and unfortunately data corruption is * relatively common. There isn't anyone working on the driver and there's * no support from the vendor. Do not use this driver in any production * environment. * * http://thread.gmane.org/gmane.linux.debian.devel.bugs.rc/378525/focus=54491 * https://bugzilla.kernel.org/show_bug.cgi?id=60565 * * ***************** * |
1fd7a697a sata_inic162x: fi... |
20 21 22 23 |
* This controller is eccentric and easily locks up if something isn't * right. Documentation is available at initio's website but it only * documents registers (not programming model). * |
22bfc6d5e sata_inic162x: up... |
24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 |
* This driver has interesting history. The first version was written * from the documentation and a 2.4 IDE driver posted on a Taiwan * company, which didn't use any IDMA features and couldn't handle * LBA48. The resulting driver couldn't handle LBA48 devices either * making it pretty useless. * * After a while, initio picked the driver up, renamed it to * sata_initio162x, updated it to use IDMA for ATA DMA commands and * posted it on their website. It only used ATA_PROT_DMA for IDMA and * attaching both devices and issuing IDMA and !IDMA commands * simultaneously broke it due to PIRQ masking interaction but it did * show how to use the IDMA (ADMA + some initio specific twists) * engine. * * Then, I picked up their changes again and here's the usable driver * which uses IDMA for everything. Everything works now including * LBA48, CD/DVD burning, suspend/resume and hotplug. There are some * issues tho. Result Tf is not resported properly, NCQ isn't * supported yet and CD/DVD writing works with DMA assisted PIO * protocol (which, for native SATA devices, shouldn't cause any * noticeable difference). * * Anyways, so, here's finally a working driver for inic162x. Enjoy! * * initio: If you guys wanna improve the driver regarding result TF * access and other stuff, please feel free to contact me. I'll be * happy to assist. |
1fd7a697a sata_inic162x: fi... |
51 |
*/ |
5a0e3ad6a include cleanup: ... |
52 |
#include <linux/gfp.h> |
1fd7a697a sata_inic162x: fi... |
53 54 55 56 57 58 59 60 61 |
#include <linux/kernel.h> #include <linux/module.h> #include <linux/pci.h> #include <scsi/scsi_host.h> #include <linux/libata.h> #include <linux/blkdev.h> #include <scsi/scsi_device.h> #define DRV_NAME "sata_inic162x" |
22bfc6d5e sata_inic162x: up... |
62 |
#define DRV_VERSION "0.4" |
1fd7a697a sata_inic162x: fi... |
63 64 |
enum { |
ba66b242b sata_inic162x: ad... |
65 66 |
MMIO_BAR_PCI = 5, MMIO_BAR_CARDBUS = 1, |
1fd7a697a sata_inic162x: fi... |
67 68 |
NR_PORTS = 2, |
3ad400a92 sata_inic162x: us... |
69 70 71 |
IDMA_CPB_TBL_SIZE = 4 * 32, INIC_DMA_BOUNDARY = 0xffffff, |
b0dd9b8ef sata_inic162x: ad... |
72 |
HOST_ACTRL = 0x08, |
1fd7a697a sata_inic162x: fi... |
73 74 75 76 77 78 79 80 |
HOST_CTL = 0x7c, HOST_STAT = 0x7e, HOST_IRQ_STAT = 0xbc, HOST_IRQ_MASK = 0xbe, PORT_SIZE = 0x40, /* registers for ATA TF operation */ |
b0dd9b8ef sata_inic162x: ad... |
81 82 83 84 85 86 87 88 89 |
PORT_TF_DATA = 0x00, PORT_TF_FEATURE = 0x01, PORT_TF_NSECT = 0x02, PORT_TF_LBAL = 0x03, PORT_TF_LBAM = 0x04, PORT_TF_LBAH = 0x05, PORT_TF_DEVICE = 0x06, PORT_TF_COMMAND = 0x07, PORT_TF_ALT_STAT = 0x08, |
1fd7a697a sata_inic162x: fi... |
90 91 92 93 94 |
PORT_IRQ_STAT = 0x09, PORT_IRQ_MASK = 0x0a, PORT_PRD_CTL = 0x0b, PORT_PRD_ADDR = 0x0c, PORT_PRD_XFERLEN = 0x10, |
b0dd9b8ef sata_inic162x: ad... |
95 96 |
PORT_CPB_CPBLAR = 0x18, PORT_CPB_PTQFIFO = 0x1c, |
1fd7a697a sata_inic162x: fi... |
97 98 99 |
/* IDMA register */ PORT_IDMA_CTL = 0x14, |
b0dd9b8ef sata_inic162x: ad... |
100 101 102 103 |
PORT_IDMA_STAT = 0x16, PORT_RPQ_FIFO = 0x1e, PORT_RPQ_CNT = 0x1f, |
1fd7a697a sata_inic162x: fi... |
104 105 106 107 |
PORT_SCR = 0x20, /* HOST_CTL bits */ |
99580664a sata_inic162x: en... |
108 |
HCTL_LEDEN = (1 << 3), /* enable LED operation */ |
1fd7a697a sata_inic162x: fi... |
109 |
HCTL_IRQOFF = (1 << 8), /* global IRQ off */ |
b0dd9b8ef sata_inic162x: ad... |
110 111 112 |
HCTL_FTHD0 = (1 << 10), /* fifo threshold 0 */ HCTL_FTHD1 = (1 << 11), /* fifo threshold 1*/ HCTL_PWRDWN = (1 << 12), /* power down PHYs */ |
1fd7a697a sata_inic162x: fi... |
113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 |
HCTL_SOFTRST = (1 << 13), /* global reset (no phy reset) */ HCTL_RPGSEL = (1 << 15), /* register page select */ HCTL_KNOWN_BITS = HCTL_IRQOFF | HCTL_PWRDWN | HCTL_SOFTRST | HCTL_RPGSEL, /* HOST_IRQ_(STAT|MASK) bits */ HIRQ_PORT0 = (1 << 0), HIRQ_PORT1 = (1 << 1), HIRQ_SOFT = (1 << 14), HIRQ_GLOBAL = (1 << 15), /* STAT only */ /* PORT_IRQ_(STAT|MASK) bits */ PIRQ_OFFLINE = (1 << 0), /* device unplugged */ PIRQ_ONLINE = (1 << 1), /* device plugged */ PIRQ_COMPLETE = (1 << 2), /* completion interrupt */ PIRQ_FATAL = (1 << 3), /* fatal error */ PIRQ_ATA = (1 << 4), /* ATA interrupt */ PIRQ_REPLY = (1 << 5), /* reply FIFO not empty */ PIRQ_PENDING = (1 << 7), /* port IRQ pending (STAT only) */ PIRQ_ERR = PIRQ_OFFLINE | PIRQ_ONLINE | PIRQ_FATAL, |
f8b0685a8 sata_inic162x: ki... |
135 |
PIRQ_MASK_DEFAULT = PIRQ_REPLY | PIRQ_ATA, |
1fd7a697a sata_inic162x: fi... |
136 137 138 139 140 141 142 143 144 |
PIRQ_MASK_FREEZE = 0xff, /* PORT_PRD_CTL bits */ PRD_CTL_START = (1 << 0), PRD_CTL_WR = (1 << 3), PRD_CTL_DMAEN = (1 << 7), /* DMA enable */ /* PORT_IDMA_CTL bits */ IDMA_CTL_RST_ATA = (1 << 2), /* hardreset ATA bus */ |
89e7c8502 ata: sata_inic162... |
145 |
IDMA_CTL_RST_IDMA = (1 << 5), /* reset IDMA machinery */ |
1fd7a697a sata_inic162x: fi... |
146 147 |
IDMA_CTL_GO = (1 << 7), /* IDMA mode go */ IDMA_CTL_ATA_NIEN = (1 << 8), /* ATA IRQ disable */ |
b0dd9b8ef sata_inic162x: ad... |
148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 |
/* PORT_IDMA_STAT bits */ IDMA_STAT_PERR = (1 << 0), /* PCI ERROR MODE */ IDMA_STAT_CPBERR = (1 << 1), /* ADMA CPB error */ IDMA_STAT_LGCY = (1 << 3), /* ADMA legacy */ IDMA_STAT_UIRQ = (1 << 4), /* ADMA unsolicited irq */ IDMA_STAT_STPD = (1 << 5), /* ADMA stopped */ IDMA_STAT_PSD = (1 << 6), /* ADMA pause */ IDMA_STAT_DONE = (1 << 7), /* ADMA done */ IDMA_STAT_ERR = IDMA_STAT_PERR | IDMA_STAT_CPBERR, /* CPB Control Flags*/ CPB_CTL_VALID = (1 << 0), /* CPB valid */ CPB_CTL_QUEUED = (1 << 1), /* queued command */ CPB_CTL_DATA = (1 << 2), /* data, rsvd in datasheet */ CPB_CTL_IEN = (1 << 3), /* PCI interrupt enable */ CPB_CTL_DEVDIR = (1 << 4), /* device direction control */ /* CPB Response Flags */ CPB_RESP_DONE = (1 << 0), /* ATA command complete */ CPB_RESP_REL = (1 << 1), /* ATA release */ CPB_RESP_IGNORED = (1 << 2), /* CPB ignored */ CPB_RESP_ATA_ERR = (1 << 3), /* ATA command error */ CPB_RESP_SPURIOUS = (1 << 4), /* ATA spurious interrupt error */ CPB_RESP_UNDERFLOW = (1 << 5), /* APRD deficiency length error */ CPB_RESP_OVERFLOW = (1 << 6), /* APRD exccess length error */ CPB_RESP_CPB_ERR = (1 << 7), /* CPB error flag */ /* PRD Control Flags */ PRD_DRAIN = (1 << 1), /* ignore data excess */ PRD_CDB = (1 << 2), /* atapi packet command pointer */ PRD_DIRECT_INTR = (1 << 3), /* direct interrupt */ PRD_DMA = (1 << 4), /* data transfer method */ PRD_WRITE = (1 << 5), /* data dir, rsvd in datasheet */ PRD_IOM = (1 << 6), /* io/memory transfer */ PRD_END = (1 << 7), /* APRD chain end */ |
1fd7a697a sata_inic162x: fi... |
185 |
}; |
3ad400a92 sata_inic162x: us... |
186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 |
/* Comman Parameter Block */ struct inic_cpb { u8 resp_flags; /* Response Flags */ u8 error; /* ATA Error */ u8 status; /* ATA Status */ u8 ctl_flags; /* Control Flags */ __le32 len; /* Total Transfer Length */ __le32 prd; /* First PRD pointer */ u8 rsvd[4]; /* 16 bytes */ u8 feature; /* ATA Feature */ u8 hob_feature; /* ATA Ex. Feature */ u8 device; /* ATA Device/Head */ u8 mirctl; /* Mirror Control */ u8 nsect; /* ATA Sector Count */ u8 hob_nsect; /* ATA Ex. Sector Count */ u8 lbal; /* ATA Sector Number */ u8 hob_lbal; /* ATA Ex. Sector Number */ u8 lbam; /* ATA Cylinder Low */ u8 hob_lbam; /* ATA Ex. Cylinder Low */ u8 lbah; /* ATA Cylinder High */ u8 hob_lbah; /* ATA Ex. Cylinder High */ u8 command; /* ATA Command */ u8 ctl; /* ATA Control */ u8 slave_error; /* Slave ATA Error */ u8 slave_status; /* Slave ATA Status */ /* 32 bytes */ } __packed; /* Physical Region Descriptor */ struct inic_prd { __le32 mad; /* Physical Memory Address */ __le16 len; /* Transfer Length */ u8 rsvd; u8 flags; /* Control Flags */ } __packed; struct inic_pkt { struct inic_cpb cpb; |
b3f677e50 sata_inic162x: us... |
225 226 |
struct inic_prd prd[LIBATA_MAX_PRD + 1]; /* + 1 for cdb */ u8 cdb[ATAPI_CDB_LEN]; |
3ad400a92 sata_inic162x: us... |
227 |
} __packed; |
1fd7a697a sata_inic162x: fi... |
228 |
struct inic_host_priv { |
ba66b242b sata_inic162x: ad... |
229 |
void __iomem *mmio_base; |
36f674d9a sata_inic162x: mi... |
230 |
u16 cached_hctl; |
1fd7a697a sata_inic162x: fi... |
231 232 233 |
}; struct inic_port_priv { |
3ad400a92 sata_inic162x: us... |
234 235 236 237 |
struct inic_pkt *pkt; dma_addr_t pkt_dma; u32 *cpb_tbl; dma_addr_t cpb_tbl_dma; |
1fd7a697a sata_inic162x: fi... |
238 |
}; |
1fd7a697a sata_inic162x: fi... |
239 |
static struct scsi_host_template inic_sht = { |
ab5b0235c sata_inic162x: ki... |
240 |
ATA_BASE_SHT(DRV_NAME), |
a8cf59a66 scsi: communicate... |
241 242 243 244 245 246 247 248 249 |
.sg_tablesize = LIBATA_MAX_PRD, /* maybe it can be larger? */ /* * This controller is braindamaged. dma_boundary is 0xffff like others * but it will lock up the whole machine HARD if 65536 byte PRD entry * is fed. Reduce maximum segment size. */ .dma_boundary = INIC_DMA_BOUNDARY, .max_segment_size = 65536 - 512, |
1fd7a697a sata_inic162x: fi... |
250 251 252 253 254 255 256 |
}; static const int scr_map[] = { [SCR_STATUS] = 0, [SCR_ERROR] = 1, [SCR_CONTROL] = 2, }; |
5796d1c4c [libata] Address ... |
257 |
static void __iomem *inic_port_base(struct ata_port *ap) |
1fd7a697a sata_inic162x: fi... |
258 |
{ |
ba66b242b sata_inic162x: ad... |
259 260 261 |
struct inic_host_priv *hpriv = ap->host->private_data; return hpriv->mmio_base + ap->port_no * PORT_SIZE; |
1fd7a697a sata_inic162x: fi... |
262 |
} |
1fd7a697a sata_inic162x: fi... |
263 264 265 |
static void inic_reset_port(void __iomem *port_base) { void __iomem *idma_ctl = port_base + PORT_IDMA_CTL; |
1fd7a697a sata_inic162x: fi... |
266 |
|
f8b0685a8 sata_inic162x: ki... |
267 268 269 |
/* stop IDMA engine */ readw(idma_ctl); /* flush */ msleep(1); |
1fd7a697a sata_inic162x: fi... |
270 271 |
/* mask IRQ and assert reset */ |
f8b0685a8 sata_inic162x: ki... |
272 |
writew(IDMA_CTL_RST_IDMA, idma_ctl); |
1fd7a697a sata_inic162x: fi... |
273 |
readw(idma_ctl); /* flush */ |
1fd7a697a sata_inic162x: fi... |
274 275 276 |
msleep(1); /* release reset */ |
f8b0685a8 sata_inic162x: ki... |
277 |
writew(0, idma_ctl); |
1fd7a697a sata_inic162x: fi... |
278 279 280 |
/* clear irq */ writeb(0xff, port_base + PORT_IRQ_STAT); |
1fd7a697a sata_inic162x: fi... |
281 |
} |
82ef04fb4 libata: make SCR ... |
282 |
static int inic_scr_read(struct ata_link *link, unsigned sc_reg, u32 *val) |
1fd7a697a sata_inic162x: fi... |
283 |
{ |
82ef04fb4 libata: make SCR ... |
284 |
void __iomem *scr_addr = inic_port_base(link->ap) + PORT_SCR; |
1fd7a697a sata_inic162x: fi... |
285 286 |
if (unlikely(sc_reg >= ARRAY_SIZE(scr_map))) |
da3dbb17a libata: make ->sc... |
287 |
return -EINVAL; |
1fd7a697a sata_inic162x: fi... |
288 |
|
da3dbb17a libata: make ->sc... |
289 |
*val = readl(scr_addr + scr_map[sc_reg] * 4); |
1fd7a697a sata_inic162x: fi... |
290 291 292 |
/* this controller has stuck DIAG.N, ignore it */ if (sc_reg == SCR_ERROR) |
da3dbb17a libata: make ->sc... |
293 294 |
*val &= ~SERR_PHYRDY_CHG; return 0; |
1fd7a697a sata_inic162x: fi... |
295 |
} |
82ef04fb4 libata: make SCR ... |
296 |
static int inic_scr_write(struct ata_link *link, unsigned sc_reg, u32 val) |
1fd7a697a sata_inic162x: fi... |
297 |
{ |
82ef04fb4 libata: make SCR ... |
298 |
void __iomem *scr_addr = inic_port_base(link->ap) + PORT_SCR; |
1fd7a697a sata_inic162x: fi... |
299 300 |
if (unlikely(sc_reg >= ARRAY_SIZE(scr_map))) |
da3dbb17a libata: make ->sc... |
301 |
return -EINVAL; |
1fd7a697a sata_inic162x: fi... |
302 |
|
1fd7a697a sata_inic162x: fi... |
303 |
writel(val, scr_addr + scr_map[sc_reg] * 4); |
da3dbb17a libata: make ->sc... |
304 |
return 0; |
1fd7a697a sata_inic162x: fi... |
305 |
} |
3ad400a92 sata_inic162x: us... |
306 |
static void inic_stop_idma(struct ata_port *ap) |
1fd7a697a sata_inic162x: fi... |
307 308 |
{ void __iomem *port_base = inic_port_base(ap); |
3ad400a92 sata_inic162x: us... |
309 310 311 312 313 314 315 316 |
readb(port_base + PORT_RPQ_FIFO); readb(port_base + PORT_RPQ_CNT); writew(0, port_base + PORT_IDMA_CTL); } static void inic_host_err_intr(struct ata_port *ap, u8 irq_stat, u16 idma_stat) { |
9af5c9c97 libata-link: intr... |
317 |
struct ata_eh_info *ehi = &ap->link.eh_info; |
3ad400a92 sata_inic162x: us... |
318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 |
struct inic_port_priv *pp = ap->private_data; struct inic_cpb *cpb = &pp->pkt->cpb; bool freeze = false; ata_ehi_clear_desc(ehi); ata_ehi_push_desc(ehi, "irq_stat=0x%x idma_stat=0x%x", irq_stat, idma_stat); inic_stop_idma(ap); if (irq_stat & (PIRQ_OFFLINE | PIRQ_ONLINE)) { ata_ehi_push_desc(ehi, "hotplug"); ata_ehi_hotplugged(ehi); freeze = true; } if (idma_stat & IDMA_STAT_PERR) { ata_ehi_push_desc(ehi, "PCI error"); freeze = true; } if (idma_stat & IDMA_STAT_CPBERR) { ata_ehi_push_desc(ehi, "CPB error"); if (cpb->resp_flags & CPB_RESP_IGNORED) { __ata_ehi_push_desc(ehi, " ignored"); ehi->err_mask |= AC_ERR_INVALID; freeze = true; } if (cpb->resp_flags & CPB_RESP_ATA_ERR) ehi->err_mask |= AC_ERR_DEV; if (cpb->resp_flags & CPB_RESP_SPURIOUS) { __ata_ehi_push_desc(ehi, " spurious-intr"); ehi->err_mask |= AC_ERR_HSM; freeze = true; } if (cpb->resp_flags & (CPB_RESP_UNDERFLOW | CPB_RESP_OVERFLOW)) { __ata_ehi_push_desc(ehi, " data-over/underflow"); ehi->err_mask |= AC_ERR_HSM; freeze = true; } } if (freeze) ata_port_freeze(ap); else ata_port_abort(ap); } static void inic_host_intr(struct ata_port *ap) { void __iomem *port_base = inic_port_base(ap); struct ata_queued_cmd *qc = ata_qc_from_tag(ap, ap->link.active_tag); |
1fd7a697a sata_inic162x: fi... |
375 |
u8 irq_stat; |
3ad400a92 sata_inic162x: us... |
376 |
u16 idma_stat; |
1fd7a697a sata_inic162x: fi... |
377 |
|
3ad400a92 sata_inic162x: us... |
378 |
/* read and clear IRQ status */ |
1fd7a697a sata_inic162x: fi... |
379 380 |
irq_stat = readb(port_base + PORT_IRQ_STAT); writeb(irq_stat, port_base + PORT_IRQ_STAT); |
3ad400a92 sata_inic162x: us... |
381 382 383 384 |
idma_stat = readw(port_base + PORT_IDMA_STAT); if (unlikely((irq_stat & PIRQ_ERR) || (idma_stat & IDMA_STAT_ERR))) inic_host_err_intr(ap, irq_stat, idma_stat); |
f8b0685a8 sata_inic162x: ki... |
385 |
if (unlikely(!qc)) |
3ad400a92 sata_inic162x: us... |
386 |
goto spurious; |
3ad400a92 sata_inic162x: us... |
387 |
|
b3f677e50 sata_inic162x: us... |
388 389 |
if (likely(idma_stat & IDMA_STAT_DONE)) { inic_stop_idma(ap); |
1fd7a697a sata_inic162x: fi... |
390 |
|
b3f677e50 sata_inic162x: us... |
391 392 393 394 395 396 |
/* Depending on circumstances, device error * isn't reported by IDMA, check it explicitly. */ if (unlikely(readb(port_base + PORT_TF_COMMAND) & (ATA_DF | ATA_ERR))) qc->err_mask |= AC_ERR_DEV; |
1fd7a697a sata_inic162x: fi... |
397 |
|
b3f677e50 sata_inic162x: us... |
398 399 |
ata_qc_complete(qc); return; |
1fd7a697a sata_inic162x: fi... |
400 |
} |
3ad400a92 sata_inic162x: us... |
401 |
spurious: |
a9a79dfec ata: Convert ata_... |
402 403 404 |
ata_port_warn(ap, "unhandled interrupt: cmd=0x%x irq_stat=0x%x idma_stat=0x%x ", qc ? qc->tf.command : 0xff, irq_stat, idma_stat); |
1fd7a697a sata_inic162x: fi... |
405 406 407 408 409 |
} static irqreturn_t inic_interrupt(int irq, void *dev_instance) { struct ata_host *host = dev_instance; |
ba66b242b sata_inic162x: ad... |
410 |
struct inic_host_priv *hpriv = host->private_data; |
1fd7a697a sata_inic162x: fi... |
411 |
u16 host_irq_stat; |
87c8b22be drivers/ata: Remo... |
412 |
int i, handled = 0; |
1fd7a697a sata_inic162x: fi... |
413 |
|
ba66b242b sata_inic162x: ad... |
414 |
host_irq_stat = readw(hpriv->mmio_base + HOST_IRQ_STAT); |
1fd7a697a sata_inic162x: fi... |
415 416 417 418 419 |
if (unlikely(!(host_irq_stat & HIRQ_GLOBAL))) goto out; spin_lock(&host->lock); |
3e4ec3443 libata: kill ATA_... |
420 421 422 |
for (i = 0; i < NR_PORTS; i++) if (host_irq_stat & (HIRQ_PORT0 << i)) { inic_host_intr(host->ports[i]); |
1fd7a697a sata_inic162x: fi... |
423 |
handled++; |
1fd7a697a sata_inic162x: fi... |
424 |
} |
1fd7a697a sata_inic162x: fi... |
425 426 427 428 429 430 |
spin_unlock(&host->lock); out: return IRQ_RETVAL(handled); } |
b3f677e50 sata_inic162x: us... |
431 432 433 434 435 436 437 438 439 440 441 442 |
static int inic_check_atapi_dma(struct ata_queued_cmd *qc) { /* For some reason ATAPI_PROT_DMA doesn't work for some * commands including writes and other misc ops. Use PIO * protocol instead, which BTW is driven by the DMA engine * anyway, so it shouldn't make much difference for native * SATA devices. */ if (atapi_cmd_type(qc->cdb[0]) == READ) return 0; return 1; } |
3ad400a92 sata_inic162x: us... |
443 444 445 446 |
static void inic_fill_sg(struct inic_prd *prd, struct ata_queued_cmd *qc) { struct scatterlist *sg; unsigned int si; |
049e8e049 sata_inic162x: us... |
447 |
u8 flags = 0; |
3ad400a92 sata_inic162x: us... |
448 449 450 |
if (qc->tf.flags & ATA_TFLAG_WRITE) flags |= PRD_WRITE; |
049e8e049 sata_inic162x: us... |
451 452 |
if (ata_is_dma(qc->tf.protocol)) flags |= PRD_DMA; |
3ad400a92 sata_inic162x: us... |
453 454 455 456 457 458 459 460 461 462 |
for_each_sg(qc->sg, sg, qc->n_elem, si) { prd->mad = cpu_to_le32(sg_dma_address(sg)); prd->len = cpu_to_le16(sg_dma_len(sg)); prd->flags = flags; prd++; } WARN_ON(!si); prd[-1].flags |= PRD_END; } |
95364f367 ata: make qc_prep... |
463 |
static enum ata_completion_errors inic_qc_prep(struct ata_queued_cmd *qc) |
3ad400a92 sata_inic162x: us... |
464 465 466 467 468 |
{ struct inic_port_priv *pp = qc->ap->private_data; struct inic_pkt *pkt = pp->pkt; struct inic_cpb *cpb = &pkt->cpb; struct inic_prd *prd = pkt->prd; |
049e8e049 sata_inic162x: us... |
469 470 |
bool is_atapi = ata_is_atapi(qc->tf.protocol); bool is_data = ata_is_data(qc->tf.protocol); |
b3f677e50 sata_inic162x: us... |
471 |
unsigned int cdb_len = 0; |
3ad400a92 sata_inic162x: us... |
472 473 474 |
VPRINTK("ENTER "); |
049e8e049 sata_inic162x: us... |
475 |
if (is_atapi) |
b3f677e50 sata_inic162x: us... |
476 |
cdb_len = qc->dev->cdb_len; |
3ad400a92 sata_inic162x: us... |
477 478 479 |
/* prepare packet, based on initio driver */ memset(pkt, 0, sizeof(struct inic_pkt)); |
049e8e049 sata_inic162x: us... |
480 |
cpb->ctl_flags = CPB_CTL_VALID | CPB_CTL_IEN; |
b3f677e50 sata_inic162x: us... |
481 |
if (is_atapi || is_data) |
049e8e049 sata_inic162x: us... |
482 |
cpb->ctl_flags |= CPB_CTL_DATA; |
3ad400a92 sata_inic162x: us... |
483 |
|
b3f677e50 sata_inic162x: us... |
484 |
cpb->len = cpu_to_le32(qc->nbytes + cdb_len); |
3ad400a92 sata_inic162x: us... |
485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 |
cpb->prd = cpu_to_le32(pp->pkt_dma + offsetof(struct inic_pkt, prd)); cpb->device = qc->tf.device; cpb->feature = qc->tf.feature; cpb->nsect = qc->tf.nsect; cpb->lbal = qc->tf.lbal; cpb->lbam = qc->tf.lbam; cpb->lbah = qc->tf.lbah; if (qc->tf.flags & ATA_TFLAG_LBA48) { cpb->hob_feature = qc->tf.hob_feature; cpb->hob_nsect = qc->tf.hob_nsect; cpb->hob_lbal = qc->tf.hob_lbal; cpb->hob_lbam = qc->tf.hob_lbam; cpb->hob_lbah = qc->tf.hob_lbah; } cpb->command = qc->tf.command; /* don't load ctl - dunno why. it's like that in the initio driver */ |
b3f677e50 sata_inic162x: us... |
504 505 506 507 508 509 510 511 512 513 514 |
/* setup PRD for CDB */ if (is_atapi) { memcpy(pkt->cdb, qc->cdb, ATAPI_CDB_LEN); prd->mad = cpu_to_le32(pp->pkt_dma + offsetof(struct inic_pkt, cdb)); prd->len = cpu_to_le16(cdb_len); prd->flags = PRD_CDB | PRD_WRITE; if (!is_data) prd->flags |= PRD_END; prd++; } |
3ad400a92 sata_inic162x: us... |
515 |
/* setup sg table */ |
049e8e049 sata_inic162x: us... |
516 517 |
if (is_data) inic_fill_sg(prd, qc); |
3ad400a92 sata_inic162x: us... |
518 519 |
pp->cpb_tbl[0] = pp->pkt_dma; |
95364f367 ata: make qc_prep... |
520 521 |
return AC_ERR_OK; |
3ad400a92 sata_inic162x: us... |
522 |
} |
1fd7a697a sata_inic162x: fi... |
523 524 525 |
static unsigned int inic_qc_issue(struct ata_queued_cmd *qc) { struct ata_port *ap = qc->ap; |
3ad400a92 sata_inic162x: us... |
526 |
void __iomem *port_base = inic_port_base(ap); |
1fd7a697a sata_inic162x: fi... |
527 |
|
b3f677e50 sata_inic162x: us... |
528 |
/* fire up the ADMA engine */ |
99580664a sata_inic162x: en... |
529 |
writew(HCTL_FTHD0 | HCTL_LEDEN, port_base + HOST_CTL); |
b3f677e50 sata_inic162x: us... |
530 531 |
writew(IDMA_CTL_GO, port_base + PORT_IDMA_CTL); writeb(0, port_base + PORT_CPB_PTQFIFO); |
1fd7a697a sata_inic162x: fi... |
532 |
|
b3f677e50 sata_inic162x: us... |
533 |
return 0; |
1fd7a697a sata_inic162x: fi... |
534 |
} |
364fac0e5 sata_inic162x: up... |
535 536 537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567 568 |
static void inic_tf_read(struct ata_port *ap, struct ata_taskfile *tf) { void __iomem *port_base = inic_port_base(ap); tf->feature = readb(port_base + PORT_TF_FEATURE); tf->nsect = readb(port_base + PORT_TF_NSECT); tf->lbal = readb(port_base + PORT_TF_LBAL); tf->lbam = readb(port_base + PORT_TF_LBAM); tf->lbah = readb(port_base + PORT_TF_LBAH); tf->device = readb(port_base + PORT_TF_DEVICE); tf->command = readb(port_base + PORT_TF_COMMAND); } static bool inic_qc_fill_rtf(struct ata_queued_cmd *qc) { struct ata_taskfile *rtf = &qc->result_tf; struct ata_taskfile tf; /* FIXME: Except for status and error, result TF access * doesn't work. I tried reading from BAR0/2, CPB and BAR5. * None works regardless of which command interface is used. * For now return true iff status indicates device error. * This means that we're reporting bogus sector for RW * failures. Eeekk.... */ inic_tf_read(qc->ap, &tf); if (!(tf.command & ATA_ERR)) return false; rtf->command = tf.command; rtf->feature = tf.feature; return true; } |
1fd7a697a sata_inic162x: fi... |
569 570 571 |
static void inic_freeze(struct ata_port *ap) { void __iomem *port_base = inic_port_base(ap); |
ab5b0235c sata_inic162x: ki... |
572 |
writeb(PIRQ_MASK_FREEZE, port_base + PORT_IRQ_MASK); |
1fd7a697a sata_inic162x: fi... |
573 |
writeb(0xff, port_base + PORT_IRQ_STAT); |
1fd7a697a sata_inic162x: fi... |
574 575 576 577 578 |
} static void inic_thaw(struct ata_port *ap) { void __iomem *port_base = inic_port_base(ap); |
1fd7a697a sata_inic162x: fi... |
579 |
writeb(0xff, port_base + PORT_IRQ_STAT); |
ab5b0235c sata_inic162x: ki... |
580 |
writeb(PIRQ_MASK_DEFAULT, port_base + PORT_IRQ_MASK); |
1fd7a697a sata_inic162x: fi... |
581 |
} |
364fac0e5 sata_inic162x: up... |
582 583 584 585 586 587 |
static int inic_check_ready(struct ata_link *link) { void __iomem *port_base = inic_port_base(link->ap); return ata_check_ready(readb(port_base + PORT_TF_COMMAND)); } |
1fd7a697a sata_inic162x: fi... |
588 589 590 591 |
/* * SRST and SControl hardreset don't give valid signature on this * controller. Only controller specific hardreset mechanism works. */ |
cc0680a58 libata-link: link... |
592 |
static int inic_hardreset(struct ata_link *link, unsigned int *class, |
d4b2bab4f libata: add deadl... |
593 |
unsigned long deadline) |
1fd7a697a sata_inic162x: fi... |
594 |
{ |
cc0680a58 libata-link: link... |
595 |
struct ata_port *ap = link->ap; |
1fd7a697a sata_inic162x: fi... |
596 597 |
void __iomem *port_base = inic_port_base(ap); void __iomem *idma_ctl = port_base + PORT_IDMA_CTL; |
cc0680a58 libata-link: link... |
598 |
const unsigned long *timing = sata_ehc_deb_timing(&link->eh_context); |
1fd7a697a sata_inic162x: fi... |
599 600 601 602 |
int rc; /* hammer it into sane state */ inic_reset_port(port_base); |
f8b0685a8 sata_inic162x: ki... |
603 |
writew(IDMA_CTL_RST_ATA, idma_ctl); |
1fd7a697a sata_inic162x: fi... |
604 |
readw(idma_ctl); /* flush */ |
97750cebb libata: add @ap t... |
605 |
ata_msleep(ap, 1); |
f8b0685a8 sata_inic162x: ki... |
606 |
writew(0, idma_ctl); |
1fd7a697a sata_inic162x: fi... |
607 |
|
cc0680a58 libata-link: link... |
608 |
rc = sata_link_resume(link, timing, deadline); |
1fd7a697a sata_inic162x: fi... |
609 |
if (rc) { |
a9a79dfec ata: Convert ata_... |
610 611 612 613 |
ata_link_warn(link, "failed to resume link after reset (errno=%d) ", rc); |
1fd7a697a sata_inic162x: fi... |
614 615 |
return rc; } |
1fd7a697a sata_inic162x: fi... |
616 |
*class = ATA_DEV_NONE; |
cc0680a58 libata-link: link... |
617 |
if (ata_link_online(link)) { |
1fd7a697a sata_inic162x: fi... |
618 |
struct ata_taskfile tf; |
705e76beb libata: restructu... |
619 |
/* wait for link to become ready */ |
364fac0e5 sata_inic162x: up... |
620 |
rc = ata_wait_after_reset(link, deadline, inic_check_ready); |
9b89391cc libata: improve 0... |
621 622 |
/* link occupied, -ENODEV too is an error */ if (rc) { |
a9a79dfec ata: Convert ata_... |
623 624 625 626 |
ata_link_warn(link, "device not ready after hardreset (errno=%d) ", rc); |
d4b2bab4f libata: add deadl... |
627 |
return rc; |
1fd7a697a sata_inic162x: fi... |
628 |
} |
364fac0e5 sata_inic162x: up... |
629 |
inic_tf_read(ap, &tf); |
1fd7a697a sata_inic162x: fi... |
630 |
*class = ata_dev_classify(&tf); |
1fd7a697a sata_inic162x: fi... |
631 632 633 634 635 636 637 638 |
} return 0; } static void inic_error_handler(struct ata_port *ap) { void __iomem *port_base = inic_port_base(ap); |
1fd7a697a sata_inic162x: fi... |
639 |
|
1fd7a697a sata_inic162x: fi... |
640 |
inic_reset_port(port_base); |
a1efdaba2 libata: make rese... |
641 |
ata_std_error_handler(ap); |
1fd7a697a sata_inic162x: fi... |
642 643 644 645 646 |
} static void inic_post_internal_cmd(struct ata_queued_cmd *qc) { /* make DMA engine forget about the failed command */ |
a51d644af libata: improve A... |
647 |
if (qc->flags & ATA_QCFLAG_FAILED) |
1fd7a697a sata_inic162x: fi... |
648 649 |
inic_reset_port(inic_port_base(qc->ap)); } |
1fd7a697a sata_inic162x: fi... |
650 651 652 |
static void init_port(struct ata_port *ap) { void __iomem *port_base = inic_port_base(ap); |
3ad400a92 sata_inic162x: us... |
653 |
struct inic_port_priv *pp = ap->private_data; |
1fd7a697a sata_inic162x: fi... |
654 |
|
3ad400a92 sata_inic162x: us... |
655 656 657 |
/* clear packet and CPB table */ memset(pp->pkt, 0, sizeof(struct inic_pkt)); memset(pp->cpb_tbl, 0, IDMA_CPB_TBL_SIZE); |
6bc0d390d sata_inic162x: ki... |
658 |
/* setup CPB lookup table addresses */ |
3ad400a92 sata_inic162x: us... |
659 |
writel(pp->cpb_tbl_dma, port_base + PORT_CPB_CPBLAR); |
1fd7a697a sata_inic162x: fi... |
660 661 662 663 664 665 666 667 668 669 |
} static int inic_port_resume(struct ata_port *ap) { init_port(ap); return 0; } static int inic_port_start(struct ata_port *ap) { |
3ad400a92 sata_inic162x: us... |
670 |
struct device *dev = ap->host->dev; |
1fd7a697a sata_inic162x: fi... |
671 |
struct inic_port_priv *pp; |
1fd7a697a sata_inic162x: fi... |
672 673 |
/* alloc and initialize private data */ |
3ad400a92 sata_inic162x: us... |
674 |
pp = devm_kzalloc(dev, sizeof(*pp), GFP_KERNEL); |
1fd7a697a sata_inic162x: fi... |
675 676 677 |
if (!pp) return -ENOMEM; ap->private_data = pp; |
1fd7a697a sata_inic162x: fi... |
678 |
/* Alloc resources */ |
3ad400a92 sata_inic162x: us... |
679 680 681 682 683 684 685 686 687 |
pp->pkt = dmam_alloc_coherent(dev, sizeof(struct inic_pkt), &pp->pkt_dma, GFP_KERNEL); if (!pp->pkt) return -ENOMEM; pp->cpb_tbl = dmam_alloc_coherent(dev, IDMA_CPB_TBL_SIZE, &pp->cpb_tbl_dma, GFP_KERNEL); if (!pp->cpb_tbl) return -ENOMEM; |
1fd7a697a sata_inic162x: fi... |
688 689 690 691 |
init_port(ap); return 0; } |
1fd7a697a sata_inic162x: fi... |
692 |
static struct ata_port_operations inic_port_ops = { |
f8b0685a8 sata_inic162x: ki... |
693 |
.inherits = &sata_port_ops, |
1fd7a697a sata_inic162x: fi... |
694 |
|
b3f677e50 sata_inic162x: us... |
695 |
.check_atapi_dma = inic_check_atapi_dma, |
3ad400a92 sata_inic162x: us... |
696 |
.qc_prep = inic_qc_prep, |
1fd7a697a sata_inic162x: fi... |
697 |
.qc_issue = inic_qc_issue, |
364fac0e5 sata_inic162x: up... |
698 |
.qc_fill_rtf = inic_qc_fill_rtf, |
1fd7a697a sata_inic162x: fi... |
699 700 701 |
.freeze = inic_freeze, .thaw = inic_thaw, |
a1efdaba2 libata: make rese... |
702 |
.hardreset = inic_hardreset, |
1fd7a697a sata_inic162x: fi... |
703 704 |
.error_handler = inic_error_handler, .post_internal_cmd = inic_post_internal_cmd, |
1fd7a697a sata_inic162x: fi... |
705 |
|
029cfd6b7 libata: implement... |
706 707 |
.scr_read = inic_scr_read, .scr_write = inic_scr_write, |
1fd7a697a sata_inic162x: fi... |
708 |
|
029cfd6b7 libata: implement... |
709 |
.port_resume = inic_port_resume, |
1fd7a697a sata_inic162x: fi... |
710 |
.port_start = inic_port_start, |
1fd7a697a sata_inic162x: fi... |
711 |
}; |
f356b0820 ata: declare ata_... |
712 |
static const struct ata_port_info inic_port_info = { |
1fd7a697a sata_inic162x: fi... |
713 |
.flags = ATA_FLAG_SATA | ATA_FLAG_PIO_DMA, |
14bdef982 [libata] convert ... |
714 715 |
.pio_mask = ATA_PIO4, .mwdma_mask = ATA_MWDMA2, |
bf6263a85 [libata] Use ATA_... |
716 |
.udma_mask = ATA_UDMA6, |
1fd7a697a sata_inic162x: fi... |
717 718 719 720 721 722 723 724 725 726 727 728 729 730 731 732 733 734 735 736 737 738 739 740 741 742 743 744 745 746 747 748 749 750 751 752 753 754 755 756 757 758 |
.port_ops = &inic_port_ops }; static int init_controller(void __iomem *mmio_base, u16 hctl) { int i; u16 val; hctl &= ~HCTL_KNOWN_BITS; /* Soft reset whole controller. Spec says reset duration is 3 * PCI clocks, be generous and give it 10ms. */ writew(hctl | HCTL_SOFTRST, mmio_base + HOST_CTL); readw(mmio_base + HOST_CTL); /* flush */ for (i = 0; i < 10; i++) { msleep(1); val = readw(mmio_base + HOST_CTL); if (!(val & HCTL_SOFTRST)) break; } if (val & HCTL_SOFTRST) return -EIO; /* mask all interrupts and reset ports */ for (i = 0; i < NR_PORTS; i++) { void __iomem *port_base = mmio_base + i * PORT_SIZE; writeb(0xff, port_base + PORT_IRQ_MASK); inic_reset_port(port_base); } /* port IRQ is masked now, unmask global IRQ */ writew(hctl & ~HCTL_IRQOFF, mmio_base + HOST_CTL); val = readw(mmio_base + HOST_IRQ_MASK); val &= ~(HIRQ_PORT0 | HIRQ_PORT1); writew(val, mmio_base + HOST_IRQ_MASK); return 0; } |
58eb8cd56 ata: use CONFIG_P... |
759 |
#ifdef CONFIG_PM_SLEEP |
1fd7a697a sata_inic162x: fi... |
760 761 |
static int inic_pci_device_resume(struct pci_dev *pdev) { |
0a86e1c85 ata: use pci_get_... |
762 |
struct ata_host *host = pci_get_drvdata(pdev); |
1fd7a697a sata_inic162x: fi... |
763 |
struct inic_host_priv *hpriv = host->private_data; |
1fd7a697a sata_inic162x: fi... |
764 |
int rc; |
5aea408df libata: handle at... |
765 766 767 |
rc = ata_pci_device_do_resume(pdev); if (rc) return rc; |
1fd7a697a sata_inic162x: fi... |
768 769 |
if (pdev->dev.power.power_state.event == PM_EVENT_SUSPEND) { |
ba66b242b sata_inic162x: ad... |
770 |
rc = init_controller(hpriv->mmio_base, hpriv->cached_hctl); |
1fd7a697a sata_inic162x: fi... |
771 772 773 774 775 776 777 778 |
if (rc) return rc; } ata_host_resume(host); return 0; } |
438ac6d5e libata: add missi... |
779 |
#endif |
1fd7a697a sata_inic162x: fi... |
780 781 782 |
static int inic_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) { |
4447d3515 libata: convert t... |
783 784 |
const struct ata_port_info *ppi[] = { &inic_port_info, NULL }; struct ata_host *host; |
1fd7a697a sata_inic162x: fi... |
785 |
struct inic_host_priv *hpriv; |
0d5ff5667 libata: convert t... |
786 |
void __iomem * const *iomap; |
ba66b242b sata_inic162x: ad... |
787 |
int mmio_bar; |
1fd7a697a sata_inic162x: fi... |
788 |
int i, rc; |
06296a1e6 ata: Add and use ... |
789 |
ata_print_version_once(&pdev->dev, DRV_VERSION); |
1fd7a697a sata_inic162x: fi... |
790 |
|
bb9696192 libata: make it c... |
791 792 |
dev_alert(&pdev->dev, "inic162x support is broken with common data corruption issues and will be disabled by default, contact linux-ide@vger.kernel.org if in production use "); |
4447d3515 libata: convert t... |
793 794 795 796 797 798 799 |
/* alloc host */ host = ata_host_alloc_pinfo(&pdev->dev, ppi, NR_PORTS); hpriv = devm_kzalloc(&pdev->dev, sizeof(*hpriv), GFP_KERNEL); if (!host || !hpriv) return -ENOMEM; host->private_data = hpriv; |
ba66b242b sata_inic162x: ad... |
800 801 802 |
/* Acquire resources and fill host. Note that PCI and cardbus * use different BARs. */ |
24dc5f33e libata: update li... |
803 |
rc = pcim_enable_device(pdev); |
1fd7a697a sata_inic162x: fi... |
804 805 |
if (rc) return rc; |
ba66b242b sata_inic162x: ad... |
806 807 808 809 810 811 |
if (pci_resource_flags(pdev, MMIO_BAR_PCI) & IORESOURCE_MEM) mmio_bar = MMIO_BAR_PCI; else mmio_bar = MMIO_BAR_CARDBUS; rc = pcim_iomap_regions(pdev, 1 << mmio_bar, DRV_NAME); |
0d5ff5667 libata: convert t... |
812 813 |
if (rc) return rc; |
4447d3515 libata: convert t... |
814 |
host->iomap = iomap = pcim_iomap_table(pdev); |
ba66b242b sata_inic162x: ad... |
815 816 |
hpriv->mmio_base = iomap[mmio_bar]; hpriv->cached_hctl = readw(hpriv->mmio_base + HOST_CTL); |
4447d3515 libata: convert t... |
817 818 |
for (i = 0; i < NR_PORTS; i++) { |
cbcdd8759 libata: implement... |
819 |
struct ata_port *ap = host->ports[i]; |
cbcdd8759 libata: implement... |
820 |
|
ba66b242b sata_inic162x: ad... |
821 822 |
ata_port_pbar_desc(ap, mmio_bar, -1, "mmio"); ata_port_pbar_desc(ap, mmio_bar, i * PORT_SIZE, "port"); |
4447d3515 libata: convert t... |
823 |
} |
1fd7a697a sata_inic162x: fi... |
824 |
/* Set dma_mask. This devices doesn't support 64bit addressing. */ |
b5e555561 libata: switch re... |
825 |
rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); |
1fd7a697a sata_inic162x: fi... |
826 |
if (rc) { |
a44fec1fc ata: Convert dev_... |
827 828 |
dev_err(&pdev->dev, "32-bit DMA enable failed "); |
24dc5f33e libata: update li... |
829 |
return rc; |
1fd7a697a sata_inic162x: fi... |
830 |
} |
ba66b242b sata_inic162x: ad... |
831 |
rc = init_controller(hpriv->mmio_base, hpriv->cached_hctl); |
1fd7a697a sata_inic162x: fi... |
832 |
if (rc) { |
a44fec1fc ata: Convert dev_... |
833 834 |
dev_err(&pdev->dev, "failed to initialize controller "); |
24dc5f33e libata: update li... |
835 |
return rc; |
1fd7a697a sata_inic162x: fi... |
836 837 838 |
} pci_set_master(pdev); |
4447d3515 libata: convert t... |
839 840 |
return ata_host_activate(host, pdev->irq, inic_interrupt, IRQF_SHARED, &inic_sht); |
1fd7a697a sata_inic162x: fi... |
841 842 843 844 845 846 847 848 849 850 |
} static const struct pci_device_id inic_pci_tbl[] = { { PCI_VDEVICE(INIT, 0x1622), }, { }, }; static struct pci_driver inic_pci_driver = { .name = DRV_NAME, .id_table = inic_pci_tbl, |
58eb8cd56 ata: use CONFIG_P... |
851 |
#ifdef CONFIG_PM_SLEEP |
1fd7a697a sata_inic162x: fi... |
852 853 |
.suspend = ata_pci_device_suspend, .resume = inic_pci_device_resume, |
438ac6d5e libata: add missi... |
854 |
#endif |
1fd7a697a sata_inic162x: fi... |
855 856 857 |
.probe = inic_init_one, .remove = ata_pci_remove_one, }; |
2fc75da0c ata: use module_p... |
858 |
module_pci_driver(inic_pci_driver); |
1fd7a697a sata_inic162x: fi... |
859 860 861 862 863 864 |
MODULE_AUTHOR("Tejun Heo"); MODULE_DESCRIPTION("low-level driver for Initio 162x SATA"); MODULE_LICENSE("GPL v2"); MODULE_DEVICE_TABLE(pci, inic_pci_tbl); MODULE_VERSION(DRV_VERSION); |