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drivers/ssb/main.c
30.4 KB
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/* * Sonics Silicon Backplane * Subsystem core * * Copyright 2005, Broadcom Corporation |
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* Copyright 2006, 2007, Michael Buesch <m@bues.ch> |
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* * Licensed under the GNU/GPL. See COPYING for details. */ #include "ssb_private.h" #include <linux/delay.h> |
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#include <linux/io.h> |
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#include <linux/module.h> |
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#include <linux/platform_device.h> |
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#include <linux/ssb/ssb.h> #include <linux/ssb/ssb_regs.h> |
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#include <linux/ssb/ssb_driver_gige.h> |
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#include <linux/dma-mapping.h> #include <linux/pci.h> |
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#include <linux/mmc/sdio_func.h> |
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#include <linux/slab.h> |
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#include <pcmcia/cistpl.h> #include <pcmcia/ds.h> MODULE_DESCRIPTION("Sonics Silicon Backplane driver"); MODULE_LICENSE("GPL"); /* Temporary list of yet-to-be-attached buses */ static LIST_HEAD(attach_queue); /* List if running buses */ static LIST_HEAD(buses); /* Software ID counter */ static unsigned int next_busnumber; /* buses_mutes locks the two buslists and the next_busnumber. * Don't lock this directly, but use ssb_buses_[un]lock() below. */ static DEFINE_MUTEX(buses_mutex); /* There are differences in the codeflow, if the bus is * initialized from early boot, as various needed services * are not available early. This is a mechanism to delay * these initializations to after early boot has finished. * It's also used to avoid mutex locking, as that's not * available and needed early. */ static bool ssb_is_early_boot = 1; static void ssb_buses_lock(void); static void ssb_buses_unlock(void); #ifdef CONFIG_SSB_PCIHOST struct ssb_bus *ssb_pci_dev_to_bus(struct pci_dev *pdev) { struct ssb_bus *bus; ssb_buses_lock(); list_for_each_entry(bus, &buses, list) { if (bus->bustype == SSB_BUSTYPE_PCI && bus->host_pci == pdev) goto found; } bus = NULL; found: ssb_buses_unlock(); return bus; } #endif /* CONFIG_SSB_PCIHOST */ |
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#ifdef CONFIG_SSB_PCMCIAHOST struct ssb_bus *ssb_pcmcia_dev_to_bus(struct pcmcia_device *pdev) { struct ssb_bus *bus; ssb_buses_lock(); list_for_each_entry(bus, &buses, list) { if (bus->bustype == SSB_BUSTYPE_PCMCIA && bus->host_pcmcia == pdev) goto found; } bus = NULL; found: ssb_buses_unlock(); return bus; } #endif /* CONFIG_SSB_PCMCIAHOST */ |
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int ssb_for_each_bus_call(unsigned long data, int (*func)(struct ssb_bus *bus, unsigned long data)) { struct ssb_bus *bus; int res; ssb_buses_lock(); list_for_each_entry(bus, &buses, list) { res = func(bus, data); if (res >= 0) { ssb_buses_unlock(); return res; } } ssb_buses_unlock(); return -ENODEV; } |
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static struct ssb_device *ssb_device_get(struct ssb_device *dev) { if (dev) get_device(dev->dev); return dev; } static void ssb_device_put(struct ssb_device *dev) { if (dev) put_device(dev->dev); } |
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static int ssb_device_resume(struct device *dev) { struct ssb_device *ssb_dev = dev_to_ssb_dev(dev); struct ssb_driver *ssb_drv; |
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int err = 0; |
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if (dev->driver) { ssb_drv = drv_to_ssb_drv(dev->driver); if (ssb_drv && ssb_drv->resume) err = ssb_drv->resume(ssb_dev); if (err) goto out; } out: return err; } |
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static int ssb_device_suspend(struct device *dev, pm_message_t state) { struct ssb_device *ssb_dev = dev_to_ssb_dev(dev); struct ssb_driver *ssb_drv; |
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int err = 0; if (dev->driver) { ssb_drv = drv_to_ssb_drv(dev->driver); if (ssb_drv && ssb_drv->suspend) err = ssb_drv->suspend(ssb_dev, state); if (err) goto out; } |
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out: return err; } |
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int ssb_bus_resume(struct ssb_bus *bus) { int err; /* Reset HW state information in memory, so that HW is * completely reinitialized. */ bus->mapped_device = NULL; #ifdef CONFIG_SSB_DRIVER_PCICORE bus->pcicore.setup_done = 0; #endif err = ssb_bus_powerup(bus, 0); if (err) return err; err = ssb_pcmcia_hardware_setup(bus); if (err) { ssb_bus_may_powerdown(bus); return err; |
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} |
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ssb_chipco_resume(&bus->chipco); ssb_bus_may_powerdown(bus); |
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return 0; } EXPORT_SYMBOL(ssb_bus_resume); int ssb_bus_suspend(struct ssb_bus *bus) { ssb_chipco_suspend(&bus->chipco); ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0); return 0; |
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} |
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EXPORT_SYMBOL(ssb_bus_suspend); |
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#ifdef CONFIG_SSB_SPROM |
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/** ssb_devices_freeze - Freeze all devices on the bus. * * After freezing no device driver will be handling a device * on this bus anymore. ssb_devices_thaw() must be called after * a successful freeze to reactivate the devices. * * @bus: The bus. * @ctx: Context structure. Pass this to ssb_devices_thaw(). */ int ssb_devices_freeze(struct ssb_bus *bus, struct ssb_freeze_context *ctx) |
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{ |
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struct ssb_device *sdev; struct ssb_driver *sdrv; unsigned int i; memset(ctx, 0, sizeof(*ctx)); ctx->bus = bus; |
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WARN_ON(bus->nr_devices > ARRAY_SIZE(ctx->device_frozen)); |
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for (i = 0; i < bus->nr_devices; i++) { |
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sdev = ssb_device_get(&bus->devices[i]); if (!sdev->dev || !sdev->dev->driver || !device_is_registered(sdev->dev)) { ssb_device_put(sdev); |
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continue; |
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} |
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sdrv = drv_to_ssb_drv(sdev->dev->driver); |
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if (WARN_ON(!sdrv->remove)) |
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continue; |
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sdrv->remove(sdev); ctx->device_frozen[i] = 1; |
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} return 0; |
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} |
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/** ssb_devices_thaw - Unfreeze all devices on the bus. * * This will re-attach the device drivers and re-init the devices. * * @ctx: The context structure from ssb_devices_freeze() */ int ssb_devices_thaw(struct ssb_freeze_context *ctx) |
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{ |
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struct ssb_bus *bus = ctx->bus; struct ssb_device *sdev; struct ssb_driver *sdrv; unsigned int i; int err, result = 0; |
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for (i = 0; i < bus->nr_devices; i++) { |
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if (!ctx->device_frozen[i]) |
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continue; |
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sdev = &bus->devices[i]; |
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if (WARN_ON(!sdev->dev || !sdev->dev->driver)) |
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continue; |
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sdrv = drv_to_ssb_drv(sdev->dev->driver); |
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if (WARN_ON(!sdrv || !sdrv->probe)) |
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continue; |
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err = sdrv->probe(sdev, &sdev->id); |
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if (err) { |
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dev_err(sdev->dev, "Failed to thaw device %s ", |
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dev_name(sdev->dev)); |
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result = err; |
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} |
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ssb_device_put(sdev); |
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} |
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return result; |
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} |
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#endif /* CONFIG_SSB_SPROM */ |
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static void ssb_device_shutdown(struct device *dev) { struct ssb_device *ssb_dev = dev_to_ssb_dev(dev); struct ssb_driver *ssb_drv; if (!dev->driver) return; ssb_drv = drv_to_ssb_drv(dev->driver); if (ssb_drv && ssb_drv->shutdown) ssb_drv->shutdown(ssb_dev); } static int ssb_device_remove(struct device *dev) { struct ssb_device *ssb_dev = dev_to_ssb_dev(dev); struct ssb_driver *ssb_drv = drv_to_ssb_drv(dev->driver); if (ssb_drv && ssb_drv->remove) ssb_drv->remove(ssb_dev); ssb_device_put(ssb_dev); return 0; } static int ssb_device_probe(struct device *dev) { struct ssb_device *ssb_dev = dev_to_ssb_dev(dev); struct ssb_driver *ssb_drv = drv_to_ssb_drv(dev->driver); int err = 0; ssb_device_get(ssb_dev); if (ssb_drv && ssb_drv->probe) err = ssb_drv->probe(ssb_dev, &ssb_dev->id); if (err) ssb_device_put(ssb_dev); return err; } static int ssb_match_devid(const struct ssb_device_id *tabid, const struct ssb_device_id *devid) { if ((tabid->vendor != devid->vendor) && tabid->vendor != SSB_ANY_VENDOR) return 0; if ((tabid->coreid != devid->coreid) && tabid->coreid != SSB_ANY_ID) return 0; if ((tabid->revision != devid->revision) && tabid->revision != SSB_ANY_REV) return 0; return 1; } static int ssb_bus_match(struct device *dev, struct device_driver *drv) { struct ssb_device *ssb_dev = dev_to_ssb_dev(dev); struct ssb_driver *ssb_drv = drv_to_ssb_drv(drv); const struct ssb_device_id *id; for (id = ssb_drv->id_table; id->vendor || id->coreid || id->revision; id++) { if (ssb_match_devid(id, &ssb_dev->id)) return 1; /* found */ } return 0; } |
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static int ssb_device_uevent(struct device *dev, struct kobj_uevent_env *env) |
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{ struct ssb_device *ssb_dev = dev_to_ssb_dev(dev); |
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if (!dev) return -ENODEV; |
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return add_uevent_var(env, |
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"MODALIAS=ssb:v%04Xid%04Xrev%02X", ssb_dev->id.vendor, ssb_dev->id.coreid, ssb_dev->id.revision); |
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} |
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#define ssb_config_attr(attrib, field, format_string) \ static ssize_t \ attrib##_show(struct device *dev, struct device_attribute *attr, char *buf) \ { \ return sprintf(buf, format_string, dev_to_ssb_dev(dev)->field); \ |
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} \ static DEVICE_ATTR_RO(attrib); |
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ssb_config_attr(core_num, core_index, "%u ") ssb_config_attr(coreid, id.coreid, "0x%04x ") ssb_config_attr(vendor, id.vendor, "0x%04x ") ssb_config_attr(revision, id.revision, "%u ") ssb_config_attr(irq, irq, "%u ") static ssize_t name_show(struct device *dev, struct device_attribute *attr, char *buf) { return sprintf(buf, "%s ", ssb_core_name(dev_to_ssb_dev(dev)->id.coreid)); } |
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static DEVICE_ATTR_RO(name); static struct attribute *ssb_device_attrs[] = { &dev_attr_name.attr, &dev_attr_core_num.attr, &dev_attr_coreid.attr, &dev_attr_vendor.attr, &dev_attr_revision.attr, &dev_attr_irq.attr, NULL, |
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}; |
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ATTRIBUTE_GROUPS(ssb_device); |
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static struct bus_type ssb_bustype = { .name = "ssb", .match = ssb_bus_match, .probe = ssb_device_probe, .remove = ssb_device_remove, .shutdown = ssb_device_shutdown, .suspend = ssb_device_suspend, .resume = ssb_device_resume, .uevent = ssb_device_uevent, |
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.dev_groups = ssb_device_groups, |
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}; static void ssb_buses_lock(void) { /* See the comment at the ssb_is_early_boot definition */ if (!ssb_is_early_boot) mutex_lock(&buses_mutex); } static void ssb_buses_unlock(void) { /* See the comment at the ssb_is_early_boot definition */ if (!ssb_is_early_boot) mutex_unlock(&buses_mutex); } static void ssb_devices_unregister(struct ssb_bus *bus) { struct ssb_device *sdev; int i; for (i = bus->nr_devices - 1; i >= 0; i--) { sdev = &(bus->devices[i]); if (sdev->dev) device_unregister(sdev->dev); } |
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#ifdef CONFIG_SSB_EMBEDDED if (bus->bustype == SSB_BUSTYPE_SSB) platform_device_unregister(bus->watchdog); #endif |
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} void ssb_bus_unregister(struct ssb_bus *bus) { |
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int err; err = ssb_gpio_unregister(bus); if (err == -EBUSY) |
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pr_debug("Some GPIOs are still in use "); |
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else if (err) |
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pr_debug("Can not unregister GPIO driver: %i ", err); |
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ssb_buses_lock(); ssb_devices_unregister(bus); list_del(&bus->list); ssb_buses_unlock(); |
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ssb_pcmcia_exit(bus); |
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ssb_pci_exit(bus); ssb_iounmap(bus); } EXPORT_SYMBOL(ssb_bus_unregister); static void ssb_release_dev(struct device *dev) { struct __ssb_dev_wrapper *devwrap; devwrap = container_of(dev, struct __ssb_dev_wrapper, dev); kfree(devwrap); } static int ssb_devices_register(struct ssb_bus *bus) { struct ssb_device *sdev; struct device *dev; struct __ssb_dev_wrapper *devwrap; int i, err = 0; int dev_idx = 0; for (i = 0; i < bus->nr_devices; i++) { sdev = &(bus->devices[i]); /* We don't register SSB-system devices to the kernel, * as the drivers for them are built into SSB. */ switch (sdev->id.coreid) { case SSB_DEV_CHIPCOMMON: case SSB_DEV_PCI: case SSB_DEV_PCIE: case SSB_DEV_PCMCIA: case SSB_DEV_MIPS: case SSB_DEV_MIPS_3302: case SSB_DEV_EXTIF: continue; } devwrap = kzalloc(sizeof(*devwrap), GFP_KERNEL); if (!devwrap) { |
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err = -ENOMEM; goto error; } dev = &devwrap->dev; devwrap->sdev = sdev; dev->release = ssb_release_dev; dev->bus = &ssb_bustype; |
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dev_set_name(dev, "ssb%u:%d", bus->busnumber, dev_idx); |
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switch (bus->bustype) { case SSB_BUSTYPE_PCI: #ifdef CONFIG_SSB_PCIHOST sdev->irq = bus->host_pci->irq; dev->parent = &bus->host_pci->dev; |
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sdev->dma_dev = dev->parent; |
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#endif break; case SSB_BUSTYPE_PCMCIA: #ifdef CONFIG_SSB_PCMCIAHOST |
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sdev->irq = bus->host_pcmcia->irq; |
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dev->parent = &bus->host_pcmcia->dev; #endif break; |
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case SSB_BUSTYPE_SDIO: |
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#ifdef CONFIG_SSB_SDIOHOST |
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dev->parent = &bus->host_sdio->dev; #endif break; |
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case SSB_BUSTYPE_SSB: |
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dev->dma_mask = &dev->coherent_dma_mask; |
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sdev->dma_dev = dev; |
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break; } sdev->dev = dev; err = device_register(dev); if (err) { |
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pr_err("Could not register %s ", dev_name(dev)); |
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/* Set dev to NULL to not unregister * dev on error unwinding. */ sdev->dev = NULL; |
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put_device(dev); |
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goto error; } dev_idx++; } |
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#ifdef CONFIG_SSB_DRIVER_MIPS if (bus->mipscore.pflash.present) { err = platform_device_register(&ssb_pflash_dev); if (err) pr_err("Error registering parallel flash "); } #endif |
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#ifdef CONFIG_SSB_SFLASH if (bus->mipscore.sflash.present) { err = platform_device_register(&ssb_sflash_dev); if (err) pr_err("Error registering serial flash "); } #endif |
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return 0; error: /* Unwind the already registered devices. */ ssb_devices_unregister(bus); return err; } /* Needs ssb_buses_lock() */ |
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static int ssb_attach_queued_buses(void) |
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{ struct ssb_bus *bus, *n; int err = 0; int drop_them_all = 0; list_for_each_entry_safe(bus, n, &attach_queue, list) { if (drop_them_all) { list_del(&bus->list); continue; } /* Can't init the PCIcore in ssb_bus_register(), as that * is too early in boot for embedded systems * (no udelay() available). So do it here in attach stage. */ err = ssb_bus_powerup(bus, 0); if (err) goto error; ssb_pcicore_init(&bus->pcicore); |
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if (bus->bustype == SSB_BUSTYPE_SSB) ssb_watchdog_register(bus); |
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err = ssb_gpio_init(bus); if (err == -ENOTSUPP) |
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pr_debug("GPIO driver not activated "); |
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else if (err) |
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pr_debug("Error registering GPIO driver: %i ", err); |
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ssb_bus_may_powerdown(bus); err = ssb_devices_register(bus); error: if (err) { drop_them_all = 1; list_del(&bus->list); continue; } list_move_tail(&bus->list, &buses); } return err; } |
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static int ssb_fetch_invariants(struct ssb_bus *bus, ssb_invariants_func_t get_invariants) { struct ssb_init_invariants iv; int err; memset(&iv, 0, sizeof(iv)); err = get_invariants(bus, &iv); if (err) goto out; memcpy(&bus->boardinfo, &iv.boardinfo, sizeof(iv.boardinfo)); memcpy(&bus->sprom, &iv.sprom, sizeof(iv.sprom)); |
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bus->has_cardbus_slot = iv.has_cardbus_slot; |
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out: return err; } |
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static int __maybe_unused ssb_bus_register(struct ssb_bus *bus, ssb_invariants_func_t get_invariants, unsigned long baseaddr) |
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{ int err; spin_lock_init(&bus->bar_lock); INIT_LIST_HEAD(&bus->list); |
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#ifdef CONFIG_SSB_EMBEDDED spin_lock_init(&bus->gpio_lock); #endif |
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/* Powerup the bus */ err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1); if (err) goto out; |
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/* Init SDIO-host device (if any), before the scan */ err = ssb_sdio_init(bus); if (err) goto err_disable_xtal; |
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ssb_buses_lock(); bus->busnumber = next_busnumber; /* Scan for devices (cores) */ err = ssb_bus_scan(bus, baseaddr); if (err) |
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goto err_sdio_exit; |
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/* Init PCI-host device (if any) */ err = ssb_pci_init(bus); if (err) goto err_unmap; /* Init PCMCIA-host device (if any) */ err = ssb_pcmcia_init(bus); if (err) goto err_pci_exit; /* Initialize basic system devices (if available) */ err = ssb_bus_powerup(bus, 0); if (err) goto err_pcmcia_exit; ssb_chipcommon_init(&bus->chipco); |
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ssb_extif_init(&bus->extif); |
61e115a56
|
656 657 658 659 660 661 662 663 664 665 666 667 668 669 670 671 672 673 674 675 676 677 678 679 680 681 |
ssb_mipscore_init(&bus->mipscore); err = ssb_fetch_invariants(bus, get_invariants); if (err) { ssb_bus_may_powerdown(bus); goto err_pcmcia_exit; } ssb_bus_may_powerdown(bus); /* Queue it for attach. * See the comment at the ssb_is_early_boot definition. */ list_add_tail(&bus->list, &attach_queue); if (!ssb_is_early_boot) { /* This is not early boot, so we must attach the bus now */ err = ssb_attach_queued_buses(); if (err) goto err_dequeue; } next_busnumber++; ssb_buses_unlock(); out: return err; err_dequeue: list_del(&bus->list); err_pcmcia_exit: |
e7ec2e323
|
682 |
ssb_pcmcia_exit(bus); |
61e115a56
|
683 684 685 686 |
err_pci_exit: ssb_pci_exit(bus); err_unmap: ssb_iounmap(bus); |
24ea602e1
|
687 688 |
err_sdio_exit: ssb_sdio_exit(bus); |
61e115a56
|
689 690 691 692 693 694 695 |
err_disable_xtal: ssb_buses_unlock(); ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0); return err; } #ifdef CONFIG_SSB_PCIHOST |
163247c1d
|
696 |
int ssb_bus_pcibus_register(struct ssb_bus *bus, struct pci_dev *host_pci) |
61e115a56
|
697 698 699 700 701 702 703 704 705 |
{ int err; bus->bustype = SSB_BUSTYPE_PCI; bus->host_pci = host_pci; bus->ops = &ssb_pci_ops; err = ssb_bus_register(bus, ssb_pci_get_invariants, 0); if (!err) { |
b8b6069cf
|
706 707 708 |
dev_info(&host_pci->dev, "Sonics Silicon Backplane found on PCI device %s ", |
33a606ac8
|
709 |
dev_name(&host_pci->dev)); |
ce9626eae
|
710 |
} else { |
b8b6069cf
|
711 712 713 |
dev_err(&host_pci->dev, "Failed to register PCI version of SSB with error %d ", |
33a606ac8
|
714 |
err); |
61e115a56
|
715 716 717 718 |
} return err; } |
61e115a56
|
719 720 721 |
#endif /* CONFIG_SSB_PCIHOST */ #ifdef CONFIG_SSB_PCMCIAHOST |
163247c1d
|
722 723 724 |
int ssb_bus_pcmciabus_register(struct ssb_bus *bus, struct pcmcia_device *pcmcia_dev, unsigned long baseaddr) |
61e115a56
|
725 726 727 728 729 730 731 732 733 |
{ int err; bus->bustype = SSB_BUSTYPE_PCMCIA; bus->host_pcmcia = pcmcia_dev; bus->ops = &ssb_pcmcia_ops; err = ssb_bus_register(bus, ssb_pcmcia_get_invariants, baseaddr); if (!err) { |
b8b6069cf
|
734 735 736 |
dev_info(&pcmcia_dev->dev, "Sonics Silicon Backplane found on PCMCIA device %s ", |
33a606ac8
|
737 |
pcmcia_dev->devname); |
61e115a56
|
738 739 740 741 |
} return err; } |
61e115a56
|
742 |
#endif /* CONFIG_SSB_PCMCIAHOST */ |
24ea602e1
|
743 |
#ifdef CONFIG_SSB_SDIOHOST |
163247c1d
|
744 745 |
int ssb_bus_sdiobus_register(struct ssb_bus *bus, struct sdio_func *func, unsigned int quirks) |
24ea602e1
|
746 747 748 749 750 751 752 753 754 755 |
{ int err; bus->bustype = SSB_BUSTYPE_SDIO; bus->host_sdio = func; bus->ops = &ssb_sdio_ops; bus->quirks = quirks; err = ssb_bus_register(bus, ssb_sdio_get_invariants, ~0); if (!err) { |
b8b6069cf
|
756 757 758 |
dev_info(&func->dev, "Sonics Silicon Backplane found on SDIO device %s ", |
33a606ac8
|
759 |
sdio_func_id(func)); |
24ea602e1
|
760 761 762 763 764 765 |
} return err; } EXPORT_SYMBOL(ssb_bus_sdiobus_register); #endif /* CONFIG_SSB_PCMCIAHOST */ |
845da6e58
|
766 |
#ifdef CONFIG_SSB_HOST_SOC |
541c9a84c
|
767 |
int ssb_bus_host_soc_register(struct ssb_bus *bus, unsigned long baseaddr) |
61e115a56
|
768 769 770 771 |
{ int err; bus->bustype = SSB_BUSTYPE_SSB; |
830c7df46
|
772 |
bus->ops = &ssb_host_soc_ops; |
61e115a56
|
773 |
|
541c9a84c
|
774 |
err = ssb_bus_register(bus, ssb_host_soc_get_invariants, baseaddr); |
61e115a56
|
775 |
if (!err) { |
b8b6069cf
|
776 777 778 |
pr_info("Sonics Silicon Backplane found at address 0x%08lX ", baseaddr); |
61e115a56
|
779 780 781 782 |
} return err; } |
845da6e58
|
783 |
#endif |
61e115a56
|
784 785 786 787 788 789 790 791 792 793 794 795 796 797 798 799 800 801 802 803 804 805 806 807 808 809 810 811 812 813 814 815 816 817 818 819 820 821 822 823 824 825 826 827 828 829 830 831 832 833 834 835 836 837 838 839 840 841 842 843 844 845 846 847 848 849 |
int __ssb_driver_register(struct ssb_driver *drv, struct module *owner) { drv->drv.name = drv->name; drv->drv.bus = &ssb_bustype; drv->drv.owner = owner; return driver_register(&drv->drv); } EXPORT_SYMBOL(__ssb_driver_register); void ssb_driver_unregister(struct ssb_driver *drv) { driver_unregister(&drv->drv); } EXPORT_SYMBOL(ssb_driver_unregister); void ssb_set_devtypedata(struct ssb_device *dev, void *data) { struct ssb_bus *bus = dev->bus; struct ssb_device *ent; int i; for (i = 0; i < bus->nr_devices; i++) { ent = &(bus->devices[i]); if (ent->id.vendor != dev->id.vendor) continue; if (ent->id.coreid != dev->id.coreid) continue; ent->devtypedata = data; } } EXPORT_SYMBOL(ssb_set_devtypedata); static u32 clkfactor_f6_resolve(u32 v) { /* map the magic values */ switch (v) { case SSB_CHIPCO_CLK_F6_2: return 2; case SSB_CHIPCO_CLK_F6_3: return 3; case SSB_CHIPCO_CLK_F6_4: return 4; case SSB_CHIPCO_CLK_F6_5: return 5; case SSB_CHIPCO_CLK_F6_6: return 6; case SSB_CHIPCO_CLK_F6_7: return 7; } return 0; } /* Calculate the speed the backplane would run at a given set of clockcontrol values */ u32 ssb_calc_clock_rate(u32 plltype, u32 n, u32 m) { u32 n1, n2, clock, m1, m2, m3, mc; n1 = (n & SSB_CHIPCO_CLK_N1); n2 = ((n & SSB_CHIPCO_CLK_N2) >> SSB_CHIPCO_CLK_N2_SHIFT); switch (plltype) { case SSB_PLLTYPE_6: /* 100/200 or 120/240 only */ if (m & SSB_CHIPCO_CLK_T6_MMASK) |
e913d4683
|
850 851 |
return SSB_CHIPCO_CLK_T6_M1; return SSB_CHIPCO_CLK_T6_M0; |
61e115a56
|
852 853 854 855 856 857 858 859 860 861 |
case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */ case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */ case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */ case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */ n1 = clkfactor_f6_resolve(n1); n2 += SSB_CHIPCO_CLK_F5_BIAS; break; case SSB_PLLTYPE_2: /* 48Mhz, 4 dividers */ n1 += SSB_CHIPCO_CLK_T2_BIAS; n2 += SSB_CHIPCO_CLK_T2_BIAS; |
209b43759
|
862 863 |
WARN_ON(!((n1 >= 2) && (n1 <= 7))); WARN_ON(!((n2 >= 5) && (n2 <= 23))); |
61e115a56
|
864 865 866 867 |
break; case SSB_PLLTYPE_5: /* 25Mhz, 4 dividers */ return 100000000; default: |
209b43759
|
868 |
WARN_ON(1); |
61e115a56
|
869 870 871 872 873 874 875 876 877 878 879 880 881 882 883 884 885 886 887 888 889 890 891 892 893 894 895 896 897 898 899 900 901 902 903 904 905 906 907 908 909 910 911 912 913 914 915 916 |
} switch (plltype) { case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */ case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */ clock = SSB_CHIPCO_CLK_BASE2 * n1 * n2; break; default: clock = SSB_CHIPCO_CLK_BASE1 * n1 * n2; } if (!clock) return 0; m1 = (m & SSB_CHIPCO_CLK_M1); m2 = ((m & SSB_CHIPCO_CLK_M2) >> SSB_CHIPCO_CLK_M2_SHIFT); m3 = ((m & SSB_CHIPCO_CLK_M3) >> SSB_CHIPCO_CLK_M3_SHIFT); mc = ((m & SSB_CHIPCO_CLK_MC) >> SSB_CHIPCO_CLK_MC_SHIFT); switch (plltype) { case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */ case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */ case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */ case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */ m1 = clkfactor_f6_resolve(m1); if ((plltype == SSB_PLLTYPE_1) || (plltype == SSB_PLLTYPE_3)) m2 += SSB_CHIPCO_CLK_F5_BIAS; else m2 = clkfactor_f6_resolve(m2); m3 = clkfactor_f6_resolve(m3); switch (mc) { case SSB_CHIPCO_CLK_MC_BYPASS: return clock; case SSB_CHIPCO_CLK_MC_M1: return (clock / m1); case SSB_CHIPCO_CLK_MC_M1M2: return (clock / (m1 * m2)); case SSB_CHIPCO_CLK_MC_M1M2M3: return (clock / (m1 * m2 * m3)); case SSB_CHIPCO_CLK_MC_M1M3: return (clock / (m1 * m3)); } return 0; case SSB_PLLTYPE_2: m1 += SSB_CHIPCO_CLK_T2_BIAS; m2 += SSB_CHIPCO_CLK_T2M2_BIAS; m3 += SSB_CHIPCO_CLK_T2_BIAS; |
209b43759
|
917 918 919 |
WARN_ON(!((m1 >= 2) && (m1 <= 7))); WARN_ON(!((m2 >= 3) && (m2 <= 10))); WARN_ON(!((m3 >= 2) && (m3 <= 7))); |
61e115a56
|
920 921 922 923 924 925 926 927 928 |
if (!(mc & SSB_CHIPCO_CLK_T2MC_M1BYP)) clock /= m1; if (!(mc & SSB_CHIPCO_CLK_T2MC_M2BYP)) clock /= m2; if (!(mc & SSB_CHIPCO_CLK_T2MC_M3BYP)) clock /= m3; return clock; default: |
209b43759
|
929 |
WARN_ON(1); |
61e115a56
|
930 931 932 933 934 935 936 937 938 939 |
} return 0; } /* Get the current speed the backplane is running at */ u32 ssb_clockspeed(struct ssb_bus *bus) { u32 rate; u32 plltype; u32 clkctl_n, clkctl_m; |
d486a5b49
|
940 941 |
if (bus->chipco.capabilities & SSB_CHIPCO_CAP_PMU) return ssb_pmu_get_controlclock(&bus->chipco); |
61e115a56
|
942 943 944 945 946 947 948 949 950 951 952 953 954 955 956 957 958 959 960 961 962 963 964 |
if (ssb_extif_available(&bus->extif)) ssb_extif_get_clockcontrol(&bus->extif, &plltype, &clkctl_n, &clkctl_m); else if (bus->chipco.dev) ssb_chipco_get_clockcontrol(&bus->chipco, &plltype, &clkctl_n, &clkctl_m); else return 0; if (bus->chip_id == 0x5365) { rate = 100000000; } else { rate = ssb_calc_clock_rate(plltype, clkctl_n, clkctl_m); if (plltype == SSB_PLLTYPE_3) /* 25Mhz, 2 dividers */ rate /= 2; } return rate; } EXPORT_SYMBOL(ssb_clockspeed); static u32 ssb_tmslow_reject_bitmask(struct ssb_device *dev) { |
c272ef440
|
965 |
u32 rev = ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_SSBREV; |
04ad1fb26
|
966 |
/* The REJECT bit seems to be different for Backplane rev 2.3 */ |
c272ef440
|
967 |
switch (rev) { |
61e115a56
|
968 |
case SSB_IDLOW_SSBREV_22: |
04ad1fb26
|
969 970 971 |
case SSB_IDLOW_SSBREV_24: case SSB_IDLOW_SSBREV_26: return SSB_TMSLOW_REJECT; |
61e115a56
|
972 973 |
case SSB_IDLOW_SSBREV_23: return SSB_TMSLOW_REJECT_23; |
04ad1fb26
|
974 |
case SSB_IDLOW_SSBREV_25: /* TODO - find the proper REJECT bit */ |
c272ef440
|
975 |
case SSB_IDLOW_SSBREV_27: /* same here */ |
04ad1fb26
|
976 |
return SSB_TMSLOW_REJECT; /* this is a guess */ |
16f7031ae
|
977 978 |
case SSB_IDLOW_SSBREV: break; |
61e115a56
|
979 |
default: |
6cdd6400b
|
980 981 |
WARN(1, KERN_INFO "ssb: Backplane Revision 0x%.8X ", rev); |
61e115a56
|
982 |
} |
04ad1fb26
|
983 |
return (SSB_TMSLOW_REJECT | SSB_TMSLOW_REJECT_23); |
61e115a56
|
984 985 986 987 988 989 990 991 992 993 994 995 996 997 998 999 1000 1001 1002 1003 1004 1005 1006 1007 1008 1009 1010 1011 1012 1013 1014 1015 1016 1017 1018 1019 1020 1021 1022 1023 1024 1025 1026 1027 1028 1029 1030 1031 1032 1033 1034 1035 1036 1037 1038 1039 1040 |
} int ssb_device_is_enabled(struct ssb_device *dev) { u32 val; u32 reject; reject = ssb_tmslow_reject_bitmask(dev); val = ssb_read32(dev, SSB_TMSLOW); val &= SSB_TMSLOW_CLOCK | SSB_TMSLOW_RESET | reject; return (val == SSB_TMSLOW_CLOCK); } EXPORT_SYMBOL(ssb_device_is_enabled); static void ssb_flush_tmslow(struct ssb_device *dev) { /* Make _really_ sure the device has finished the TMSLOW * register write transaction, as we risk running into * a machine check exception otherwise. * Do this by reading the register back to commit the * PCI write and delay an additional usec for the device * to react to the change. */ ssb_read32(dev, SSB_TMSLOW); udelay(1); } void ssb_device_enable(struct ssb_device *dev, u32 core_specific_flags) { u32 val; ssb_device_disable(dev, core_specific_flags); ssb_write32(dev, SSB_TMSLOW, SSB_TMSLOW_RESET | SSB_TMSLOW_CLOCK | SSB_TMSLOW_FGC | core_specific_flags); ssb_flush_tmslow(dev); /* Clear SERR if set. This is a hw bug workaround. */ if (ssb_read32(dev, SSB_TMSHIGH) & SSB_TMSHIGH_SERR) ssb_write32(dev, SSB_TMSHIGH, 0); val = ssb_read32(dev, SSB_IMSTATE); if (val & (SSB_IMSTATE_IBE | SSB_IMSTATE_TO)) { val &= ~(SSB_IMSTATE_IBE | SSB_IMSTATE_TO); ssb_write32(dev, SSB_IMSTATE, val); } ssb_write32(dev, SSB_TMSLOW, SSB_TMSLOW_CLOCK | SSB_TMSLOW_FGC | core_specific_flags); ssb_flush_tmslow(dev); ssb_write32(dev, SSB_TMSLOW, SSB_TMSLOW_CLOCK | core_specific_flags); ssb_flush_tmslow(dev); } EXPORT_SYMBOL(ssb_device_enable); |
8c68bd401
|
1041 |
/* Wait for bitmask in a register to get set or cleared. |
61e115a56
|
1042 |
* timeout is in units of ten-microseconds */ |
8c68bd401
|
1043 1044 |
static int ssb_wait_bits(struct ssb_device *dev, u16 reg, u32 bitmask, int timeout, int set) |
61e115a56
|
1045 1046 1047 1048 1049 1050 1051 |
{ int i; u32 val; for (i = 0; i < timeout; i++) { val = ssb_read32(dev, reg); if (set) { |
8c68bd401
|
1052 |
if ((val & bitmask) == bitmask) |
61e115a56
|
1053 1054 1055 1056 1057 1058 1059 |
return 0; } else { if (!(val & bitmask)) return 0; } udelay(10); } |
b8b6069cf
|
1060 1061 1062 1063 |
dev_err(dev->dev, "Timeout waiting for bitmask %08X on register %04X to %s ", bitmask, reg, set ? "set" : "clear"); |
61e115a56
|
1064 1065 1066 1067 1068 1069 |
return -ETIMEDOUT; } void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags) { |
b1a1bcf71
|
1070 |
u32 reject, val; |
61e115a56
|
1071 1072 1073 1074 1075 |
if (ssb_read32(dev, SSB_TMSLOW) & SSB_TMSLOW_RESET) return; reject = ssb_tmslow_reject_bitmask(dev); |
b1a1bcf71
|
1076 |
|
011d18350
|
1077 1078 1079 1080 1081 1082 1083 1084 1085 1086 1087 1088 |
if (ssb_read32(dev, SSB_TMSLOW) & SSB_TMSLOW_CLOCK) { ssb_write32(dev, SSB_TMSLOW, reject | SSB_TMSLOW_CLOCK); ssb_wait_bits(dev, SSB_TMSLOW, reject, 1000, 1); ssb_wait_bits(dev, SSB_TMSHIGH, SSB_TMSHIGH_BUSY, 1000, 0); if (ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_INITIATOR) { val = ssb_read32(dev, SSB_IMSTATE); val |= SSB_IMSTATE_REJECT; ssb_write32(dev, SSB_IMSTATE, val); ssb_wait_bits(dev, SSB_IMSTATE, SSB_IMSTATE_BUSY, 1000, 0); } |
b1a1bcf71
|
1089 |
|
011d18350
|
1090 1091 1092 1093 1094 |
ssb_write32(dev, SSB_TMSLOW, SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK | reject | SSB_TMSLOW_RESET | core_specific_flags); ssb_flush_tmslow(dev); |
61e115a56
|
1095 |
|
011d18350
|
1096 1097 1098 1099 1100 |
if (ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_INITIATOR) { val = ssb_read32(dev, SSB_IMSTATE); val &= ~SSB_IMSTATE_REJECT; ssb_write32(dev, SSB_IMSTATE, val); } |
b1a1bcf71
|
1101 |
} |
61e115a56
|
1102 1103 1104 1105 1106 1107 |
ssb_write32(dev, SSB_TMSLOW, reject | SSB_TMSLOW_RESET | core_specific_flags); ssb_flush_tmslow(dev); } EXPORT_SYMBOL(ssb_device_disable); |
04023afcc
|
1108 1109 1110 1111 1112 1113 1114 1115 1116 |
/* Some chipsets need routing known for PCIe and 64-bit DMA */ static bool ssb_dma_translation_special_bit(struct ssb_device *dev) { u16 chip_id = dev->bus->chip_id; if (dev->id.coreid == SSB_DEV_80211) { return (chip_id == 0x4322 || chip_id == 43221 || chip_id == 43231 || chip_id == 43222); } |
bd42cd022
|
1117 |
return false; |
04023afcc
|
1118 |
} |
61e115a56
|
1119 1120 1121 1122 1123 1124 |
u32 ssb_dma_translation(struct ssb_device *dev) { switch (dev->bus->bustype) { case SSB_BUSTYPE_SSB: return 0; case SSB_BUSTYPE_PCI: |
04023afcc
|
1125 1126 |
if (pci_is_pcie(dev->bus->host_pci) && ssb_read32(dev, SSB_TMSHIGH) & SSB_TMSHIGH_DMA64) { |
a9770a815
|
1127 |
return SSB_PCIE_DMA_H32; |
04023afcc
|
1128 1129 1130 1131 1132 1133 |
} else { if (ssb_dma_translation_special_bit(dev)) return SSB_PCIE_DMA_H32; else return SSB_PCI_DMA; } |
f225763a7
|
1134 1135 |
default: __ssb_dma_not_implemented(dev); |
61e115a56
|
1136 1137 1138 1139 |
} return 0; } EXPORT_SYMBOL(ssb_dma_translation); |
61e115a56
|
1140 1141 1142 1143 1144 1145 1146 1147 1148 1149 1150 1151 |
int ssb_bus_may_powerdown(struct ssb_bus *bus) { struct ssb_chipcommon *cc; int err = 0; /* On buses where more than one core may be working * at a time, we must not powerdown stuff if there are * still cores that may want to run. */ if (bus->bustype == SSB_BUSTYPE_SSB) goto out; cc = &bus->chipco; |
881400a20
|
1152 1153 1154 1155 1156 |
if (!cc->dev) goto out; if (cc->dev->id.revision < 5) goto out; |
61e115a56
|
1157 1158 1159 1160 1161 |
ssb_chipco_set_clockmode(cc, SSB_CLKMODE_SLOW); err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0); if (err) goto error; out: |
61e115a56
|
1162 |
bus->powered_up = 0; |
61e115a56
|
1163 1164 |
return err; error: |
b8b6069cf
|
1165 1166 |
pr_err("Bus powerdown failed "); |
61e115a56
|
1167 1168 1169 1170 1171 1172 |
goto out; } EXPORT_SYMBOL(ssb_bus_may_powerdown); int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl) { |
61e115a56
|
1173 1174 1175 1176 1177 1178 |
int err; enum ssb_clkmode mode; err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1); if (err) goto error; |
61e115a56
|
1179 |
|
61e115a56
|
1180 |
bus->powered_up = 1; |
a6ef81438
|
1181 1182 1183 |
mode = dynamic_pctl ? SSB_CLKMODE_DYNAMIC : SSB_CLKMODE_FAST; ssb_chipco_set_clockmode(&bus->chipco, mode); |
61e115a56
|
1184 1185 |
return 0; error: |
b8b6069cf
|
1186 1187 |
pr_err("Bus powerup failed "); |
61e115a56
|
1188 1189 1190 |
return err; } EXPORT_SYMBOL(ssb_bus_powerup); |
8576f815d
|
1191 1192 1193 |
static void ssb_broadcast_value(struct ssb_device *dev, u32 address, u32 data) { |
1159024d4
|
1194 |
#ifdef CONFIG_SSB_DRIVER_PCICORE |
8576f815d
|
1195 1196 1197 |
/* This is used for both, PCI and ChipCommon core, so be careful. */ BUILD_BUG_ON(SSB_PCICORE_BCAST_ADDR != SSB_CHIPCO_BCAST_ADDR); BUILD_BUG_ON(SSB_PCICORE_BCAST_DATA != SSB_CHIPCO_BCAST_DATA); |
1159024d4
|
1198 |
#endif |
8576f815d
|
1199 |
|
1159024d4
|
1200 1201 1202 1203 |
ssb_write32(dev, SSB_CHIPCO_BCAST_ADDR, address); ssb_read32(dev, SSB_CHIPCO_BCAST_ADDR); /* flush */ ssb_write32(dev, SSB_CHIPCO_BCAST_DATA, data); ssb_read32(dev, SSB_CHIPCO_BCAST_DATA); /* flush */ |
8576f815d
|
1204 1205 1206 1207 1208 |
} void ssb_commit_settings(struct ssb_bus *bus) { struct ssb_device *dev; |
1159024d4
|
1209 |
#ifdef CONFIG_SSB_DRIVER_PCICORE |
8576f815d
|
1210 |
dev = bus->chipco.dev ? bus->chipco.dev : bus->pcicore.dev; |
1159024d4
|
1211 1212 1213 |
#else dev = bus->chipco.dev; #endif |
8576f815d
|
1214 1215 1216 1217 1218 1219 |
if (WARN_ON(!dev)) return; /* This forces an update of the cached registers. */ ssb_broadcast_value(dev, 0xFD8, 0); } EXPORT_SYMBOL(ssb_commit_settings); |
61e115a56
|
1220 1221 1222 1223 1224 1225 1226 1227 1228 |
u32 ssb_admatch_base(u32 adm) { u32 base = 0; switch (adm & SSB_ADM_TYPE) { case SSB_ADM_TYPE0: base = (adm & SSB_ADM_BASE0); break; case SSB_ADM_TYPE1: |
209b43759
|
1229 |
WARN_ON(adm & SSB_ADM_NEG); /* unsupported */ |
61e115a56
|
1230 1231 1232 |
base = (adm & SSB_ADM_BASE1); break; case SSB_ADM_TYPE2: |
209b43759
|
1233 |
WARN_ON(adm & SSB_ADM_NEG); /* unsupported */ |
61e115a56
|
1234 1235 1236 |
base = (adm & SSB_ADM_BASE2); break; default: |
209b43759
|
1237 |
WARN_ON(1); |
61e115a56
|
1238 1239 1240 1241 1242 1243 1244 1245 1246 1247 1248 1249 1250 1251 1252 |
} return base; } EXPORT_SYMBOL(ssb_admatch_base); u32 ssb_admatch_size(u32 adm) { u32 size = 0; switch (adm & SSB_ADM_TYPE) { case SSB_ADM_TYPE0: size = ((adm & SSB_ADM_SZ0) >> SSB_ADM_SZ0_SHIFT); break; case SSB_ADM_TYPE1: |
209b43759
|
1253 |
WARN_ON(adm & SSB_ADM_NEG); /* unsupported */ |
61e115a56
|
1254 1255 1256 |
size = ((adm & SSB_ADM_SZ1) >> SSB_ADM_SZ1_SHIFT); break; case SSB_ADM_TYPE2: |
209b43759
|
1257 |
WARN_ON(adm & SSB_ADM_NEG); /* unsupported */ |
61e115a56
|
1258 1259 1260 |
size = ((adm & SSB_ADM_SZ2) >> SSB_ADM_SZ2_SHIFT); break; default: |
209b43759
|
1261 |
WARN_ON(1); |
61e115a56
|
1262 1263 1264 1265 1266 1267 1268 1269 1270 1271 1272 1273 1274 1275 1276 1277 1278 1279 1280 1281 1282 1283 1284 |
} size = (1 << (size + 1)); return size; } EXPORT_SYMBOL(ssb_admatch_size); static int __init ssb_modinit(void) { int err; /* See the comment at the ssb_is_early_boot definition */ ssb_is_early_boot = 0; err = bus_register(&ssb_bustype); if (err) return err; /* Maybe we already registered some buses at early boot. * Check for this and attach them */ ssb_buses_lock(); err = ssb_attach_queued_buses(); ssb_buses_unlock(); |
e6c463e3a
|
1285 |
if (err) { |
61e115a56
|
1286 |
bus_unregister(&ssb_bustype); |
e6c463e3a
|
1287 1288 |
goto out; } |
61e115a56
|
1289 1290 1291 |
err = b43_pci_ssb_bridge_init(); if (err) { |
b8b6069cf
|
1292 1293 |
pr_err("Broadcom 43xx PCI-SSB-bridge initialization failed "); |
aab547ce0
|
1294 1295 1296 |
/* don't fail SSB init because of this */ err = 0; } |
399500da1
|
1297 1298 |
err = ssb_host_pcmcia_init(); if (err) { |
b8b6069cf
|
1299 1300 |
pr_err("PCMCIA host initialization failed "); |
399500da1
|
1301 1302 1303 |
/* don't fail SSB init because of this */ err = 0; } |
aab547ce0
|
1304 1305 |
err = ssb_gige_init(); if (err) { |
b8b6069cf
|
1306 1307 |
pr_err("SSB Broadcom Gigabit Ethernet driver initialization failed "); |
61e115a56
|
1308 1309 1310 |
/* don't fail SSB init because of this */ err = 0; } |
e6c463e3a
|
1311 |
out: |
61e115a56
|
1312 1313 |
return err; } |
8d8c90e3f
|
1314 1315 1316 1317 |
/* ssb must be initialized after PCI but before the ssb drivers. * That means we must use some initcall between subsys_initcall * and device_initcall. */ fs_initcall(ssb_modinit); |
61e115a56
|
1318 1319 1320 |
static void __exit ssb_modexit(void) { |
aab547ce0
|
1321 |
ssb_gige_exit(); |
399500da1
|
1322 |
ssb_host_pcmcia_exit(); |
61e115a56
|
1323 1324 1325 1326 |
b43_pci_ssb_bridge_exit(); bus_unregister(&ssb_bustype); } module_exit(ssb_modexit) |