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drivers/dma/shdma.h
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/* * Renesas SuperH DMA Engine support * * Copyright (C) 2009 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> * Copyright (C) 2009 Renesas Solutions, Inc. All rights reserved. * * This is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * */ #ifndef __DMA_SHDMA_H #define __DMA_SHDMA_H |
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#include <linux/dmaengine.h> |
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#include <linux/interrupt.h> #include <linux/list.h> |
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#define SH_DMAC_MAX_CHANNELS 20 |
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#define SH_DMA_SLAVE_NUMBER 256 |
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#define SH_DMA_TCR_MAX 0x00FFFFFF /* 16MB */ |
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struct device; |
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enum dmae_pm_state { DMAE_PM_ESTABLISHED, DMAE_PM_BUSY, DMAE_PM_PENDING, }; |
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struct sh_dmae_chan { dma_cookie_t completed_cookie; /* The maximum cookie completed */ |
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spinlock_t desc_lock; /* Descriptor operation lock */ struct list_head ld_queue; /* Link descriptors queue */ struct list_head ld_free; /* Link descriptors free */ struct dma_chan common; /* DMA common channel */ struct device *dev; /* Channel device */ |
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struct tasklet_struct tasklet; /* Tasklet */ |
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int descs_allocated; /* desc count */ |
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int xmit_shift; /* log_2(bytes_per_xfer) */ |
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int irq; |
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int id; /* Raw id of this channel */ |
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u32 __iomem *base; |
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char dev_id[16]; /* unique name per DMAC of channel */ |
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int pm_error; |
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enum dmae_pm_state pm_state; |
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}; struct sh_dmae_device { struct dma_device common; |
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struct sh_dmae_chan *chan[SH_DMAC_MAX_CHANNELS]; |
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struct sh_dmae_pdata *pdata; |
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struct list_head node; |
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u32 __iomem *chan_reg; u16 __iomem *dmars; |
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unsigned int chcr_offset; |
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u32 chcr_ie_bit; |
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}; #define to_sh_chan(chan) container_of(chan, struct sh_dmae_chan, common) #define to_sh_desc(lh) container_of(lh, struct sh_desc, node) #define tx_to_sh_desc(tx) container_of(tx, struct sh_desc, async_tx) |
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#define to_sh_dev(chan) container_of(chan->common.device,\ struct sh_dmae_device, common) |
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#endif /* __DMA_SHDMA_H */ |