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drivers/video/sm501fb.c
53.3 KB
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/* linux/drivers/video/sm501fb.c * * Copyright (c) 2006 Simtec Electronics * Vincent Sanders <vince@simtec.co.uk> * Ben Dooks <ben@simtec.co.uk> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. * * Framebuffer driver for the Silicon Motion SM501 */ #include <linux/module.h> #include <linux/kernel.h> #include <linux/errno.h> #include <linux/string.h> #include <linux/mm.h> #include <linux/tty.h> #include <linux/slab.h> #include <linux/delay.h> #include <linux/fb.h> #include <linux/init.h> #include <linux/vmalloc.h> #include <linux/dma-mapping.h> #include <linux/interrupt.h> #include <linux/workqueue.h> #include <linux/wait.h> #include <linux/platform_device.h> #include <linux/clk.h> |
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#include <linux/console.h> |
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#include <linux/io.h> |
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#include <asm/uaccess.h> #include <asm/div64.h> #ifdef CONFIG_PM #include <linux/pm.h> #endif #include <linux/sm501.h> #include <linux/sm501-regs.h> |
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#include "edid.h" static char *fb_mode = "640x480-16@60"; static unsigned long default_bpp = 16; static struct fb_videomode __devinitdata sm501_default_mode = { .refresh = 60, .xres = 640, .yres = 480, .pixclock = 20833, .left_margin = 142, .right_margin = 13, .upper_margin = 21, .lower_margin = 1, .hsync_len = 69, .vsync_len = 3, .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, .vmode = FB_VMODE_NONINTERLACED }; |
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#define NR_PALETTE 256 enum sm501_controller { HEAD_CRT = 0, HEAD_PANEL = 1, }; |
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/* SM501 memory address. * * This structure is used to track memory usage within the SM501 framebuffer * allocation. The sm_addr field is stored as an offset as it is often used * against both the physical and mapped addresses. */ |
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struct sm501_mem { unsigned long size; |
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unsigned long sm_addr; /* offset from base of sm501 fb. */ |
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void __iomem *k_addr; }; /* private data that is shared between all frambuffers* */ struct sm501fb_info { struct device *dev; struct fb_info *fb[2]; /* fb info for both heads */ struct resource *fbmem_res; /* framebuffer resource */ struct resource *regs_res; /* registers resource */ |
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struct resource *regs2d_res; /* 2d registers resource */ |
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struct sm501_platdata_fb *pdata; /* our platform data */ |
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unsigned long pm_crt_ctrl; /* pm: crt ctrl save */ |
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int irq; int swap_endian; /* set to swap rgb=>bgr */ void __iomem *regs; /* remapped registers */ |
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void __iomem *regs2d; /* 2d remapped registers */ |
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void __iomem *fbmem; /* remapped framebuffer */ size_t fbmem_len; /* length of remapped region */ |
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u8 *edid_data; |
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}; /* per-framebuffer private data */ struct sm501fb_par { u32 pseudo_palette[16]; enum sm501_controller head; struct sm501_mem cursor; struct sm501_mem screen; struct fb_ops ops; void *store_fb; void *store_cursor; void __iomem *cursor_regs; struct sm501fb_info *info; }; /* Helper functions */ static inline int h_total(struct fb_var_screeninfo *var) { return var->xres + var->left_margin + var->right_margin + var->hsync_len; } static inline int v_total(struct fb_var_screeninfo *var) { return var->yres + var->upper_margin + var->lower_margin + var->vsync_len; } /* sm501fb_sync_regs() * * This call is mainly for PCI bus systems where we need to * ensure that any writes to the bus are completed before the * next phase, or after completing a function. */ static inline void sm501fb_sync_regs(struct sm501fb_info *info) { |
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smc501_readl(info->regs); |
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} /* sm501_alloc_mem * * This is an attempt to lay out memory for the two framebuffers and * everything else * |
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* |fbmem_res->start fbmem_res->end| * | | * |fb[0].fix.smem_start | |fb[1].fix.smem_start | 2K | |
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* |-> fb[0].fix.smem_len <-| spare |-> fb[1].fix.smem_len <-|-> cursors <-| * * The "spare" space is for the 2d engine data * the fixed is space for the cursors (2x1Kbyte) * * we need to allocate memory for the 2D acceleration engine * command list and the data for the engine to deal with. * * - all allocations must be 128bit aligned * - cursors are 64x64x2 bits (1Kbyte) * */ #define SM501_MEMF_CURSOR (1) #define SM501_MEMF_PANEL (2) #define SM501_MEMF_CRT (4) #define SM501_MEMF_ACCEL (8) |
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static int sm501_alloc_mem(struct sm501fb_info *inf, struct sm501_mem *mem, |
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unsigned int why, size_t size, u32 smem_len) |
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{ |
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struct sm501fb_par *par; |
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struct fb_info *fbi; |
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unsigned int ptr; unsigned int end; |
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switch (why) { case SM501_MEMF_CURSOR: ptr = inf->fbmem_len - size; |
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inf->fbmem_len = ptr; /* adjust available memory. */ |
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break; case SM501_MEMF_PANEL: |
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if (size > inf->fbmem_len) return -ENOMEM; |
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ptr = inf->fbmem_len - size; |
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fbi = inf->fb[HEAD_CRT]; /* round down, some programs such as directfb do not draw * 0,0 correctly unless the start is aligned to a page start. */ if (ptr > 0) ptr &= ~(PAGE_SIZE - 1); |
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if (fbi && ptr < smem_len) |
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return -ENOMEM; break; case SM501_MEMF_CRT: ptr = 0; |
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/* check to see if we have panel memory allocated * which would put an limit on available memory. */ fbi = inf->fb[HEAD_PANEL]; if (fbi) { par = fbi->par; end = par->screen.k_addr ? par->screen.sm_addr : inf->fbmem_len; } else end = inf->fbmem_len; if ((ptr + size) > end) return -ENOMEM; |
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break; case SM501_MEMF_ACCEL: |
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fbi = inf->fb[HEAD_CRT]; |
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ptr = fbi ? smem_len : 0; |
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|
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fbi = inf->fb[HEAD_PANEL]; if (fbi) { par = fbi->par; end = par->screen.sm_addr; } else |
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end = inf->fbmem_len; |
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if ((ptr + size) > end) |
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return -ENOMEM; |
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|
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break; default: return -EINVAL; } mem->size = size; mem->sm_addr = ptr; mem->k_addr = inf->fbmem + ptr; dev_dbg(inf->dev, "%s: result %08lx, %p - %u, %zd ", __func__, mem->sm_addr, mem->k_addr, why, size); return 0; } /* sm501fb_ps_to_hz * * Converts a period in picoseconds to Hz. * * Note, we try to keep this in Hz to minimise rounding with * the limited PLL settings on the SM501. */ static unsigned long sm501fb_ps_to_hz(unsigned long psvalue) { unsigned long long numerator=1000000000000ULL; /* 10^12 / picosecond period gives frequency in Hz */ do_div(numerator, psvalue); return (unsigned long)numerator; } |
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/* sm501fb_hz_to_ps is identical to the opposite transform */ |
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#define sm501fb_hz_to_ps(x) sm501fb_ps_to_hz(x) /* sm501fb_setup_gamma * * Programs a linear 1.0 gamma ramp in case the gamma * correction is enabled without programming anything else. */ static void sm501fb_setup_gamma(struct sm501fb_info *fbi, unsigned long palette) { unsigned long value = 0; int offset; /* set gamma values */ for (offset = 0; offset < 256 * 4; offset += 4) { |
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smc501_writel(value, fbi->regs + palette + offset); |
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value += 0x010101; /* Advance RGB by 1,1,1.*/ } } /* sm501fb_check_var * * check common variables for both panel and crt */ static int sm501fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) { struct sm501fb_par *par = info->par; struct sm501fb_info *sm = par->info; unsigned long tmp; /* check we can fit these values into the registers */ |
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if (var->hsync_len > 255 || var->vsync_len > 63) |
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return -EINVAL; |
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/* hdisplay end and hsync start */ if ((var->xres + var->right_margin) > 4096) |
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return -EINVAL; |
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/* vdisplay end and vsync start */ |
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if ((var->yres + var->lower_margin) > 2048) return -EINVAL; /* hard limits of device */ if (h_total(var) > 4096 || v_total(var) > 2048) return -EINVAL; /* check our line length is going to be 128 bit aligned */ tmp = (var->xres * var->bits_per_pixel) / 8; if ((tmp & 15) != 0) return -EINVAL; /* check the virtual size */ if (var->xres_virtual > 4096 || var->yres_virtual > 2048) return -EINVAL; /* can cope with 8,16 or 32bpp */ if (var->bits_per_pixel <= 8) var->bits_per_pixel = 8; else if (var->bits_per_pixel <= 16) var->bits_per_pixel = 16; else if (var->bits_per_pixel == 24) var->bits_per_pixel = 32; /* set r/g/b positions and validate bpp */ switch(var->bits_per_pixel) { case 8: var->red.length = var->bits_per_pixel; var->red.offset = 0; var->green.length = var->bits_per_pixel; var->green.offset = 0; var->blue.length = var->bits_per_pixel; var->blue.offset = 0; var->transp.length = 0; |
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var->transp.offset = 0; |
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break; case 16: if (sm->pdata->flags & SM501_FBPD_SWAP_FB_ENDIAN) { |
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var->blue.offset = 11; var->green.offset = 5; var->red.offset = 0; |
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} else { var->red.offset = 11; var->green.offset = 5; var->blue.offset = 0; |
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} |
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var->transp.offset = 0; |
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var->red.length = 5; var->green.length = 6; var->blue.length = 5; var->transp.length = 0; break; case 32: if (sm->pdata->flags & SM501_FBPD_SWAP_FB_ENDIAN) { var->transp.offset = 0; var->red.offset = 8; var->green.offset = 16; var->blue.offset = 24; } else { var->transp.offset = 24; var->red.offset = 16; var->green.offset = 8; var->blue.offset = 0; } var->red.length = 8; var->green.length = 8; var->blue.length = 8; var->transp.length = 0; break; default: return -EINVAL; } return 0; } /* * sm501fb_check_var_crt(): * * check the parameters for the CRT head, and either bring them * back into range, or return -EINVAL. */ static int sm501fb_check_var_crt(struct fb_var_screeninfo *var, struct fb_info *info) { return sm501fb_check_var(var, info); } /* sm501fb_check_var_pnl(): * * check the parameters for the CRT head, and either bring them * back into range, or return -EINVAL. */ static int sm501fb_check_var_pnl(struct fb_var_screeninfo *var, struct fb_info *info) { return sm501fb_check_var(var, info); } /* sm501fb_set_par_common * * set common registers for framebuffers */ static int sm501fb_set_par_common(struct fb_info *info, struct fb_var_screeninfo *var) { struct sm501fb_par *par = info->par; struct sm501fb_info *fbi = par->info; unsigned long pixclock; /* pixelclock in Hz */ |
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unsigned long sm501pixclock; /* pixelclock the 501 can achieve in Hz */ |
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unsigned int mem_type; unsigned int clock_type; unsigned int head_addr; |
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unsigned int smem_len; |
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dev_dbg(fbi->dev, "%s: %dx%d, bpp = %d, virtual %dx%d ", __func__, var->xres, var->yres, var->bits_per_pixel, var->xres_virtual, var->yres_virtual); switch (par->head) { case HEAD_CRT: mem_type = SM501_MEMF_CRT; clock_type = SM501_CLOCK_V2XCLK; head_addr = SM501_DC_CRT_FB_ADDR; break; case HEAD_PANEL: mem_type = SM501_MEMF_PANEL; clock_type = SM501_CLOCK_P2XCLK; head_addr = SM501_DC_PANEL_FB_ADDR; break; default: mem_type = 0; /* stop compiler warnings */ head_addr = 0; clock_type = 0; } switch (var->bits_per_pixel) { case 8: info->fix.visual = FB_VISUAL_PSEUDOCOLOR; break; case 16: |
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info->fix.visual = FB_VISUAL_TRUECOLOR; |
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break; case 32: info->fix.visual = FB_VISUAL_TRUECOLOR; break; } /* allocate fb memory within 501 */ info->fix.line_length = (var->xres_virtual * var->bits_per_pixel)/8; |
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smem_len = info->fix.line_length * var->yres_virtual; |
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dev_dbg(fbi->dev, "%s: line length = %u ", __func__, info->fix.line_length); |
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if (sm501_alloc_mem(fbi, &par->screen, mem_type, smem_len, smem_len)) { |
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dev_err(fbi->dev, "no memory available "); return -ENOMEM; } |
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mutex_lock(&info->mm_lock); |
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info->fix.smem_start = fbi->fbmem_res->start + par->screen.sm_addr; |
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info->fix.smem_len = smem_len; mutex_unlock(&info->mm_lock); |
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info->screen_base = fbi->fbmem + par->screen.sm_addr; info->screen_size = info->fix.smem_len; /* set start of framebuffer to the screen */ |
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smc501_writel(par->screen.sm_addr | SM501_ADDR_FLIP, fbi->regs + head_addr); |
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/* program CRT clock */ pixclock = sm501fb_ps_to_hz(var->pixclock); sm501pixclock = sm501_set_clock(fbi->dev->parent, clock_type, pixclock); /* update fb layer with actual clock used */ var->pixclock = sm501fb_hz_to_ps(sm501pixclock); dev_dbg(fbi->dev, "%s: pixclock(ps) = %u, pixclock(Hz) = %lu, " "sm501pixclock = %lu, error = %ld%% ", __func__, var->pixclock, pixclock, sm501pixclock, ((pixclock - sm501pixclock)*100)/pixclock); return 0; } /* sm501fb_set_par_geometry * * set the geometry registers for specified framebuffer. */ static void sm501fb_set_par_geometry(struct fb_info *info, struct fb_var_screeninfo *var) { struct sm501fb_par *par = info->par; struct sm501fb_info *fbi = par->info; void __iomem *base = fbi->regs; unsigned long reg; if (par->head == HEAD_CRT) base += SM501_DC_CRT_H_TOT; else base += SM501_DC_PANEL_H_TOT; /* set framebuffer width and display width */ reg = info->fix.line_length; reg |= ((var->xres * var->bits_per_pixel)/8) << 16; |
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smc501_writel(reg, fbi->regs + (par->head == HEAD_CRT ? |
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SM501_DC_CRT_FB_OFFSET : SM501_DC_PANEL_FB_OFFSET)); /* program horizontal total */ reg = (h_total(var) - 1) << 16; reg |= (var->xres - 1); |
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smc501_writel(reg, base + SM501_OFF_DC_H_TOT); |
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/* program horizontal sync */ reg = var->hsync_len << 16; reg |= var->xres + var->right_margin - 1; |
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smc501_writel(reg, base + SM501_OFF_DC_H_SYNC); |
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/* program vertical total */ reg = (v_total(var) - 1) << 16; reg |= (var->yres - 1); |
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smc501_writel(reg, base + SM501_OFF_DC_V_TOT); |
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/* program vertical sync */ reg = var->vsync_len << 16; reg |= var->yres + var->lower_margin - 1; |
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smc501_writel(reg, base + SM501_OFF_DC_V_SYNC); |
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} /* sm501fb_pan_crt * * pan the CRT display output within an virtual framebuffer */ static int sm501fb_pan_crt(struct fb_var_screeninfo *var, struct fb_info *info) { struct sm501fb_par *par = info->par; struct sm501fb_info *fbi = par->info; |
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unsigned int bytes_pixel = info->var.bits_per_pixel / 8; |
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unsigned long reg; unsigned long xoffs; xoffs = var->xoffset * bytes_pixel; |
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reg = smc501_readl(fbi->regs + SM501_DC_CRT_CONTROL); |
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reg &= ~SM501_DC_CRT_CONTROL_PIXEL_MASK; reg |= ((xoffs & 15) / bytes_pixel) << 4; |
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smc501_writel(reg, fbi->regs + SM501_DC_CRT_CONTROL); |
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reg = (par->screen.sm_addr + xoffs + var->yoffset * info->fix.line_length); |
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smc501_writel(reg | SM501_ADDR_FLIP, fbi->regs + SM501_DC_CRT_FB_ADDR); |
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sm501fb_sync_regs(fbi); return 0; } /* sm501fb_pan_pnl * * pan the panel display output within an virtual framebuffer */ static int sm501fb_pan_pnl(struct fb_var_screeninfo *var, struct fb_info *info) { struct sm501fb_par *par = info->par; struct sm501fb_info *fbi = par->info; unsigned long reg; |
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reg = var->xoffset | (info->var.xres_virtual << 16); |
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smc501_writel(reg, fbi->regs + SM501_DC_PANEL_FB_WIDTH); |
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reg = var->yoffset | (info->var.yres_virtual << 16); |
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smc501_writel(reg, fbi->regs + SM501_DC_PANEL_FB_HEIGHT); |
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sm501fb_sync_regs(fbi); return 0; } /* sm501fb_set_par_crt * * Set the CRT video mode from the fb_info structure */ static int sm501fb_set_par_crt(struct fb_info *info) { struct sm501fb_par *par = info->par; struct sm501fb_info *fbi = par->info; struct fb_var_screeninfo *var = &info->var; unsigned long control; /* control register */ int ret; /* activate new configuration */ dev_dbg(fbi->dev, "%s(%p) ", __func__, info); /* enable CRT DAC - note 0 is on!*/ sm501_misc_control(fbi->dev->parent, 0, SM501_MISC_DAC_POWER); |
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control = smc501_readl(fbi->regs + SM501_DC_CRT_CONTROL); |
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control &= (SM501_DC_CRT_CONTROL_PIXEL_MASK | SM501_DC_CRT_CONTROL_GAMMA | SM501_DC_CRT_CONTROL_BLANK | SM501_DC_CRT_CONTROL_SEL | SM501_DC_CRT_CONTROL_CP | SM501_DC_CRT_CONTROL_TVP); /* set the sync polarities before we check data source */ if ((var->sync & FB_SYNC_HOR_HIGH_ACT) == 0) control |= SM501_DC_CRT_CONTROL_HSP; if ((var->sync & FB_SYNC_VERT_HIGH_ACT) == 0) control |= SM501_DC_CRT_CONTROL_VSP; if ((control & SM501_DC_CRT_CONTROL_SEL) == 0) { /* the head is displaying panel data... */ |
537a1bf05 fbdev: add mutex ... |
649 650 |
sm501_alloc_mem(fbi, &par->screen, SM501_MEMF_CRT, 0, info->fix.smem_len); |
5fc404e47 [PATCH] fb: SM501... |
651 652 653 654 655 656 657 658 659 660 661 662 663 664 665 666 667 668 669 670 671 672 |
goto out_update; } ret = sm501fb_set_par_common(info, var); if (ret) { dev_err(fbi->dev, "failed to set common parameters "); return ret; } sm501fb_pan_crt(var, info); sm501fb_set_par_geometry(info, var); control |= SM501_FIFO_3; /* fill if >3 free slots */ switch(var->bits_per_pixel) { case 8: control |= SM501_DC_CRT_CONTROL_8BPP; break; case 16: control |= SM501_DC_CRT_CONTROL_16BPP; |
5619d823b sm501fb: direct c... |
673 |
sm501fb_setup_gamma(fbi, SM501_DC_CRT_PALETTE); |
5fc404e47 [PATCH] fb: SM501... |
674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 |
break; case 32: control |= SM501_DC_CRT_CONTROL_32BPP; sm501fb_setup_gamma(fbi, SM501_DC_CRT_PALETTE); break; default: BUG(); } control |= SM501_DC_CRT_CONTROL_SEL; /* CRT displays CRT data */ control |= SM501_DC_CRT_CONTROL_TE; /* enable CRT timing */ control |= SM501_DC_CRT_CONTROL_ENABLE; /* enable CRT plane */ out_update: dev_dbg(fbi->dev, "new control is %08lx ", control); |
bf5f00190 video, sm501: add... |
692 |
smc501_writel(control, fbi->regs + SM501_DC_CRT_CONTROL); |
5fc404e47 [PATCH] fb: SM501... |
693 694 695 696 697 698 699 700 701 |
sm501fb_sync_regs(fbi); return 0; } static void sm501fb_panel_power(struct sm501fb_info *fbi, int to) { unsigned long control; void __iomem *ctrl_reg = fbi->regs + SM501_DC_PANEL_CONTROL; |
dfcffa467 sm501fb: control ... |
702 |
struct sm501_platdata_fbsub *pd = fbi->pdata->fb_pnl; |
5fc404e47 [PATCH] fb: SM501... |
703 |
|
bf5f00190 video, sm501: add... |
704 |
control = smc501_readl(ctrl_reg); |
5fc404e47 [PATCH] fb: SM501... |
705 706 707 708 709 |
if (to && (control & SM501_DC_PANEL_CONTROL_VDD) == 0) { /* enable panel power */ control |= SM501_DC_PANEL_CONTROL_VDD; /* FPVDDEN */ |
bf5f00190 video, sm501: add... |
710 |
smc501_writel(control, ctrl_reg); |
5fc404e47 [PATCH] fb: SM501... |
711 712 713 714 |
sm501fb_sync_regs(fbi); mdelay(10); control |= SM501_DC_PANEL_CONTROL_DATA; /* DATA */ |
bf5f00190 video, sm501: add... |
715 |
smc501_writel(control, ctrl_reg); |
5fc404e47 [PATCH] fb: SM501... |
716 717 |
sm501fb_sync_regs(fbi); mdelay(10); |
206c5d69d sm501: add invers... |
718 |
/* VBIASEN */ |
cdc83ae24 SM501: reverse FP... |
719 |
if (!(pd->flags & SM501FB_FLAG_PANEL_NO_VBIASEN)) { |
206c5d69d sm501: add invers... |
720 721 722 723 |
if (pd->flags & SM501FB_FLAG_PANEL_INV_VBIASEN) control &= ~SM501_DC_PANEL_CONTROL_BIAS; else control |= SM501_DC_PANEL_CONTROL_BIAS; |
bf5f00190 video, sm501: add... |
724 |
smc501_writel(control, ctrl_reg); |
dfcffa467 sm501fb: control ... |
725 726 727 |
sm501fb_sync_regs(fbi); mdelay(10); } |
5fc404e47 [PATCH] fb: SM501... |
728 |
|
cdc83ae24 SM501: reverse FP... |
729 |
if (!(pd->flags & SM501FB_FLAG_PANEL_NO_FPEN)) { |
206c5d69d sm501: add invers... |
730 731 732 733 |
if (pd->flags & SM501FB_FLAG_PANEL_INV_FPEN) control &= ~SM501_DC_PANEL_CONTROL_FPEN; else control |= SM501_DC_PANEL_CONTROL_FPEN; |
bf5f00190 video, sm501: add... |
734 |
smc501_writel(control, ctrl_reg); |
dfcffa467 sm501fb: control ... |
735 736 737 |
sm501fb_sync_regs(fbi); mdelay(10); } |
5fc404e47 [PATCH] fb: SM501... |
738 739 |
} else if (!to && (control & SM501_DC_PANEL_CONTROL_VDD) != 0) { /* disable panel power */ |
cdc83ae24 SM501: reverse FP... |
740 |
if (!(pd->flags & SM501FB_FLAG_PANEL_NO_FPEN)) { |
206c5d69d sm501: add invers... |
741 742 743 744 |
if (pd->flags & SM501FB_FLAG_PANEL_INV_FPEN) control |= SM501_DC_PANEL_CONTROL_FPEN; else control &= ~SM501_DC_PANEL_CONTROL_FPEN; |
bf5f00190 video, sm501: add... |
745 |
smc501_writel(control, ctrl_reg); |
dfcffa467 sm501fb: control ... |
746 747 748 |
sm501fb_sync_regs(fbi); mdelay(10); } |
5fc404e47 [PATCH] fb: SM501... |
749 |
|
cdc83ae24 SM501: reverse FP... |
750 |
if (!(pd->flags & SM501FB_FLAG_PANEL_NO_VBIASEN)) { |
206c5d69d sm501: add invers... |
751 752 753 754 |
if (pd->flags & SM501FB_FLAG_PANEL_INV_VBIASEN) control |= SM501_DC_PANEL_CONTROL_BIAS; else control &= ~SM501_DC_PANEL_CONTROL_BIAS; |
bf5f00190 video, sm501: add... |
755 |
smc501_writel(control, ctrl_reg); |
dfcffa467 sm501fb: control ... |
756 757 758 |
sm501fb_sync_regs(fbi); mdelay(10); } |
5fc404e47 [PATCH] fb: SM501... |
759 760 |
control &= ~SM501_DC_PANEL_CONTROL_DATA; |
bf5f00190 video, sm501: add... |
761 |
smc501_writel(control, ctrl_reg); |
5fc404e47 [PATCH] fb: SM501... |
762 763 764 765 |
sm501fb_sync_regs(fbi); mdelay(10); control &= ~SM501_DC_PANEL_CONTROL_VDD; |
bf5f00190 video, sm501: add... |
766 |
smc501_writel(control, ctrl_reg); |
5fc404e47 [PATCH] fb: SM501... |
767 768 769 770 771 772 773 774 775 776 777 778 779 780 781 782 783 784 785 786 787 788 789 790 791 792 793 794 795 796 797 798 799 800 |
sm501fb_sync_regs(fbi); mdelay(10); } sm501fb_sync_regs(fbi); } /* sm501fb_set_par_pnl * * Set the panel video mode from the fb_info structure */ static int sm501fb_set_par_pnl(struct fb_info *info) { struct sm501fb_par *par = info->par; struct sm501fb_info *fbi = par->info; struct fb_var_screeninfo *var = &info->var; unsigned long control; unsigned long reg; int ret; dev_dbg(fbi->dev, "%s(%p) ", __func__, info); /* activate this new configuration */ ret = sm501fb_set_par_common(info, var); if (ret) return ret; sm501fb_pan_pnl(var, info); sm501fb_set_par_geometry(info, var); /* update control register */ |
bf5f00190 video, sm501: add... |
801 |
control = smc501_readl(fbi->regs + SM501_DC_PANEL_CONTROL); |
5fc404e47 [PATCH] fb: SM501... |
802 803 804 805 806 807 808 809 810 811 812 813 814 815 816 817 818 819 820 821 822 |
control &= (SM501_DC_PANEL_CONTROL_GAMMA | SM501_DC_PANEL_CONTROL_VDD | SM501_DC_PANEL_CONTROL_DATA | SM501_DC_PANEL_CONTROL_BIAS | SM501_DC_PANEL_CONTROL_FPEN | SM501_DC_PANEL_CONTROL_CP | SM501_DC_PANEL_CONTROL_CK | SM501_DC_PANEL_CONTROL_HP | SM501_DC_PANEL_CONTROL_VP | SM501_DC_PANEL_CONTROL_HPD | SM501_DC_PANEL_CONTROL_VPD); control |= SM501_FIFO_3; /* fill if >3 free slots */ switch(var->bits_per_pixel) { case 8: control |= SM501_DC_PANEL_CONTROL_8BPP; break; case 16: control |= SM501_DC_PANEL_CONTROL_16BPP; |
5619d823b sm501fb: direct c... |
823 |
sm501fb_setup_gamma(fbi, SM501_DC_PANEL_PALETTE); |
5fc404e47 [PATCH] fb: SM501... |
824 825 826 827 828 829 830 831 832 833 |
break; case 32: control |= SM501_DC_PANEL_CONTROL_32BPP; sm501fb_setup_gamma(fbi, SM501_DC_PANEL_PALETTE); break; default: BUG(); } |
bf5f00190 video, sm501: add... |
834 |
smc501_writel(0x0, fbi->regs + SM501_DC_PANEL_PANNING_CONTROL); |
5fc404e47 [PATCH] fb: SM501... |
835 836 |
/* panel plane top left and bottom right location */ |
bf5f00190 video, sm501: add... |
837 |
smc501_writel(0x00, fbi->regs + SM501_DC_PANEL_TL_LOC); |
5fc404e47 [PATCH] fb: SM501... |
838 839 840 |
reg = var->xres - 1; reg |= (var->yres - 1) << 16; |
bf5f00190 video, sm501: add... |
841 |
smc501_writel(reg, fbi->regs + SM501_DC_PANEL_BR_LOC); |
5fc404e47 [PATCH] fb: SM501... |
842 843 844 845 846 847 848 849 850 851 852 |
/* program panel control register */ control |= SM501_DC_PANEL_CONTROL_TE; /* enable PANEL timing */ control |= SM501_DC_PANEL_CONTROL_EN; /* enable PANEL gfx plane */ if ((var->sync & FB_SYNC_HOR_HIGH_ACT) == 0) control |= SM501_DC_PANEL_CONTROL_HSP; if ((var->sync & FB_SYNC_VERT_HIGH_ACT) == 0) control |= SM501_DC_PANEL_CONTROL_VSP; |
bf5f00190 video, sm501: add... |
853 |
smc501_writel(control, fbi->regs + SM501_DC_PANEL_CONTROL); |
5fc404e47 [PATCH] fb: SM501... |
854 |
sm501fb_sync_regs(fbi); |
eb78f9b3f sm501fb: Ensure p... |
855 856 857 858 |
/* ensure the panel interface is not tristated at this point */ sm501_modify_reg(fbi->dev->parent, SM501_SYSTEM_CONTROL, 0, SM501_SYSCTRL_PANEL_TRISTATE); |
5fc404e47 [PATCH] fb: SM501... |
859 860 861 862 863 864 865 866 867 868 869 870 871 872 873 874 875 876 877 878 879 880 881 882 883 884 885 886 887 888 889 890 891 892 893 894 895 896 897 898 899 900 901 902 903 904 905 906 907 908 909 910 911 912 913 914 915 916 917 918 |
/* power the panel up */ sm501fb_panel_power(fbi, 1); return 0; } /* chan_to_field * * convert a colour value into a field position * * from pxafb.c */ static inline unsigned int chan_to_field(unsigned int chan, struct fb_bitfield *bf) { chan &= 0xffff; chan >>= 16 - bf->length; return chan << bf->offset; } /* sm501fb_setcolreg * * set the colour mapping for modes that support palettised data */ static int sm501fb_setcolreg(unsigned regno, unsigned red, unsigned green, unsigned blue, unsigned transp, struct fb_info *info) { struct sm501fb_par *par = info->par; struct sm501fb_info *fbi = par->info; void __iomem *base = fbi->regs; unsigned int val; if (par->head == HEAD_CRT) base += SM501_DC_CRT_PALETTE; else base += SM501_DC_PANEL_PALETTE; switch (info->fix.visual) { case FB_VISUAL_TRUECOLOR: /* true-colour, use pseuo-palette */ if (regno < 16) { u32 *pal = par->pseudo_palette; val = chan_to_field(red, &info->var.red); val |= chan_to_field(green, &info->var.green); val |= chan_to_field(blue, &info->var.blue); pal[regno] = val; } break; case FB_VISUAL_PSEUDOCOLOR: if (regno < 256) { val = (red >> 8) << 16; val |= (green >> 8) << 8; val |= blue >> 8; |
bf5f00190 video, sm501: add... |
919 |
smc501_writel(val, base + (regno * 4)); |
5fc404e47 [PATCH] fb: SM501... |
920 921 922 923 924 925 926 927 928 929 930 931 932 933 934 935 936 937 938 939 940 941 942 943 944 945 946 947 948 949 950 951 952 953 954 955 956 957 958 959 960 961 962 963 964 965 966 967 968 969 970 971 972 973 974 975 |
} break; default: return 1; /* unknown type */ } return 0; } /* sm501fb_blank_pnl * * Blank or un-blank the panel interface */ static int sm501fb_blank_pnl(int blank_mode, struct fb_info *info) { struct sm501fb_par *par = info->par; struct sm501fb_info *fbi = par->info; dev_dbg(fbi->dev, "%s(mode=%d, %p) ", __func__, blank_mode, info); switch (blank_mode) { case FB_BLANK_POWERDOWN: sm501fb_panel_power(fbi, 0); break; case FB_BLANK_UNBLANK: sm501fb_panel_power(fbi, 1); break; case FB_BLANK_NORMAL: case FB_BLANK_VSYNC_SUSPEND: case FB_BLANK_HSYNC_SUSPEND: default: return 1; } return 0; } /* sm501fb_blank_crt * * Blank or un-blank the crt interface */ static int sm501fb_blank_crt(int blank_mode, struct fb_info *info) { struct sm501fb_par *par = info->par; struct sm501fb_info *fbi = par->info; unsigned long ctrl; dev_dbg(fbi->dev, "%s(mode=%d, %p) ", __func__, blank_mode, info); |
bf5f00190 video, sm501: add... |
976 |
ctrl = smc501_readl(fbi->regs + SM501_DC_CRT_CONTROL); |
5fc404e47 [PATCH] fb: SM501... |
977 978 979 980 981 982 983 984 985 986 987 988 989 990 991 992 993 994 995 996 997 998 |
switch (blank_mode) { case FB_BLANK_POWERDOWN: ctrl &= ~SM501_DC_CRT_CONTROL_ENABLE; sm501_misc_control(fbi->dev->parent, SM501_MISC_DAC_POWER, 0); case FB_BLANK_NORMAL: ctrl |= SM501_DC_CRT_CONTROL_BLANK; break; case FB_BLANK_UNBLANK: ctrl &= ~SM501_DC_CRT_CONTROL_BLANK; ctrl |= SM501_DC_CRT_CONTROL_ENABLE; sm501_misc_control(fbi->dev->parent, 0, SM501_MISC_DAC_POWER); break; case FB_BLANK_VSYNC_SUSPEND: case FB_BLANK_HSYNC_SUSPEND: default: return 1; } |
bf5f00190 video, sm501: add... |
999 |
smc501_writel(ctrl, fbi->regs + SM501_DC_CRT_CONTROL); |
5fc404e47 [PATCH] fb: SM501... |
1000 1001 1002 1003 1004 1005 1006 1007 1008 |
sm501fb_sync_regs(fbi); return 0; } /* sm501fb_cursor * * set or change the hardware cursor parameters */ |
9540f75b2 [PATCH] drivers/v... |
1009 |
static int sm501fb_cursor(struct fb_info *info, struct fb_cursor *cursor) |
5fc404e47 [PATCH] fb: SM501... |
1010 1011 1012 1013 1014 1015 1016 1017 1018 1019 1020 1021 1022 1023 1024 1025 1026 1027 1028 1029 1030 1031 1032 1033 1034 |
{ struct sm501fb_par *par = info->par; struct sm501fb_info *fbi = par->info; void __iomem *base = fbi->regs; unsigned long hwc_addr; unsigned long fg, bg; dev_dbg(fbi->dev, "%s(%p,%p) ", __func__, info, cursor); if (par->head == HEAD_CRT) base += SM501_DC_CRT_HWC_BASE; else base += SM501_DC_PANEL_HWC_BASE; /* check not being asked to exceed capabilities */ if (cursor->image.width > 64) return -EINVAL; if (cursor->image.height > 64) return -EINVAL; if (cursor->image.depth > 1) return -EINVAL; |
bf5f00190 video, sm501: add... |
1035 |
hwc_addr = smc501_readl(base + SM501_OFF_HWC_ADDR); |
5fc404e47 [PATCH] fb: SM501... |
1036 1037 |
if (cursor->enable) |
bf5f00190 video, sm501: add... |
1038 1039 |
smc501_writel(hwc_addr | SM501_HWC_EN, base + SM501_OFF_HWC_ADDR); |
5fc404e47 [PATCH] fb: SM501... |
1040 |
else |
bf5f00190 video, sm501: add... |
1041 1042 |
smc501_writel(hwc_addr & ~SM501_HWC_EN, base + SM501_OFF_HWC_ADDR); |
5fc404e47 [PATCH] fb: SM501... |
1043 1044 1045 1046 1047 1048 1049 1050 1051 1052 1053 1054 1055 |
/* set data */ if (cursor->set & FB_CUR_SETPOS) { unsigned int x = cursor->image.dx; unsigned int y = cursor->image.dy; if (x >= 2048 || y >= 2048 ) return -EINVAL; dev_dbg(fbi->dev, "set position %d,%d ", x, y); //y += cursor->image.height; |
bf5f00190 video, sm501: add... |
1056 |
smc501_writel(x | (y << 16), base + SM501_OFF_HWC_LOC); |
5fc404e47 [PATCH] fb: SM501... |
1057 1058 1059 1060 1061 1062 1063 1064 1065 1066 1067 1068 1069 1070 1071 1072 1073 |
} if (cursor->set & FB_CUR_SETCMAP) { unsigned int bg_col = cursor->image.bg_color; unsigned int fg_col = cursor->image.fg_color; dev_dbg(fbi->dev, "%s: update cmap (%08x,%08x) ", __func__, bg_col, fg_col); bg = ((info->cmap.red[bg_col] & 0xF8) << 8) | ((info->cmap.green[bg_col] & 0xFC) << 3) | ((info->cmap.blue[bg_col] & 0xF8) >> 3); fg = ((info->cmap.red[fg_col] & 0xF8) << 8) | ((info->cmap.green[fg_col] & 0xFC) << 3) | ((info->cmap.blue[fg_col] & 0xF8) >> 3); |
be3478ddb sm501fb printk wa... |
1074 1075 |
dev_dbg(fbi->dev, "fgcol %08lx, bgcol %08lx ", fg, bg); |
5fc404e47 [PATCH] fb: SM501... |
1076 |
|
bf5f00190 video, sm501: add... |
1077 1078 |
smc501_writel(bg, base + SM501_OFF_HWC_COLOR_1_2); smc501_writel(fg, base + SM501_OFF_HWC_COLOR_3); |
5fc404e47 [PATCH] fb: SM501... |
1079 1080 1081 1082 1083 1084 1085 1086 1087 1088 1089 1090 1091 1092 1093 1094 1095 1096 1097 1098 1099 |
} if (cursor->set & FB_CUR_SETSIZE || cursor->set & (FB_CUR_SETIMAGE | FB_CUR_SETSHAPE)) { /* SM501 cursor is a two bpp 64x64 bitmap this routine * clears it to transparent then combines the cursor * shape plane with the colour plane to set the * cursor */ int x, y; const unsigned char *pcol = cursor->image.data; const unsigned char *pmsk = cursor->mask; void __iomem *dst = par->cursor.k_addr; unsigned char dcol = 0; unsigned char dmsk = 0; unsigned int op; dev_dbg(fbi->dev, "%s: setting shape (%d,%d) ", __func__, cursor->image.width, cursor->image.height); for (op = 0; op < (64*64*2)/8; op+=4) |
bf5f00190 video, sm501: add... |
1100 |
smc501_writel(0x0, dst + op); |
5fc404e47 [PATCH] fb: SM501... |
1101 1102 1103 1104 1105 1106 1107 1108 1109 1110 1111 1112 1113 1114 1115 1116 1117 1118 1119 1120 1121 1122 1123 1124 1125 1126 1127 1128 1129 1130 1131 1132 1133 1134 1135 1136 1137 |
for (y = 0; y < cursor->image.height; y++) { for (x = 0; x < cursor->image.width; x++) { if ((x % 8) == 0) { dcol = *pcol++; dmsk = *pmsk++; } else { dcol >>= 1; dmsk >>= 1; } if (dmsk & 1) { op = (dcol & 1) ? 1 : 3; op <<= ((x % 4) * 2); op |= readb(dst + (x / 4)); writeb(op, dst + (x / 4)); } } dst += (64*2)/8; } } sm501fb_sync_regs(fbi); /* ensure cursor data flushed */ return 0; } /* sm501fb_crtsrc_show * * device attribute code to show where the crt output is sourced from */ static ssize_t sm501fb_crtsrc_show(struct device *dev, struct device_attribute *attr, char *buf) { struct sm501fb_info *info = dev_get_drvdata(dev); unsigned long ctrl; |
bf5f00190 video, sm501: add... |
1138 |
ctrl = smc501_readl(info->regs + SM501_DC_CRT_CONTROL); |
5fc404e47 [PATCH] fb: SM501... |
1139 1140 1141 1142 1143 1144 1145 1146 1147 1148 1149 1150 1151 1152 1153 1154 1155 1156 1157 1158 1159 |
ctrl &= SM501_DC_CRT_CONTROL_SEL; return snprintf(buf, PAGE_SIZE, "%s ", ctrl ? "crt" : "panel"); } /* sm501fb_crtsrc_show * * device attribute code to set where the crt output is sourced from */ static ssize_t sm501fb_crtsrc_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t len) { struct sm501fb_info *info = dev_get_drvdata(dev); enum sm501_controller head; unsigned long ctrl; if (len < 1) return -EINVAL; |
1f2b69f9b [PATCH] fb: sm501... |
1160 |
if (strnicmp(buf, "crt", 3) == 0) |
5fc404e47 [PATCH] fb: SM501... |
1161 |
head = HEAD_CRT; |
1f2b69f9b [PATCH] fb: sm501... |
1162 |
else if (strnicmp(buf, "panel", 5) == 0) |
5fc404e47 [PATCH] fb: SM501... |
1163 1164 1165 1166 1167 1168 |
head = HEAD_PANEL; else return -EINVAL; dev_info(dev, "setting crt source to head %d ", head); |
bf5f00190 video, sm501: add... |
1169 |
ctrl = smc501_readl(info->regs + SM501_DC_CRT_CONTROL); |
5fc404e47 [PATCH] fb: SM501... |
1170 1171 1172 1173 1174 1175 1176 1177 1178 1179 |
if (head == HEAD_CRT) { ctrl |= SM501_DC_CRT_CONTROL_SEL; ctrl |= SM501_DC_CRT_CONTROL_ENABLE; ctrl |= SM501_DC_CRT_CONTROL_TE; } else { ctrl &= ~SM501_DC_CRT_CONTROL_SEL; ctrl &= ~SM501_DC_CRT_CONTROL_ENABLE; ctrl &= ~SM501_DC_CRT_CONTROL_TE; } |
bf5f00190 video, sm501: add... |
1180 |
smc501_writel(ctrl, info->regs + SM501_DC_CRT_CONTROL); |
5fc404e47 [PATCH] fb: SM501... |
1181 |
sm501fb_sync_regs(info); |
1f2b69f9b [PATCH] fb: sm501... |
1182 |
return len; |
5fc404e47 [PATCH] fb: SM501... |
1183 1184 1185 1186 1187 1188 1189 1190 1191 1192 1193 1194 1195 1196 1197 1198 1199 |
} /* Prepare the device_attr for registration with sysfs later */ static DEVICE_ATTR(crt_src, 0666, sm501fb_crtsrc_show, sm501fb_crtsrc_store); /* sm501fb_show_regs * * show the primary sm501 registers */ static int sm501fb_show_regs(struct sm501fb_info *info, char *ptr, unsigned int start, unsigned int len) { void __iomem *mem = info->regs; char *buf = ptr; unsigned int reg; for (reg = start; reg < (len + start); reg += 4) |
bf5f00190 video, sm501: add... |
1200 1201 1202 |
ptr += sprintf(ptr, "%08x = %08x ", reg, smc501_readl(mem + reg)); |
5fc404e47 [PATCH] fb: SM501... |
1203 1204 1205 1206 1207 1208 1209 1210 1211 1212 1213 1214 1215 1216 1217 1218 1219 1220 1221 1222 1223 1224 1225 1226 1227 1228 1229 1230 1231 1232 1233 1234 1235 1236 1237 1238 1239 1240 1241 1242 1243 |
return ptr - buf; } /* sm501fb_debug_show_crt * * show the crt control and cursor registers */ static ssize_t sm501fb_debug_show_crt(struct device *dev, struct device_attribute *attr, char *buf) { struct sm501fb_info *info = dev_get_drvdata(dev); char *ptr = buf; ptr += sm501fb_show_regs(info, ptr, SM501_DC_CRT_CONTROL, 0x40); ptr += sm501fb_show_regs(info, ptr, SM501_DC_CRT_HWC_BASE, 0x10); return ptr - buf; } static DEVICE_ATTR(fbregs_crt, 0444, sm501fb_debug_show_crt, NULL); /* sm501fb_debug_show_pnl * * show the panel control and cursor registers */ static ssize_t sm501fb_debug_show_pnl(struct device *dev, struct device_attribute *attr, char *buf) { struct sm501fb_info *info = dev_get_drvdata(dev); char *ptr = buf; ptr += sm501fb_show_regs(info, ptr, 0x0, 0x40); ptr += sm501fb_show_regs(info, ptr, SM501_DC_PANEL_HWC_BASE, 0x10); return ptr - buf; } static DEVICE_ATTR(fbregs_pnl, 0444, sm501fb_debug_show_pnl, NULL); |
9265576da sm501: implement ... |
1244 1245 1246 1247 1248 1249 1250 1251 1252 |
/* acceleration operations */ static int sm501fb_sync(struct fb_info *info) { int count = 1000000; struct sm501fb_par *par = info->par; struct sm501fb_info *fbi = par->info; /* wait for the 2d engine to be ready */ while ((count > 0) && |
bf5f00190 video, sm501: add... |
1253 |
(smc501_readl(fbi->regs + SM501_SYSTEM_CONTROL) & |
9265576da sm501: implement ... |
1254 1255 1256 1257 1258 1259 1260 1261 1262 1263 1264 1265 1266 1267 1268 1269 1270 1271 1272 1273 1274 1275 1276 1277 1278 1279 1280 1281 1282 1283 1284 1285 1286 1287 1288 1289 1290 1291 1292 1293 1294 1295 1296 1297 1298 1299 1300 1301 1302 1303 1304 1305 1306 1307 1308 |
SM501_SYSCTRL_2D_ENGINE_STATUS) != 0) count--; if (count <= 0) { dev_err(info->dev, "Timeout waiting for 2d engine sync "); return 1; } return 0; } static void sm501fb_copyarea(struct fb_info *info, const struct fb_copyarea *area) { struct sm501fb_par *par = info->par; struct sm501fb_info *fbi = par->info; int width = area->width; int height = area->height; int sx = area->sx; int sy = area->sy; int dx = area->dx; int dy = area->dy; unsigned long rtl = 0; /* source clip */ if ((sx >= info->var.xres_virtual) || (sy >= info->var.yres_virtual)) /* source Area not within virtual screen, skipping */ return; if ((sx + width) >= info->var.xres_virtual) width = info->var.xres_virtual - sx - 1; if ((sy + height) >= info->var.yres_virtual) height = info->var.yres_virtual - sy - 1; /* dest clip */ if ((dx >= info->var.xres_virtual) || (dy >= info->var.yres_virtual)) /* Destination Area not within virtual screen, skipping */ return; if ((dx + width) >= info->var.xres_virtual) width = info->var.xres_virtual - dx - 1; if ((dy + height) >= info->var.yres_virtual) height = info->var.yres_virtual - dy - 1; if ((sx < dx) || (sy < dy)) { rtl = 1 << 27; sx += width - 1; dx += width - 1; sy += height - 1; dy += height - 1; } if (sm501fb_sync(info)) return; /* set the base addresses */ |
bf5f00190 video, sm501: add... |
1309 1310 1311 |
smc501_writel(par->screen.sm_addr, fbi->regs2d + SM501_2D_SOURCE_BASE); smc501_writel(par->screen.sm_addr, fbi->regs2d + SM501_2D_DESTINATION_BASE); |
9265576da sm501: implement ... |
1312 1313 |
/* set the window width */ |
bf5f00190 video, sm501: add... |
1314 |
smc501_writel((info->var.xres << 16) | info->var.xres, |
9265576da sm501: implement ... |
1315 1316 1317 |
fbi->regs2d + SM501_2D_WINDOW_WIDTH); /* set window stride */ |
bf5f00190 video, sm501: add... |
1318 |
smc501_writel((info->var.xres_virtual << 16) | info->var.xres_virtual, |
9265576da sm501: implement ... |
1319 1320 1321 1322 1323 |
fbi->regs2d + SM501_2D_PITCH); /* set data format */ switch (info->var.bits_per_pixel) { case 8: |
bf5f00190 video, sm501: add... |
1324 |
smc501_writel(0, fbi->regs2d + SM501_2D_STRETCH); |
9265576da sm501: implement ... |
1325 1326 |
break; case 16: |
bf5f00190 video, sm501: add... |
1327 |
smc501_writel(0x00100000, fbi->regs2d + SM501_2D_STRETCH); |
9265576da sm501: implement ... |
1328 1329 |
break; case 32: |
bf5f00190 video, sm501: add... |
1330 |
smc501_writel(0x00200000, fbi->regs2d + SM501_2D_STRETCH); |
9265576da sm501: implement ... |
1331 1332 1333 1334 |
break; } /* 2d compare mask */ |
bf5f00190 video, sm501: add... |
1335 |
smc501_writel(0xffffffff, fbi->regs2d + SM501_2D_COLOR_COMPARE_MASK); |
9265576da sm501: implement ... |
1336 1337 |
/* 2d mask */ |
bf5f00190 video, sm501: add... |
1338 |
smc501_writel(0xffffffff, fbi->regs2d + SM501_2D_MASK); |
9265576da sm501: implement ... |
1339 1340 |
/* source and destination x y */ |
bf5f00190 video, sm501: add... |
1341 1342 |
smc501_writel((sx << 16) | sy, fbi->regs2d + SM501_2D_SOURCE); smc501_writel((dx << 16) | dy, fbi->regs2d + SM501_2D_DESTINATION); |
9265576da sm501: implement ... |
1343 1344 |
/* w/h */ |
bf5f00190 video, sm501: add... |
1345 |
smc501_writel((width << 16) | height, fbi->regs2d + SM501_2D_DIMENSION); |
9265576da sm501: implement ... |
1346 1347 |
/* do area move */ |
bf5f00190 video, sm501: add... |
1348 |
smc501_writel(0x800000cc | rtl, fbi->regs2d + SM501_2D_CONTROL); |
9265576da sm501: implement ... |
1349 1350 1351 1352 1353 1354 1355 1356 1357 1358 1359 1360 1361 1362 1363 1364 1365 1366 1367 1368 1369 |
} static void sm501fb_fillrect(struct fb_info *info, const struct fb_fillrect *rect) { struct sm501fb_par *par = info->par; struct sm501fb_info *fbi = par->info; int width = rect->width, height = rect->height; if ((rect->dx >= info->var.xres_virtual) || (rect->dy >= info->var.yres_virtual)) /* Rectangle not within virtual screen, skipping */ return; if ((rect->dx + width) >= info->var.xres_virtual) width = info->var.xres_virtual - rect->dx - 1; if ((rect->dy + height) >= info->var.yres_virtual) height = info->var.yres_virtual - rect->dy - 1; if (sm501fb_sync(info)) return; /* set the base addresses */ |
bf5f00190 video, sm501: add... |
1370 1371 1372 |
smc501_writel(par->screen.sm_addr, fbi->regs2d + SM501_2D_SOURCE_BASE); smc501_writel(par->screen.sm_addr, fbi->regs2d + SM501_2D_DESTINATION_BASE); |
9265576da sm501: implement ... |
1373 1374 |
/* set the window width */ |
bf5f00190 video, sm501: add... |
1375 |
smc501_writel((info->var.xres << 16) | info->var.xres, |
9265576da sm501: implement ... |
1376 1377 1378 |
fbi->regs2d + SM501_2D_WINDOW_WIDTH); /* set window stride */ |
bf5f00190 video, sm501: add... |
1379 |
smc501_writel((info->var.xres_virtual << 16) | info->var.xres_virtual, |
9265576da sm501: implement ... |
1380 1381 1382 1383 1384 |
fbi->regs2d + SM501_2D_PITCH); /* set data format */ switch (info->var.bits_per_pixel) { case 8: |
bf5f00190 video, sm501: add... |
1385 |
smc501_writel(0, fbi->regs2d + SM501_2D_STRETCH); |
9265576da sm501: implement ... |
1386 1387 |
break; case 16: |
bf5f00190 video, sm501: add... |
1388 |
smc501_writel(0x00100000, fbi->regs2d + SM501_2D_STRETCH); |
9265576da sm501: implement ... |
1389 1390 |
break; case 32: |
bf5f00190 video, sm501: add... |
1391 |
smc501_writel(0x00200000, fbi->regs2d + SM501_2D_STRETCH); |
9265576da sm501: implement ... |
1392 1393 1394 1395 |
break; } /* 2d compare mask */ |
bf5f00190 video, sm501: add... |
1396 |
smc501_writel(0xffffffff, fbi->regs2d + SM501_2D_COLOR_COMPARE_MASK); |
9265576da sm501: implement ... |
1397 1398 |
/* 2d mask */ |
bf5f00190 video, sm501: add... |
1399 |
smc501_writel(0xffffffff, fbi->regs2d + SM501_2D_MASK); |
9265576da sm501: implement ... |
1400 1401 |
/* colour */ |
bf5f00190 video, sm501: add... |
1402 |
smc501_writel(rect->color, fbi->regs2d + SM501_2D_FOREGROUND); |
9265576da sm501: implement ... |
1403 1404 |
/* x y */ |
bf5f00190 video, sm501: add... |
1405 1406 |
smc501_writel((rect->dx << 16) | rect->dy, fbi->regs2d + SM501_2D_DESTINATION); |
9265576da sm501: implement ... |
1407 1408 |
/* w/h */ |
bf5f00190 video, sm501: add... |
1409 |
smc501_writel((width << 16) | height, fbi->regs2d + SM501_2D_DIMENSION); |
9265576da sm501: implement ... |
1410 1411 |
/* do rectangle fill */ |
bf5f00190 video, sm501: add... |
1412 |
smc501_writel(0x800100cc, fbi->regs2d + SM501_2D_CONTROL); |
9265576da sm501: implement ... |
1413 |
} |
5fc404e47 [PATCH] fb: SM501... |
1414 1415 1416 1417 1418 1419 1420 1421 1422 |
static struct fb_ops sm501fb_ops_crt = { .owner = THIS_MODULE, .fb_check_var = sm501fb_check_var_crt, .fb_set_par = sm501fb_set_par_crt, .fb_blank = sm501fb_blank_crt, .fb_setcolreg = sm501fb_setcolreg, .fb_pan_display = sm501fb_pan_crt, .fb_cursor = sm501fb_cursor, |
9265576da sm501: implement ... |
1423 1424 |
.fb_fillrect = sm501fb_fillrect, .fb_copyarea = sm501fb_copyarea, |
5fc404e47 [PATCH] fb: SM501... |
1425 |
.fb_imageblit = cfb_imageblit, |
9265576da sm501: implement ... |
1426 |
.fb_sync = sm501fb_sync, |
5fc404e47 [PATCH] fb: SM501... |
1427 1428 1429 1430 1431 1432 1433 1434 1435 1436 |
}; static struct fb_ops sm501fb_ops_pnl = { .owner = THIS_MODULE, .fb_check_var = sm501fb_check_var_pnl, .fb_set_par = sm501fb_set_par_pnl, .fb_pan_display = sm501fb_pan_pnl, .fb_blank = sm501fb_blank_pnl, .fb_setcolreg = sm501fb_setcolreg, .fb_cursor = sm501fb_cursor, |
9265576da sm501: implement ... |
1437 1438 |
.fb_fillrect = sm501fb_fillrect, .fb_copyarea = sm501fb_copyarea, |
5fc404e47 [PATCH] fb: SM501... |
1439 |
.fb_imageblit = cfb_imageblit, |
9265576da sm501: implement ... |
1440 |
.fb_sync = sm501fb_sync, |
5fc404e47 [PATCH] fb: SM501... |
1441 |
}; |
5fc404e47 [PATCH] fb: SM501... |
1442 1443 1444 1445 |
/* sm501_init_cursor * * initialise hw cursor parameters */ |
9540f75b2 [PATCH] drivers/v... |
1446 |
static int sm501_init_cursor(struct fb_info *fbi, unsigned int reg_base) |
5fc404e47 [PATCH] fb: SM501... |
1447 |
{ |
9b599fb2f sm501: restructur... |
1448 1449 |
struct sm501fb_par *par; struct sm501fb_info *info; |
5fc404e47 [PATCH] fb: SM501... |
1450 |
int ret; |
9b599fb2f sm501: restructur... |
1451 1452 1453 1454 1455 |
if (fbi == NULL) return 0; par = fbi->par; info = par->info; |
5fc404e47 [PATCH] fb: SM501... |
1456 |
par->cursor_regs = info->regs + reg_base; |
537a1bf05 fbdev: add mutex ... |
1457 1458 |
ret = sm501_alloc_mem(info, &par->cursor, SM501_MEMF_CURSOR, 1024, fbi->fix.smem_len); |
5fc404e47 [PATCH] fb: SM501... |
1459 1460 1461 1462 |
if (ret < 0) return ret; /* initialise the colour registers */ |
bf5f00190 video, sm501: add... |
1463 1464 |
smc501_writel(par->cursor.sm_addr, par->cursor_regs + SM501_OFF_HWC_ADDR); |
5fc404e47 [PATCH] fb: SM501... |
1465 |
|
bf5f00190 video, sm501: add... |
1466 1467 1468 |
smc501_writel(0x00, par->cursor_regs + SM501_OFF_HWC_LOC); smc501_writel(0x00, par->cursor_regs + SM501_OFF_HWC_COLOR_1_2); smc501_writel(0x00, par->cursor_regs + SM501_OFF_HWC_COLOR_3); |
5fc404e47 [PATCH] fb: SM501... |
1469 1470 1471 1472 1473 1474 1475 1476 1477 1478 1479 1480 1481 1482 |
sm501fb_sync_regs(info); return 0; } /* sm501fb_info_start * * fills the par structure claiming resources and remapping etc. */ static int sm501fb_start(struct sm501fb_info *info, struct platform_device *pdev) { struct resource *res; |
9b599fb2f sm501: restructur... |
1483 |
struct device *dev = &pdev->dev; |
b1230ee50 sm501fb: clear fr... |
1484 |
int k; |
5fc404e47 [PATCH] fb: SM501... |
1485 |
int ret; |
5fc404e47 [PATCH] fb: SM501... |
1486 1487 1488 1489 1490 1491 |
info->irq = ret = platform_get_irq(pdev, 0); if (ret < 0) { /* we currently do not use the IRQ */ dev_warn(dev, "no irq for device "); } |
9265576da sm501: implement ... |
1492 1493 |
/* allocate, reserve and remap resources for display * controller registers */ |
5fc404e47 [PATCH] fb: SM501... |
1494 1495 1496 1497 1498 1499 1500 1501 1502 |
res = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (res == NULL) { dev_err(dev, "no resource definition for registers "); ret = -ENOENT; goto err_release; } info->regs_res = request_mem_region(res->start, |
d60f6c2ba sm501: fix missin... |
1503 |
resource_size(res), |
5fc404e47 [PATCH] fb: SM501... |
1504 1505 1506 1507 1508 1509 1510 1511 |
pdev->name); if (info->regs_res == NULL) { dev_err(dev, "cannot claim registers "); ret = -ENXIO; goto err_release; } |
d60f6c2ba sm501: fix missin... |
1512 |
info->regs = ioremap(res->start, resource_size(res)); |
5fc404e47 [PATCH] fb: SM501... |
1513 1514 1515 1516 1517 1518 |
if (info->regs == NULL) { dev_err(dev, "cannot remap registers "); ret = -ENXIO; goto err_regs_res; } |
9265576da sm501: implement ... |
1519 1520 1521 1522 1523 1524 1525 1526 1527 1528 1529 1530 1531 1532 1533 1534 1535 1536 1537 1538 1539 1540 1541 1542 1543 1544 1545 1546 |
/* allocate, reserve and remap resources for 2d * controller registers */ res = platform_get_resource(pdev, IORESOURCE_MEM, 1); if (res == NULL) { dev_err(dev, "no resource definition for 2d registers "); ret = -ENOENT; goto err_regs_map; } info->regs2d_res = request_mem_region(res->start, resource_size(res), pdev->name); if (info->regs2d_res == NULL) { dev_err(dev, "cannot claim registers "); ret = -ENXIO; goto err_regs_map; } info->regs2d = ioremap(res->start, resource_size(res)); if (info->regs2d == NULL) { dev_err(dev, "cannot remap registers "); ret = -ENXIO; goto err_regs2d_res; } |
5fc404e47 [PATCH] fb: SM501... |
1547 1548 1549 1550 1551 1552 |
/* allocate, reserve resources for framebuffer */ res = platform_get_resource(pdev, IORESOURCE_MEM, 2); if (res == NULL) { dev_err(dev, "no memory resource defined "); ret = -ENXIO; |
9265576da sm501: implement ... |
1553 |
goto err_regs2d_map; |
5fc404e47 [PATCH] fb: SM501... |
1554 1555 1556 |
} info->fbmem_res = request_mem_region(res->start, |
d60f6c2ba sm501: fix missin... |
1557 |
resource_size(res), |
5fc404e47 [PATCH] fb: SM501... |
1558 1559 1560 1561 1562 |
pdev->name); if (info->fbmem_res == NULL) { dev_err(dev, "cannot claim framebuffer "); ret = -ENXIO; |
9265576da sm501: implement ... |
1563 |
goto err_regs2d_map; |
5fc404e47 [PATCH] fb: SM501... |
1564 |
} |
d60f6c2ba sm501: fix missin... |
1565 |
info->fbmem = ioremap(res->start, resource_size(res)); |
5fc404e47 [PATCH] fb: SM501... |
1566 1567 1568 1569 1570 |
if (info->fbmem == NULL) { dev_err(dev, "cannot remap framebuffer "); goto err_mem_res; } |
d60f6c2ba sm501: fix missin... |
1571 |
info->fbmem_len = resource_size(res); |
5fc404e47 [PATCH] fb: SM501... |
1572 |
|
b1230ee50 sm501fb: clear fr... |
1573 1574 1575 1576 1577 |
/* clear framebuffer memory - avoids garbage data on unused fb */ memset(info->fbmem, 0, info->fbmem_len); /* clear palette ram - undefined at power on */ for (k = 0; k < (256 * 3); k++) |
bf5f00190 video, sm501: add... |
1578 |
smc501_writel(0, info->regs + SM501_DC_PANEL_PALETTE + (k * 4)); |
b1230ee50 sm501fb: clear fr... |
1579 |
|
5fc404e47 [PATCH] fb: SM501... |
1580 1581 |
/* enable display controller */ sm501_unit_power(dev->parent, SM501_GATE_DISPLAY, 1); |
9265576da sm501: implement ... |
1582 1583 |
/* enable 2d controller */ sm501_unit_power(dev->parent, SM501_GATE_2D_ENGINE, 1); |
5fc404e47 [PATCH] fb: SM501... |
1584 |
|
9265576da sm501: implement ... |
1585 |
/* setup cursors */ |
5fc404e47 [PATCH] fb: SM501... |
1586 1587 1588 1589 1590 1591 |
sm501_init_cursor(info->fb[HEAD_CRT], SM501_DC_CRT_HWC_ADDR); sm501_init_cursor(info->fb[HEAD_PANEL], SM501_DC_PANEL_HWC_ADDR); return 0; /* everything is setup */ err_mem_res: |
d2f6b7f7a drivers/video/sm5... |
1592 1593 |
release_mem_region(info->fbmem_res->start, resource_size(info->fbmem_res)); |
5fc404e47 [PATCH] fb: SM501... |
1594 |
|
9265576da sm501: implement ... |
1595 1596 1597 1598 |
err_regs2d_map: iounmap(info->regs2d); err_regs2d_res: |
d2f6b7f7a drivers/video/sm5... |
1599 1600 |
release_mem_region(info->regs2d_res->start, resource_size(info->regs2d_res)); |
9265576da sm501: implement ... |
1601 |
|
5fc404e47 [PATCH] fb: SM501... |
1602 1603 1604 1605 |
err_regs_map: iounmap(info->regs); err_regs_res: |
d2f6b7f7a drivers/video/sm5... |
1606 1607 |
release_mem_region(info->regs_res->start, resource_size(info->regs_res)); |
5fc404e47 [PATCH] fb: SM501... |
1608 1609 1610 1611 1612 1613 1614 1615 1616 1617 1618 |
err_release: return ret; } static void sm501fb_stop(struct sm501fb_info *info) { /* disable display controller */ sm501_unit_power(info->dev->parent, SM501_GATE_DISPLAY, 0); iounmap(info->fbmem); |
d2f6b7f7a drivers/video/sm5... |
1619 1620 |
release_mem_region(info->fbmem_res->start, resource_size(info->fbmem_res)); |
5fc404e47 [PATCH] fb: SM501... |
1621 |
|
9265576da sm501: implement ... |
1622 |
iounmap(info->regs2d); |
d2f6b7f7a drivers/video/sm5... |
1623 1624 |
release_mem_region(info->regs2d_res->start, resource_size(info->regs2d_res)); |
9265576da sm501: implement ... |
1625 |
|
5fc404e47 [PATCH] fb: SM501... |
1626 |
iounmap(info->regs); |
d2f6b7f7a drivers/video/sm5... |
1627 1628 |
release_mem_region(info->regs_res->start, resource_size(info->regs_res)); |
5fc404e47 [PATCH] fb: SM501... |
1629 |
} |
9845afc8f sm501fb: fix sect... |
1630 |
static int __devinit sm501fb_init_fb(struct fb_info *fb, |
5fc404e47 [PATCH] fb: SM501... |
1631 1632 1633 1634 1635 1636 1637 1638 1639 1640 1641 1642 1643 |
enum sm501_controller head, const char *fbname) { struct sm501_platdata_fbsub *pd; struct sm501fb_par *par = fb->par; struct sm501fb_info *info = par->info; unsigned long ctrl; unsigned int enable; int ret; switch (head) { case HEAD_CRT: pd = info->pdata->fb_crt; |
bf5f00190 video, sm501: add... |
1644 |
ctrl = smc501_readl(info->regs + SM501_DC_CRT_CONTROL); |
5fc404e47 [PATCH] fb: SM501... |
1645 1646 1647 1648 1649 |
enable = (ctrl & SM501_DC_CRT_CONTROL_ENABLE) ? 1 : 0; /* ensure we set the correct source register */ if (info->pdata->fb_route != SM501_FB_CRT_PANEL) { ctrl |= SM501_DC_CRT_CONTROL_SEL; |
bf5f00190 video, sm501: add... |
1650 |
smc501_writel(ctrl, info->regs + SM501_DC_CRT_CONTROL); |
5fc404e47 [PATCH] fb: SM501... |
1651 1652 1653 1654 1655 1656 |
} break; case HEAD_PANEL: pd = info->pdata->fb_pnl; |
bf5f00190 video, sm501: add... |
1657 |
ctrl = smc501_readl(info->regs + SM501_DC_PANEL_CONTROL); |
5fc404e47 [PATCH] fb: SM501... |
1658 1659 1660 1661 1662 1663 1664 1665 1666 1667 1668 1669 1670 1671 1672 1673 1674 1675 |
enable = (ctrl & SM501_DC_PANEL_CONTROL_EN) ? 1 : 0; break; default: pd = NULL; /* stop compiler warnings */ ctrl = 0; enable = 0; BUG(); } dev_info(info->dev, "fb %s %sabled at start ", fbname, enable ? "en" : "dis"); /* check to see if our routing allows this */ if (head == HEAD_CRT && info->pdata->fb_route == SM501_FB_CRT_PANEL) { ctrl &= ~SM501_DC_CRT_CONTROL_SEL; |
bf5f00190 video, sm501: add... |
1676 |
smc501_writel(ctrl, info->regs + SM501_DC_CRT_CONTROL); |
5fc404e47 [PATCH] fb: SM501... |
1677 1678 1679 1680 1681 1682 1683 1684 |
enable = 0; } strlcpy(fb->fix.id, fbname, sizeof(fb->fix.id)); memcpy(&par->ops, (head == HEAD_CRT) ? &sm501fb_ops_crt : &sm501fb_ops_pnl, sizeof(struct fb_ops)); |
25985edce Fix common misspe... |
1685 |
/* update ops dependent on what we've been passed */ |
5fc404e47 [PATCH] fb: SM501... |
1686 1687 1688 1689 1690 |
if ((pd->flags & SM501FB_FLAG_USE_HWCURSOR) == 0) par->ops.fb_cursor = NULL; fb->fbops = &par->ops; |
9265576da sm501: implement ... |
1691 1692 |
fb->flags = FBINFO_FLAG_DEFAULT | FBINFO_READS_FAST | FBINFO_HWACCEL_COPYAREA | FBINFO_HWACCEL_FILLRECT | |
5fc404e47 [PATCH] fb: SM501... |
1693 |
FBINFO_HWACCEL_XPAN | FBINFO_HWACCEL_YPAN; |
4295f9bf7 video, sm501: add... |
1694 1695 1696 1697 1698 1699 1700 1701 1702 |
#if defined(CONFIG_OF) #ifdef __BIG_ENDIAN if (of_get_property(info->dev->parent->of_node, "little-endian", NULL)) fb->flags |= FBINFO_FOREIGN_ENDIAN; #else if (of_get_property(info->dev->parent->of_node, "big-endian", NULL)) fb->flags |= FBINFO_FOREIGN_ENDIAN; #endif #endif |
5fc404e47 [PATCH] fb: SM501... |
1703 1704 1705 1706 1707 1708 1709 1710 1711 1712 1713 1714 1715 1716 1717 1718 |
/* fixed data */ fb->fix.type = FB_TYPE_PACKED_PIXELS; fb->fix.type_aux = 0; fb->fix.xpanstep = 1; fb->fix.ypanstep = 1; fb->fix.ywrapstep = 0; fb->fix.accel = FB_ACCEL_NONE; /* screenmode */ fb->var.nonstd = 0; fb->var.activate = FB_ACTIVATE_NOW; fb->var.accel_flags = 0; fb->var.vmode = FB_VMODE_NONINTERLACED; fb->var.bits_per_pixel = 16; |
e6a049807 video, sm501: add... |
1719 1720 1721 1722 1723 1724 1725 |
if (info->edid_data) { /* Now build modedb from EDID */ fb_edid_to_monspecs(info->edid_data, &fb->monspecs); fb_videomode_to_modelist(fb->monspecs.modedb, fb->monspecs.modedb_len, &fb->modelist); } |
5fc404e47 [PATCH] fb: SM501... |
1726 1727 |
if (enable && (pd->flags & SM501FB_FLAG_USE_INIT_MODE) && 0) { /* TODO read the mode from the current display */ |
5fc404e47 [PATCH] fb: SM501... |
1728 1729 1730 1731 1732 1733 1734 1735 1736 1737 |
} else { if (pd->def_mode) { dev_info(info->dev, "using supplied mode "); fb_videomode_to_var(&fb->var, pd->def_mode); fb->var.bits_per_pixel = pd->def_bpp ? pd->def_bpp : 8; fb->var.xres_virtual = fb->var.xres; fb->var.yres_virtual = fb->var.yres; } else { |
4295f9bf7 video, sm501: add... |
1738 |
if (info->edid_data) { |
e6a049807 video, sm501: add... |
1739 1740 1741 1742 |
ret = fb_find_mode(&fb->var, fb, fb_mode, fb->monspecs.modedb, fb->monspecs.modedb_len, &sm501_default_mode, default_bpp); |
4295f9bf7 video, sm501: add... |
1743 1744 1745 |
/* edid_data is no longer needed, free it */ kfree(info->edid_data); } else { |
e6a049807 video, sm501: add... |
1746 |
ret = fb_find_mode(&fb->var, fb, |
5fc404e47 [PATCH] fb: SM501... |
1747 |
NULL, NULL, 0, NULL, 8); |
4295f9bf7 video, sm501: add... |
1748 |
} |
5fc404e47 [PATCH] fb: SM501... |
1749 |
|
e6a049807 video, sm501: add... |
1750 1751 1752 1753 1754 1755 1756 1757 1758 1759 1760 1761 1762 1763 1764 1765 1766 1767 1768 1769 1770 1771 1772 1773 1774 |
switch (ret) { case 1: dev_info(info->dev, "using mode specified in " "@mode "); break; case 2: dev_info(info->dev, "using mode specified in " "@mode with ignored refresh rate "); break; case 3: dev_info(info->dev, "using mode default " "mode "); break; case 4: dev_info(info->dev, "using mode from list "); break; default: dev_info(info->dev, "ret = %d ", ret); dev_info(info->dev, "failed to find mode "); |
5fc404e47 [PATCH] fb: SM501... |
1775 1776 1777 1778 1779 1780 |
return -EINVAL; } } } /* initialise and set the palette */ |
0a5d924e5 sm501fb: check fb... |
1781 1782 1783 1784 1785 |
if (fb_alloc_cmap(&fb->cmap, NR_PALETTE, 0)) { dev_err(info->dev, "failed to allocate cmap memory "); return -ENOMEM; } |
5fc404e47 [PATCH] fb: SM501... |
1786 1787 1788 1789 1790 1791 |
fb_set_cmap(&fb->cmap, fb); ret = (fb->fbops->fb_check_var)(&fb->var, fb); if (ret) dev_err(info->dev, "check_var() failed on initial setup? "); |
5fc404e47 [PATCH] fb: SM501... |
1792 1793 1794 1795 1796 1797 1798 1799 1800 1801 1802 1803 1804 1805 1806 1807 1808 1809 1810 1811 1812 1813 1814 1815 1816 1817 1818 1819 |
return 0; } /* default platform data if none is supplied (ie, PCI device) */ static struct sm501_platdata_fbsub sm501fb_pdata_crt = { .flags = (SM501FB_FLAG_USE_INIT_MODE | SM501FB_FLAG_USE_HWCURSOR | SM501FB_FLAG_USE_HWACCEL | SM501FB_FLAG_DISABLE_AT_EXIT), }; static struct sm501_platdata_fbsub sm501fb_pdata_pnl = { .flags = (SM501FB_FLAG_USE_INIT_MODE | SM501FB_FLAG_USE_HWCURSOR | SM501FB_FLAG_USE_HWACCEL | SM501FB_FLAG_DISABLE_AT_EXIT), }; static struct sm501_platdata_fb sm501fb_def_pdata = { .fb_route = SM501_FB_OWN, .fb_crt = &sm501fb_pdata_crt, .fb_pnl = &sm501fb_pdata_pnl, }; static char driver_name_crt[] = "sm501fb-crt"; static char driver_name_pnl[] = "sm501fb-panel"; |
9b599fb2f sm501: restructur... |
1820 1821 |
static int __devinit sm501fb_probe_one(struct sm501fb_info *info, enum sm501_controller head) |
5fc404e47 [PATCH] fb: SM501... |
1822 |
{ |
9b599fb2f sm501: restructur... |
1823 1824 1825 1826 |
unsigned char *name = (head == HEAD_CRT) ? "crt" : "panel"; struct sm501_platdata_fbsub *pd; struct sm501fb_par *par; struct fb_info *fbi; |
5fc404e47 [PATCH] fb: SM501... |
1827 |
|
9b599fb2f sm501: restructur... |
1828 |
pd = (head == HEAD_CRT) ? info->pdata->fb_crt : info->pdata->fb_pnl; |
5fc404e47 [PATCH] fb: SM501... |
1829 |
|
9b599fb2f sm501: restructur... |
1830 1831 1832 1833 1834 1835 1836 1837 1838 1839 1840 |
/* Do not initialise if we've not been given any platform data */ if (pd == NULL) { dev_info(info->dev, "no data for fb %s (disabled) ", name); return 0; } fbi = framebuffer_alloc(sizeof(struct sm501fb_par), info->dev); if (fbi == NULL) { dev_err(info->dev, "cannot allocate %s framebuffer ", name); |
5fc404e47 [PATCH] fb: SM501... |
1841 1842 |
return -ENOMEM; } |
9b599fb2f sm501: restructur... |
1843 1844 1845 1846 1847 1848 1849 1850 1851 1852 1853 1854 1855 1856 1857 1858 1859 1860 1861 1862 1863 1864 1865 1866 1867 1868 1869 1870 1871 |
par = fbi->par; par->info = info; par->head = head; fbi->pseudo_palette = &par->pseudo_palette; info->fb[head] = fbi; return 0; } /* Free up anything allocated by sm501fb_init_fb */ static void sm501_free_init_fb(struct sm501fb_info *info, enum sm501_controller head) { struct fb_info *fbi = info->fb[head]; fb_dealloc_cmap(&fbi->cmap); } static int __devinit sm501fb_start_one(struct sm501fb_info *info, enum sm501_controller head, const char *drvname) { struct fb_info *fbi = info->fb[head]; int ret; if (!fbi) return 0; |
6c96895e9 Revert "fb: Initi... |
1872 |
mutex_init(&info->fb[head]->mm_lock); |
9b599fb2f sm501: restructur... |
1873 1874 1875 1876 1877 1878 1879 1880 1881 1882 1883 1884 1885 |
ret = sm501fb_init_fb(info->fb[head], head, drvname); if (ret) { dev_err(info->dev, "cannot initialise fb %s ", drvname); return ret; } ret = register_framebuffer(info->fb[head]); if (ret) { dev_err(info->dev, "failed to register fb %s ", drvname); sm501_free_init_fb(info, head); return ret; |
5fc404e47 [PATCH] fb: SM501... |
1886 |
} |
9b599fb2f sm501: restructur... |
1887 1888 1889 1890 1891 1892 1893 1894 1895 1896 1897 1898 1899 1900 1901 1902 1903 1904 1905 |
dev_info(info->dev, "fb%d: %s frame buffer ", fbi->node, fbi->fix.id); return 0; } static int __devinit sm501fb_probe(struct platform_device *pdev) { struct sm501fb_info *info; struct device *dev = &pdev->dev; int ret; /* allocate our framebuffers */ info = kzalloc(sizeof(struct sm501fb_info), GFP_KERNEL); if (!info) { dev_err(dev, "failed to allocate state "); return -ENOMEM; |
5fc404e47 [PATCH] fb: SM501... |
1906 |
} |
9b599fb2f sm501: restructur... |
1907 1908 |
info->dev = dev = &pdev->dev; platform_set_drvdata(pdev, info); |
5fc404e47 [PATCH] fb: SM501... |
1909 1910 1911 1912 1913 1914 |
if (dev->parent->platform_data) { struct sm501_platdata *pd = dev->parent->platform_data; info->pdata = pd->fb; } if (info->pdata == NULL) { |
4295f9bf7 video, sm501: add... |
1915 1916 1917 1918 1919 1920 |
int found = 0; #if defined(CONFIG_OF) struct device_node *np = pdev->dev.parent->of_node; const u8 *prop; const char *cp; int len; |
5fc404e47 [PATCH] fb: SM501... |
1921 |
info->pdata = &sm501fb_def_pdata; |
4295f9bf7 video, sm501: add... |
1922 1923 1924 1925 1926 1927 1928 1929 1930 1931 1932 1933 1934 1935 1936 1937 1938 1939 1940 |
if (np) { /* Get EDID */ cp = of_get_property(np, "mode", &len); if (cp) strcpy(fb_mode, cp); prop = of_get_property(np, "edid", &len); if (prop && len == EDID_LENGTH) { info->edid_data = kmemdup(prop, EDID_LENGTH, GFP_KERNEL); if (info->edid_data) found = 1; } } #endif if (!found) { dev_info(dev, "using default configuration data "); info->pdata = &sm501fb_def_pdata; } |
5fc404e47 [PATCH] fb: SM501... |
1941 |
} |
9b599fb2f sm501: restructur... |
1942 |
/* probe for the presence of each panel */ |
5fc404e47 [PATCH] fb: SM501... |
1943 |
|
9b599fb2f sm501: restructur... |
1944 1945 1946 1947 1948 |
ret = sm501fb_probe_one(info, HEAD_CRT); if (ret < 0) { dev_err(dev, "failed to probe CRT "); goto err_alloc; |
5fc404e47 [PATCH] fb: SM501... |
1949 |
} |
9b599fb2f sm501: restructur... |
1950 1951 1952 1953 1954 1955 |
ret = sm501fb_probe_one(info, HEAD_PANEL); if (ret < 0) { dev_err(dev, "failed to probe PANEL "); goto err_probed_crt; } |
5fc404e47 [PATCH] fb: SM501... |
1956 |
|
9b599fb2f sm501: restructur... |
1957 1958 1959 1960 1961 |
if (info->fb[HEAD_PANEL] == NULL && info->fb[HEAD_CRT] == NULL) { dev_err(dev, "no framebuffers found "); goto err_alloc; |
5fc404e47 [PATCH] fb: SM501... |
1962 |
} |
9b599fb2f sm501: restructur... |
1963 |
/* get the resources for both of the framebuffers */ |
5fc404e47 [PATCH] fb: SM501... |
1964 |
|
9b599fb2f sm501: restructur... |
1965 |
ret = sm501fb_start(info, pdev); |
5fc404e47 [PATCH] fb: SM501... |
1966 |
if (ret) { |
9b599fb2f sm501: restructur... |
1967 1968 1969 |
dev_err(dev, "cannot initialise SM501 "); goto err_probed_panel; |
5fc404e47 [PATCH] fb: SM501... |
1970 |
} |
9b599fb2f sm501: restructur... |
1971 1972 1973 1974 1975 |
ret = sm501fb_start_one(info, HEAD_CRT, driver_name_crt); if (ret) { dev_err(dev, "failed to start CRT "); goto err_started; |
5fc404e47 [PATCH] fb: SM501... |
1976 |
} |
9b599fb2f sm501: restructur... |
1977 1978 1979 1980 1981 |
ret = sm501fb_start_one(info, HEAD_PANEL, driver_name_pnl); if (ret) { dev_err(dev, "failed to start Panel "); goto err_started_crt; |
5fc404e47 [PATCH] fb: SM501... |
1982 |
} |
5fc404e47 [PATCH] fb: SM501... |
1983 1984 1985 1986 |
/* create device files */ ret = device_create_file(dev, &dev_attr_crt_src); if (ret) |
9b599fb2f sm501: restructur... |
1987 |
goto err_started_panel; |
5fc404e47 [PATCH] fb: SM501... |
1988 1989 1990 |
ret = device_create_file(dev, &dev_attr_fbregs_pnl); if (ret) |
9b599fb2f sm501: restructur... |
1991 |
goto err_attached_crtsrc_file; |
5fc404e47 [PATCH] fb: SM501... |
1992 1993 1994 |
ret = device_create_file(dev, &dev_attr_fbregs_crt); if (ret) |
9b599fb2f sm501: restructur... |
1995 |
goto err_attached_pnlregs_file; |
5fc404e47 [PATCH] fb: SM501... |
1996 1997 1998 |
/* we registered, return ok */ return 0; |
9b599fb2f sm501: restructur... |
1999 |
err_attached_pnlregs_file: |
5fc404e47 [PATCH] fb: SM501... |
2000 |
device_remove_file(dev, &dev_attr_fbregs_pnl); |
9b599fb2f sm501: restructur... |
2001 |
err_attached_crtsrc_file: |
5fc404e47 [PATCH] fb: SM501... |
2002 |
device_remove_file(dev, &dev_attr_crt_src); |
9b599fb2f sm501: restructur... |
2003 2004 2005 |
err_started_panel: unregister_framebuffer(info->fb[HEAD_PANEL]); sm501_free_init_fb(info, HEAD_PANEL); |
5fc404e47 [PATCH] fb: SM501... |
2006 |
|
9b599fb2f sm501: restructur... |
2007 2008 2009 |
err_started_crt: unregister_framebuffer(info->fb[HEAD_CRT]); sm501_free_init_fb(info, HEAD_CRT); |
5fc404e47 [PATCH] fb: SM501... |
2010 |
|
9b599fb2f sm501: restructur... |
2011 |
err_started: |
5fc404e47 [PATCH] fb: SM501... |
2012 |
sm501fb_stop(info); |
9b599fb2f sm501: restructur... |
2013 2014 |
err_probed_panel: framebuffer_release(info->fb[HEAD_PANEL]); |
5fc404e47 [PATCH] fb: SM501... |
2015 |
|
9b599fb2f sm501: restructur... |
2016 2017 |
err_probed_crt: framebuffer_release(info->fb[HEAD_CRT]); |
5fc404e47 [PATCH] fb: SM501... |
2018 |
|
9b599fb2f sm501: restructur... |
2019 2020 |
err_alloc: kfree(info); |
5fc404e47 [PATCH] fb: SM501... |
2021 2022 2023 2024 2025 2026 2027 2028 2029 2030 2031 2032 2033 2034 2035 2036 2037 |
return ret; } /* * Cleanup */ static int sm501fb_remove(struct platform_device *pdev) { struct sm501fb_info *info = platform_get_drvdata(pdev); struct fb_info *fbinfo_crt = info->fb[0]; struct fb_info *fbinfo_pnl = info->fb[1]; device_remove_file(&pdev->dev, &dev_attr_fbregs_crt); device_remove_file(&pdev->dev, &dev_attr_fbregs_pnl); device_remove_file(&pdev->dev, &dev_attr_crt_src); |
9b599fb2f sm501: restructur... |
2038 2039 |
sm501_free_init_fb(info, HEAD_CRT); sm501_free_init_fb(info, HEAD_PANEL); |
5fc404e47 [PATCH] fb: SM501... |
2040 2041 2042 2043 |
unregister_framebuffer(fbinfo_crt); unregister_framebuffer(fbinfo_pnl); sm501fb_stop(info); |
9b599fb2f sm501: restructur... |
2044 |
kfree(info); |
5fc404e47 [PATCH] fb: SM501... |
2045 2046 2047 2048 2049 2050 2051 2052 2053 2054 2055 2056 2057 2058 2059 2060 2061 |
framebuffer_release(fbinfo_pnl); framebuffer_release(fbinfo_crt); return 0; } #ifdef CONFIG_PM static int sm501fb_suspend_fb(struct sm501fb_info *info, enum sm501_controller head) { struct fb_info *fbi = info->fb[head]; struct sm501fb_par *par = fbi->par; if (par->screen.size == 0) return 0; |
40488db20 FB/SM501: ensure ... |
2062 2063 2064 2065 |
/* blank the relevant interface to ensure unit power minimised */ (par->ops.fb_blank)(FB_BLANK_POWERDOWN, fbi); /* tell console/fb driver we are suspending */ |
ac751efa6 console: rename a... |
2066 |
console_lock(); |
40488db20 FB/SM501: ensure ... |
2067 |
fb_set_suspend(fbi, 1); |
ac751efa6 console: rename a... |
2068 |
console_unlock(); |
40488db20 FB/SM501: ensure ... |
2069 |
|
5fc404e47 [PATCH] fb: SM501... |
2070 2071 2072 2073 2074 2075 2076 2077 2078 2079 2080 2081 2082 2083 2084 |
/* backup copies in case chip is powered down over suspend */ par->store_fb = vmalloc(par->screen.size); if (par->store_fb == NULL) { dev_err(info->dev, "no memory to store screen "); return -ENOMEM; } par->store_cursor = vmalloc(par->cursor.size); if (par->store_cursor == NULL) { dev_err(info->dev, "no memory to store cursor "); goto err_nocursor; } |
c1f303bb2 sm501fb: update s... |
2085 2086 2087 2088 |
dev_dbg(info->dev, "suspending screen to %p ", par->store_fb); dev_dbg(info->dev, "suspending cursor to %p ", par->store_cursor); |
5fc404e47 [PATCH] fb: SM501... |
2089 2090 |
memcpy_fromio(par->store_fb, par->screen.k_addr, par->screen.size); memcpy_fromio(par->store_cursor, par->cursor.k_addr, par->cursor.size); |
f22e521f2 sm501fb: Call fb ... |
2091 |
|
5fc404e47 [PATCH] fb: SM501... |
2092 2093 2094 2095 |
return 0; err_nocursor: vfree(par->store_fb); |
c1f303bb2 sm501fb: update s... |
2096 |
par->store_fb = NULL; |
5fc404e47 [PATCH] fb: SM501... |
2097 2098 |
return -ENOMEM; |
5fc404e47 [PATCH] fb: SM501... |
2099 2100 2101 2102 2103 2104 2105 2106 2107 2108 2109 2110 2111 2112 2113 2114 |
} static void sm501fb_resume_fb(struct sm501fb_info *info, enum sm501_controller head) { struct fb_info *fbi = info->fb[head]; struct sm501fb_par *par = fbi->par; if (par->screen.size == 0) return; /* re-activate the configuration */ (par->ops.fb_set_par)(fbi); /* restore the data */ |
c1f303bb2 sm501fb: update s... |
2115 2116 2117 2118 2119 2120 2121 2122 2123 2124 2125 2126 |
dev_dbg(info->dev, "restoring screen from %p ", par->store_fb); dev_dbg(info->dev, "restoring cursor from %p ", par->store_cursor); if (par->store_fb) memcpy_toio(par->screen.k_addr, par->store_fb, par->screen.size); if (par->store_cursor) memcpy_toio(par->cursor.k_addr, par->store_cursor, par->cursor.size); |
5fc404e47 [PATCH] fb: SM501... |
2127 |
|
ac751efa6 console: rename a... |
2128 |
console_lock(); |
f22e521f2 sm501fb: Call fb ... |
2129 |
fb_set_suspend(fbi, 0); |
ac751efa6 console: rename a... |
2130 |
console_unlock(); |
f22e521f2 sm501fb: Call fb ... |
2131 |
|
5fc404e47 [PATCH] fb: SM501... |
2132 2133 2134 2135 2136 2137 2138 2139 2140 2141 |
vfree(par->store_fb); vfree(par->store_cursor); } /* suspend and resume support */ static int sm501fb_suspend(struct platform_device *pdev, pm_message_t state) { struct sm501fb_info *info = platform_get_drvdata(pdev); |
c1f303bb2 sm501fb: update s... |
2142 |
/* store crt control to resume with */ |
bf5f00190 video, sm501: add... |
2143 |
info->pm_crt_ctrl = smc501_readl(info->regs + SM501_DC_CRT_CONTROL); |
c1f303bb2 sm501fb: update s... |
2144 |
|
5fc404e47 [PATCH] fb: SM501... |
2145 2146 2147 2148 2149 2150 2151 2152 |
sm501fb_suspend_fb(info, HEAD_CRT); sm501fb_suspend_fb(info, HEAD_PANEL); /* turn off the clocks, in case the device is not powered down */ sm501_unit_power(info->dev->parent, SM501_GATE_DISPLAY, 0); return 0; } |
c1f303bb2 sm501fb: update s... |
2153 2154 |
#define SM501_CRT_CTRL_SAVE (SM501_DC_CRT_CONTROL_TVP | \ SM501_DC_CRT_CONTROL_SEL) |
5fc404e47 [PATCH] fb: SM501... |
2155 2156 2157 |
static int sm501fb_resume(struct platform_device *pdev) { struct sm501fb_info *info = platform_get_drvdata(pdev); |
c1f303bb2 sm501fb: update s... |
2158 |
unsigned long crt_ctrl; |
5fc404e47 [PATCH] fb: SM501... |
2159 2160 |
sm501_unit_power(info->dev->parent, SM501_GATE_DISPLAY, 1); |
c1f303bb2 sm501fb: update s... |
2161 |
/* restore the items we want to be saved for crt control */ |
bf5f00190 video, sm501: add... |
2162 |
crt_ctrl = smc501_readl(info->regs + SM501_DC_CRT_CONTROL); |
c1f303bb2 sm501fb: update s... |
2163 2164 |
crt_ctrl &= ~SM501_CRT_CTRL_SAVE; crt_ctrl |= info->pm_crt_ctrl & SM501_CRT_CTRL_SAVE; |
bf5f00190 video, sm501: add... |
2165 |
smc501_writel(crt_ctrl, info->regs + SM501_DC_CRT_CONTROL); |
c1f303bb2 sm501fb: update s... |
2166 |
|
5fc404e47 [PATCH] fb: SM501... |
2167 2168 2169 2170 2171 2172 2173 2174 2175 2176 2177 2178 2179 2180 2181 2182 2183 2184 2185 2186 2187 |
sm501fb_resume_fb(info, HEAD_CRT); sm501fb_resume_fb(info, HEAD_PANEL); return 0; } #else #define sm501fb_suspend NULL #define sm501fb_resume NULL #endif static struct platform_driver sm501fb_driver = { .probe = sm501fb_probe, .remove = sm501fb_remove, .suspend = sm501fb_suspend, .resume = sm501fb_resume, .driver = { .name = "sm501-fb", .owner = THIS_MODULE, }, }; |
4277f2c46 video: convert dr... |
2188 |
module_platform_driver(sm501fb_driver); |
5fc404e47 [PATCH] fb: SM501... |
2189 |
|
e6a049807 video, sm501: add... |
2190 2191 2192 2193 2194 |
module_param_named(mode, fb_mode, charp, 0); MODULE_PARM_DESC(mode, "Specify resolution as \"<xres>x<yres>[-<bpp>][@<refresh>]\" "); module_param_named(bpp, default_bpp, ulong, 0); MODULE_PARM_DESC(bpp, "Specify bit-per-pixel if not specified mode"); |
5fc404e47 [PATCH] fb: SM501... |
2195 2196 2197 |
MODULE_AUTHOR("Ben Dooks, Vincent Sanders"); MODULE_DESCRIPTION("SM501 Framebuffer driver"); MODULE_LICENSE("GPL v2"); |