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arch/arm/boot/dts/rk3288-veyron-speedy.dts
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/* * Google Veyron Speedy Rev 1+ board device tree source * * Copyright 2015 Google, Inc * * This file is dual-licensed: you can use it either under the terms * of the GPL or the X11 license, at your option. Note that this dual * licensing only applies to this file, and not this project as a * whole. * * a) This file is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation; either version 2 of the * License, or (at your option) any later version. * * This file is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, * copy, modify, merge, publish, distribute, sublicense, and/or * sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following * conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. */ /dts-v1/; #include "rk3288-veyron-chromebook.dtsi" #include "cros-ec-sbs.dtsi" / { model = "Google Speedy"; compatible = "google,veyron-speedy-rev9", "google,veyron-speedy-rev8", "google,veyron-speedy-rev7", "google,veyron-speedy-rev6", "google,veyron-speedy-rev5", "google,veyron-speedy-rev4", "google,veyron-speedy-rev3", "google,veyron-speedy-rev2", "google,veyron-speedy", "google,veyron", "rockchip,rk3288"; panel_regulator: panel-regulator { compatible = "regulator-fixed"; enable-active-high; |
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gpio = <&gpio7 RK_PB6 GPIO_ACTIVE_HIGH>; |
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pinctrl-names = "default"; pinctrl-0 = <&lcd_enable_h>; regulator-name = "panel_regulator"; |
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startup-delay-us = <100000>; |
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vin-supply = <&vcc33_sys>; }; vcc18_lcd: vcc18-lcd { compatible = "regulator-fixed"; enable-active-high; |
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gpio = <&gpio2 RK_PB5 GPIO_ACTIVE_HIGH>; |
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pinctrl-names = "default"; pinctrl-0 = <&avdd_1v8_disp_en>; regulator-name = "vcc18_lcd"; regulator-always-on; regulator-boot-on; vin-supply = <&vcc18_wl>; }; backlight_regulator: backlight-regulator { compatible = "regulator-fixed"; enable-active-high; |
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gpio = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>; |
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pinctrl-names = "default"; pinctrl-0 = <&bl_pwr_en>; regulator-name = "backlight_regulator"; vin-supply = <&vcc33_sys>; startup-delay-us = <15000>; }; }; |
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&backlight { power-supply = <&backlight_regulator>; }; |
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&cpu_alert0 { temperature = <65000>; }; &cpu_alert1 { temperature = <70000>; }; |
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&edp { /delete-property/pinctrl-names; /delete-property/pinctrl-0; force-hpd; }; |
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&panel { power-supply= <&panel_regulator>; }; |
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&rk808 { pinctrl-names = "default"; pinctrl-0 = <&pmic_int_l>; }; &sdmmc { disable-wp; pinctrl-names = "default"; pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_gpio &sdmmc_bus4>; }; &vcc_5v { enable-active-high; |
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gpio = <&gpio7 RK_PC5 GPIO_ACTIVE_HIGH>; |
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pinctrl-names = "default"; pinctrl-0 = <&drv_5v>; }; &vcc50_hdmi { enable-active-high; |
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gpio = <&gpio5 RK_PC3 GPIO_ACTIVE_HIGH>; |
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pinctrl-names = "default"; pinctrl-0 = <&vcc50_hdmi_en>; }; &pinctrl { backlight { bl_pwr_en: bl_pwr_en { rockchip,pins = <2 12 RK_FUNC_GPIO &pcfg_pull_none>; }; }; buck-5v { drv_5v: drv-5v { rockchip,pins = <7 21 RK_FUNC_GPIO &pcfg_pull_none>; }; }; hdmi { vcc50_hdmi_en: vcc50-hdmi-en { rockchip,pins = <5 19 RK_FUNC_GPIO &pcfg_pull_none>; }; }; lcd { lcd_enable_h: lcd-en { rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_pull_none>; }; avdd_1v8_disp_en: avdd-1v8-disp-en { rockchip,pins = <2 13 RK_FUNC_GPIO &pcfg_pull_none>; }; }; pmic { dvs_1: dvs-1 { rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_down>; }; dvs_2: dvs-2 { rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>; }; }; }; |