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drivers/rtc/rtc-sh.c
18.3 KB
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/* * SuperH On-Chip RTC Support * |
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* Copyright (C) 2006 - 2009 Paul Mundt |
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* Copyright (C) 2006 Jamie Lenehan |
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* Copyright (C) 2008 Angelo Castello |
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* * Based on the old arch/sh/kernel/cpu/rtc.c by: * * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org> * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. */ #include <linux/module.h> #include <linux/kernel.h> #include <linux/bcd.h> #include <linux/rtc.h> #include <linux/init.h> #include <linux/platform_device.h> #include <linux/seq_file.h> #include <linux/interrupt.h> #include <linux/spinlock.h> |
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#include <linux/io.h> |
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#include <linux/log2.h> |
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#include <linux/clk.h> |
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#include <linux/slab.h> |
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#include <asm/rtc.h> |
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#define DRV_NAME "sh-rtc" |
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#define RTC_REG(r) ((r) * rtc_reg_size) |
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#define R64CNT RTC_REG(0) |
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#define RSECCNT RTC_REG(1) /* RTC sec */ #define RMINCNT RTC_REG(2) /* RTC min */ #define RHRCNT RTC_REG(3) /* RTC hour */ #define RWKCNT RTC_REG(4) /* RTC week */ #define RDAYCNT RTC_REG(5) /* RTC day */ #define RMONCNT RTC_REG(6) /* RTC month */ #define RYRCNT RTC_REG(7) /* RTC year */ #define RSECAR RTC_REG(8) /* ALARM sec */ #define RMINAR RTC_REG(9) /* ALARM min */ #define RHRAR RTC_REG(10) /* ALARM hour */ #define RWKAR RTC_REG(11) /* ALARM week */ #define RDAYAR RTC_REG(12) /* ALARM day */ #define RMONAR RTC_REG(13) /* ALARM month */ #define RCR1 RTC_REG(14) /* Control */ #define RCR2 RTC_REG(15) /* Control */ |
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/* * Note on RYRAR and RCR3: Up until this point most of the register * definitions are consistent across all of the available parts. However, * the placement of the optional RYRAR and RCR3 (the RYRAR control * register used to control RYRCNT/RYRAR compare) varies considerably * across various parts, occasionally being mapped in to a completely * unrelated address space. For proper RYRAR support a separate resource * would have to be handed off, but as this is purely optional in * practice, we simply opt not to support it, thereby keeping the code * quite a bit more simplified. */ |
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/* ALARM Bits - or with BCD encoded value */ #define AR_ENB 0x80 /* Enable for alarm cmp */ |
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/* Period Bits */ #define PF_HP 0x100 /* Enable Half Period to support 8,32,128Hz */ #define PF_COUNT 0x200 /* Half periodic counter */ #define PF_OXS 0x400 /* Periodic One x Second */ #define PF_KOU 0x800 /* Kernel or User periodic request 1=kernel */ #define PF_MASK 0xf00 |
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/* RCR1 Bits */ #define RCR1_CF 0x80 /* Carry Flag */ #define RCR1_CIE 0x10 /* Carry Interrupt Enable */ #define RCR1_AIE 0x08 /* Alarm Interrupt Enable */ #define RCR1_AF 0x01 /* Alarm Flag */ /* RCR2 Bits */ #define RCR2_PEF 0x80 /* PEriodic interrupt Flag */ #define RCR2_PESMASK 0x70 /* Periodic interrupt Set */ #define RCR2_RTCEN 0x08 /* ENable RTC */ #define RCR2_ADJ 0x04 /* ADJustment (30-second) */ #define RCR2_RESET 0x02 /* Reset bit */ #define RCR2_START 0x01 /* Start bit */ struct sh_rtc { |
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void __iomem *regbase; unsigned long regsize; struct resource *res; int alarm_irq; int periodic_irq; int carry_irq; struct clk *clk; struct rtc_device *rtc_dev; spinlock_t lock; unsigned long capabilities; /* See asm/rtc.h for cap bits */ unsigned short periodic_freq; |
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}; |
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static int __sh_rtc_interrupt(struct sh_rtc *rtc) |
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{ |
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unsigned int tmp, pending; |
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tmp = readb(rtc->regbase + RCR1); |
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pending = tmp & RCR1_CF; |
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tmp &= ~RCR1_CF; |
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writeb(tmp, rtc->regbase + RCR1); |
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/* Users have requested One x Second IRQ */ |
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if (pending && rtc->periodic_freq & PF_OXS) |
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rtc_update_irq(rtc->rtc_dev, 1, RTC_UF | RTC_IRQF); |
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return pending; |
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} |
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static int __sh_rtc_alarm(struct sh_rtc *rtc) |
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{ |
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unsigned int tmp, pending; |
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tmp = readb(rtc->regbase + RCR1); |
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pending = tmp & RCR1_AF; |
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tmp &= ~(RCR1_AF | RCR1_AIE); |
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writeb(tmp, rtc->regbase + RCR1); |
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if (pending) rtc_update_irq(rtc->rtc_dev, 1, RTC_AF | RTC_IRQF); |
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return pending; |
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} |
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static int __sh_rtc_periodic(struct sh_rtc *rtc) |
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{ |
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struct rtc_device *rtc_dev = rtc->rtc_dev; |
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struct rtc_task *irq_task; unsigned int tmp, pending; |
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tmp = readb(rtc->regbase + RCR2); |
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pending = tmp & RCR2_PEF; |
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tmp &= ~RCR2_PEF; writeb(tmp, rtc->regbase + RCR2); |
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if (!pending) return 0; |
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/* Half period enabled than one skipped and the next notified */ if ((rtc->periodic_freq & PF_HP) && (rtc->periodic_freq & PF_COUNT)) rtc->periodic_freq &= ~PF_COUNT; else { if (rtc->periodic_freq & PF_HP) rtc->periodic_freq |= PF_COUNT; if (rtc->periodic_freq & PF_KOU) { spin_lock(&rtc_dev->irq_task_lock); |
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irq_task = rtc_dev->irq_task; if (irq_task) irq_task->func(irq_task->private_data); |
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spin_unlock(&rtc_dev->irq_task_lock); } else rtc_update_irq(rtc->rtc_dev, 1, RTC_PF | RTC_IRQF); } |
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return pending; } static irqreturn_t sh_rtc_interrupt(int irq, void *dev_id) { struct sh_rtc *rtc = dev_id; int ret; spin_lock(&rtc->lock); ret = __sh_rtc_interrupt(rtc); spin_unlock(&rtc->lock); return IRQ_RETVAL(ret); } static irqreturn_t sh_rtc_alarm(int irq, void *dev_id) { struct sh_rtc *rtc = dev_id; int ret; spin_lock(&rtc->lock); ret = __sh_rtc_alarm(rtc); spin_unlock(&rtc->lock); return IRQ_RETVAL(ret); } static irqreturn_t sh_rtc_periodic(int irq, void *dev_id) { struct sh_rtc *rtc = dev_id; int ret; spin_lock(&rtc->lock); ret = __sh_rtc_periodic(rtc); |
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spin_unlock(&rtc->lock); |
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return IRQ_RETVAL(ret); } static irqreturn_t sh_rtc_shared(int irq, void *dev_id) { struct sh_rtc *rtc = dev_id; int ret; spin_lock(&rtc->lock); ret = __sh_rtc_interrupt(rtc); ret |= __sh_rtc_alarm(rtc); ret |= __sh_rtc_periodic(rtc); spin_unlock(&rtc->lock); return IRQ_RETVAL(ret); |
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} |
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static int sh_rtc_irq_set_state(struct device *dev, int enable) |
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{ struct sh_rtc *rtc = dev_get_drvdata(dev); unsigned int tmp; spin_lock_irq(&rtc->lock); tmp = readb(rtc->regbase + RCR2); if (enable) { |
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rtc->periodic_freq |= PF_KOU; |
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tmp &= ~RCR2_PEF; /* Clear PES bit */ tmp |= (rtc->periodic_freq & ~PF_HP); /* Set PES2-0 */ |
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} else { rtc->periodic_freq &= ~PF_KOU; |
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tmp &= ~(RCR2_PESMASK | RCR2_PEF); |
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} |
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writeb(tmp, rtc->regbase + RCR2); spin_unlock_irq(&rtc->lock); |
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return 0; |
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} |
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static int sh_rtc_irq_set_freq(struct device *dev, int freq) |
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{ struct sh_rtc *rtc = dev_get_drvdata(dev); |
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int tmp, ret = 0; |
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spin_lock_irq(&rtc->lock); |
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tmp = rtc->periodic_freq & PF_MASK; |
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switch (freq) { case 0: rtc->periodic_freq = 0x00; break; case 1: rtc->periodic_freq = 0x60; break; case 2: rtc->periodic_freq = 0x50; break; case 4: rtc->periodic_freq = 0x40; break; case 8: rtc->periodic_freq = 0x30 | PF_HP; break; case 16: rtc->periodic_freq = 0x30; break; case 32: rtc->periodic_freq = 0x20 | PF_HP; break; case 64: rtc->periodic_freq = 0x20; break; case 128: rtc->periodic_freq = 0x10 | PF_HP; break; case 256: rtc->periodic_freq = 0x10; break; default: ret = -ENOTSUPP; } |
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if (ret == 0) |
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rtc->periodic_freq |= tmp; |
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spin_unlock_irq(&rtc->lock); |
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return ret; |
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} |
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static inline void sh_rtc_setaie(struct device *dev, unsigned int enable) |
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{ struct sh_rtc *rtc = dev_get_drvdata(dev); unsigned int tmp; |
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spin_lock_irq(&rtc->lock); |
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tmp = readb(rtc->regbase + RCR1); |
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if (enable) |
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tmp |= RCR1_AIE; |
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else tmp &= ~RCR1_AIE; |
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writeb(tmp, rtc->regbase + RCR1); |
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spin_unlock_irq(&rtc->lock); |
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} |
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static int sh_rtc_proc(struct device *dev, struct seq_file *seq) { struct sh_rtc *rtc = dev_get_drvdata(dev); unsigned int tmp; tmp = readb(rtc->regbase + RCR1); |
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seq_printf(seq, "carry_IRQ\t: %s ", (tmp & RCR1_CIE) ? "yes" : "no"); |
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tmp = readb(rtc->regbase + RCR2); seq_printf(seq, "periodic_IRQ\t: %s ", |
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(tmp & RCR2_PESMASK) ? "yes" : "no"); |
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return 0; } |
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static inline void sh_rtc_setcie(struct device *dev, unsigned int enable) { struct sh_rtc *rtc = dev_get_drvdata(dev); unsigned int tmp; spin_lock_irq(&rtc->lock); tmp = readb(rtc->regbase + RCR1); if (!enable) tmp &= ~RCR1_CIE; else tmp |= RCR1_CIE; writeb(tmp, rtc->regbase + RCR1); spin_unlock_irq(&rtc->lock); } |
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static int sh_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) { sh_rtc_setaie(dev, enabled); return 0; } |
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static int sh_rtc_read_time(struct device *dev, struct rtc_time *tm) { struct platform_device *pdev = to_platform_device(dev); struct sh_rtc *rtc = platform_get_drvdata(pdev); unsigned int sec128, sec2, yr, yr100, cf_bit; do { unsigned int tmp; spin_lock_irq(&rtc->lock); tmp = readb(rtc->regbase + RCR1); tmp &= ~RCR1_CF; /* Clear CF-bit */ tmp |= RCR1_CIE; writeb(tmp, rtc->regbase + RCR1); sec128 = readb(rtc->regbase + R64CNT); |
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tm->tm_sec = bcd2bin(readb(rtc->regbase + RSECCNT)); tm->tm_min = bcd2bin(readb(rtc->regbase + RMINCNT)); tm->tm_hour = bcd2bin(readb(rtc->regbase + RHRCNT)); tm->tm_wday = bcd2bin(readb(rtc->regbase + RWKCNT)); tm->tm_mday = bcd2bin(readb(rtc->regbase + RDAYCNT)); tm->tm_mon = bcd2bin(readb(rtc->regbase + RMONCNT)) - 1; |
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if (rtc->capabilities & RTC_CAP_4_DIGIT_YEAR) { yr = readw(rtc->regbase + RYRCNT); |
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yr100 = bcd2bin(yr >> 8); |
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yr &= 0xff; } else { yr = readb(rtc->regbase + RYRCNT); |
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yr100 = bcd2bin((yr == 0x99) ? 0x19 : 0x20); |
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} |
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tm->tm_year = (yr100 * 100 + bcd2bin(yr)) - 1900; |
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sec2 = readb(rtc->regbase + R64CNT); cf_bit = readb(rtc->regbase + RCR1) & RCR1_CF; spin_unlock_irq(&rtc->lock); } while (cf_bit != 0 || ((sec128 ^ sec2) & RTC_BIT_INVERTED) != 0); #if RTC_BIT_INVERTED != 0 if ((sec128 & RTC_BIT_INVERTED)) tm->tm_sec--; #endif |
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/* only keep the carry interrupt enabled if UIE is on */ if (!(rtc->periodic_freq & PF_OXS)) sh_rtc_setcie(dev, 0); |
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dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, " |
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"mday=%d, mon=%d, year=%d, wday=%d ", |
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__func__, |
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tm->tm_sec, tm->tm_min, tm->tm_hour, |
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tm->tm_mday, tm->tm_mon + 1, tm->tm_year, tm->tm_wday); |
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return rtc_valid_tm(tm); |
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} static int sh_rtc_set_time(struct device *dev, struct rtc_time *tm) { struct platform_device *pdev = to_platform_device(dev); struct sh_rtc *rtc = platform_get_drvdata(pdev); unsigned int tmp; int year; spin_lock_irq(&rtc->lock); /* Reset pre-scaler & stop RTC */ tmp = readb(rtc->regbase + RCR2); tmp |= RCR2_RESET; |
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tmp &= ~RCR2_START; |
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writeb(tmp, rtc->regbase + RCR2); |
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writeb(bin2bcd(tm->tm_sec), rtc->regbase + RSECCNT); writeb(bin2bcd(tm->tm_min), rtc->regbase + RMINCNT); writeb(bin2bcd(tm->tm_hour), rtc->regbase + RHRCNT); writeb(bin2bcd(tm->tm_wday), rtc->regbase + RWKCNT); writeb(bin2bcd(tm->tm_mday), rtc->regbase + RDAYCNT); writeb(bin2bcd(tm->tm_mon + 1), rtc->regbase + RMONCNT); |
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if (rtc->capabilities & RTC_CAP_4_DIGIT_YEAR) { |
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year = (bin2bcd((tm->tm_year + 1900) / 100) << 8) | bin2bcd(tm->tm_year % 100); |
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writew(year, rtc->regbase + RYRCNT); } else { year = tm->tm_year % 100; |
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writeb(bin2bcd(year), rtc->regbase + RYRCNT); |
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} |
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/* Start RTC */ tmp = readb(rtc->regbase + RCR2); tmp &= ~RCR2_RESET; tmp |= RCR2_RTCEN | RCR2_START; writeb(tmp, rtc->regbase + RCR2); spin_unlock_irq(&rtc->lock); return 0; } |
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static inline int sh_rtc_read_alarm_value(struct sh_rtc *rtc, int reg_off) { unsigned int byte; int value = 0xff; /* return 0xff for ignored values */ byte = readb(rtc->regbase + reg_off); if (byte & AR_ENB) { byte &= ~AR_ENB; /* strip the enable bit */ |
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value = bcd2bin(byte); |
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} return value; } static int sh_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *wkalrm) { struct platform_device *pdev = to_platform_device(dev); struct sh_rtc *rtc = platform_get_drvdata(pdev); |
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struct rtc_time *tm = &wkalrm->time; |
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spin_lock_irq(&rtc->lock); tm->tm_sec = sh_rtc_read_alarm_value(rtc, RSECAR); tm->tm_min = sh_rtc_read_alarm_value(rtc, RMINAR); tm->tm_hour = sh_rtc_read_alarm_value(rtc, RHRAR); tm->tm_wday = sh_rtc_read_alarm_value(rtc, RWKAR); tm->tm_mday = sh_rtc_read_alarm_value(rtc, RDAYAR); tm->tm_mon = sh_rtc_read_alarm_value(rtc, RMONAR); if (tm->tm_mon > 0) tm->tm_mon -= 1; /* RTC is 1-12, tm_mon is 0-11 */ |
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wkalrm->enabled = (readb(rtc->regbase + RCR1) & RCR1_AIE) ? 1 : 0; |
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spin_unlock_irq(&rtc->lock); return 0; } static inline void sh_rtc_write_alarm_value(struct sh_rtc *rtc, int value, int reg_off) { /* < 0 for a value that is ignored */ if (value < 0) writeb(0, rtc->regbase + reg_off); else |
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writeb(bin2bcd(value) | AR_ENB, rtc->regbase + reg_off); |
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} |
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static int sh_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *wkalrm) { struct platform_device *pdev = to_platform_device(dev); struct sh_rtc *rtc = platform_get_drvdata(pdev); unsigned int rcr1; struct rtc_time *tm = &wkalrm->time; |
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int mon; |
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spin_lock_irq(&rtc->lock); |
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/* disable alarm interrupt and clear the alarm flag */ |
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rcr1 = readb(rtc->regbase + RCR1); |
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rcr1 &= ~(RCR1_AF | RCR1_AIE); |
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writeb(rcr1, rtc->regbase + RCR1); |
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/* set alarm time */ sh_rtc_write_alarm_value(rtc, tm->tm_sec, RSECAR); sh_rtc_write_alarm_value(rtc, tm->tm_min, RMINAR); sh_rtc_write_alarm_value(rtc, tm->tm_hour, RHRAR); sh_rtc_write_alarm_value(rtc, tm->tm_wday, RWKAR); sh_rtc_write_alarm_value(rtc, tm->tm_mday, RDAYAR); mon = tm->tm_mon; if (mon >= 0) mon += 1; sh_rtc_write_alarm_value(rtc, mon, RMONAR); |
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if (wkalrm->enabled) { rcr1 |= RCR1_AIE; writeb(rcr1, rtc->regbase + RCR1); } |
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spin_unlock_irq(&rtc->lock); return 0; } |
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static struct rtc_class_ops sh_rtc_ops = { |
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.read_time = sh_rtc_read_time, .set_time = sh_rtc_set_time, |
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.read_alarm = sh_rtc_read_alarm, .set_alarm = sh_rtc_set_alarm, |
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.proc = sh_rtc_proc, |
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.alarm_irq_enable = sh_rtc_alarm_irq_enable, |
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|
520 |
}; |
5c9740a8b
|
521 |
static int __init sh_rtc_probe(struct platform_device *pdev) |
317a6104a
|
522 523 524 |
{ struct sh_rtc *rtc; struct resource *res; |
edf22477d
|
525 |
struct rtc_time r; |
063adc750
|
526 527 |
char clk_name[6]; int clk_id, ret; |
317a6104a
|
528 |
|
0209affa6
|
529 |
rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL); |
317a6104a
|
530 531 532 533 |
if (unlikely(!rtc)) return -ENOMEM; spin_lock_init(&rtc->lock); |
b420b1a7a
|
534 |
/* get periodic/carry/alarm irqs */ |
2641dc92b
|
535 |
ret = platform_get_irq(pdev, 0); |
2fac6674d
|
536 |
if (unlikely(ret <= 0)) { |
5e084a158
|
537 538 |
dev_err(&pdev->dev, "No IRQ resource "); |
0209affa6
|
539 |
return -ENOENT; |
317a6104a
|
540 |
} |
063adc750
|
541 |
|
2641dc92b
|
542 |
rtc->periodic_irq = ret; |
5e084a158
|
543 544 |
rtc->carry_irq = platform_get_irq(pdev, 1); rtc->alarm_irq = platform_get_irq(pdev, 2); |
317a6104a
|
545 546 547 548 549 |
res = platform_get_resource(pdev, IORESOURCE_IO, 0); if (unlikely(res == NULL)) { dev_err(&pdev->dev, "No IO resource "); |
0209affa6
|
550 |
return -ENOENT; |
317a6104a
|
551 |
} |
063adc750
|
552 |
rtc->regsize = resource_size(res); |
317a6104a
|
553 |
|
0209affa6
|
554 555 556 557 |
rtc->res = devm_request_mem_region(&pdev->dev, res->start, rtc->regsize, pdev->name); if (unlikely(!rtc->res)) return -EBUSY; |
317a6104a
|
558 |
|
0209affa6
|
559 560 561 562 |
rtc->regbase = devm_ioremap_nocache(&pdev->dev, rtc->res->start, rtc->regsize); if (unlikely(!rtc->regbase)) return -EINVAL; |
317a6104a
|
563 |
|
063adc750
|
564 565 566 567 568 569 |
clk_id = pdev->id; /* With a single device, the clock id is still "rtc0" */ if (clk_id < 0) clk_id = 0; snprintf(clk_name, sizeof(clk_name), "rtc%d", clk_id); |
0209affa6
|
570 |
rtc->clk = devm_clk_get(&pdev->dev, clk_name); |
063adc750
|
571 572 573 574 575 576 577 578 579 580 581 |
if (IS_ERR(rtc->clk)) { /* * No error handling for rtc->clk intentionally, not all * platforms will have a unique clock for the RTC, and * the clk API can handle the struct clk pointer being * NULL. */ rtc->clk = NULL; } clk_enable(rtc->clk); |
ad89f87a8
|
582 |
rtc->capabilities = RTC_DEF_CAPABILITIES; |
e58c18d43
|
583 584 585 |
if (dev_get_platdata(&pdev->dev)) { struct sh_rtc_platform_info *pinfo = dev_get_platdata(&pdev->dev); |
ad89f87a8
|
586 587 588 589 590 591 592 |
/* * Some CPUs have special capabilities in addition to the * default set. Add those in here. */ rtc->capabilities |= pinfo->capabilities; } |
5e084a158
|
593 594 |
if (rtc->carry_irq <= 0) { /* register shared periodic/carry/alarm irq */ |
0209affa6
|
595 596 |
ret = devm_request_irq(&pdev->dev, rtc->periodic_irq, sh_rtc_shared, 0, "sh-rtc", rtc); |
5e084a158
|
597 598 599 600 601 602 603 604 605 |
if (unlikely(ret)) { dev_err(&pdev->dev, "request IRQ failed with %d, IRQ %d ", ret, rtc->periodic_irq); goto err_unmap; } } else { /* register periodic/carry/alarm irqs */ |
0209affa6
|
606 607 |
ret = devm_request_irq(&pdev->dev, rtc->periodic_irq, sh_rtc_periodic, 0, "sh-rtc period", rtc); |
5e084a158
|
608 609 610 611 612 613 614 |
if (unlikely(ret)) { dev_err(&pdev->dev, "request period IRQ failed with %d, IRQ %d ", ret, rtc->periodic_irq); goto err_unmap; } |
b420b1a7a
|
615 |
|
0209affa6
|
616 617 |
ret = devm_request_irq(&pdev->dev, rtc->carry_irq, sh_rtc_interrupt, 0, "sh-rtc carry", rtc); |
5e084a158
|
618 619 620 621 622 |
if (unlikely(ret)) { dev_err(&pdev->dev, "request carry IRQ failed with %d, IRQ %d ", ret, rtc->carry_irq); |
5e084a158
|
623 624 |
goto err_unmap; } |
b420b1a7a
|
625 |
|
0209affa6
|
626 627 |
ret = devm_request_irq(&pdev->dev, rtc->alarm_irq, sh_rtc_alarm, 0, "sh-rtc alarm", rtc); |
5e084a158
|
628 629 630 631 632 |
if (unlikely(ret)) { dev_err(&pdev->dev, "request alarm IRQ failed with %d, IRQ %d ", ret, rtc->alarm_irq); |
5e084a158
|
633 634 |
goto err_unmap; } |
b420b1a7a
|
635 |
} |
5c9740a8b
|
636 |
platform_set_drvdata(pdev, rtc); |
9cd88b90a
|
637 |
/* everything disabled by default */ |
5c9740a8b
|
638 639 |
sh_rtc_irq_set_freq(&pdev->dev, 0); sh_rtc_irq_set_state(&pdev->dev, 0); |
9cd88b90a
|
640 641 |
sh_rtc_setaie(&pdev->dev, 0); sh_rtc_setcie(&pdev->dev, 0); |
edf22477d
|
642 |
|
0209affa6
|
643 |
rtc->rtc_dev = devm_rtc_device_register(&pdev->dev, "sh", |
5c9740a8b
|
644 645 646 |
&sh_rtc_ops, THIS_MODULE); if (IS_ERR(rtc->rtc_dev)) { ret = PTR_ERR(rtc->rtc_dev); |
5c9740a8b
|
647 648 649 650 |
goto err_unmap; } rtc->rtc_dev->max_user_freq = 256; |
edf22477d
|
651 652 653 654 655 |
/* reset rtc to epoch 0 if time is invalid */ if (rtc_read_time(rtc->rtc_dev, &r) < 0) { rtc_time_to_tm(0, &r); rtc_set_time(rtc->rtc_dev, &r); } |
7a8fe8e32
|
656 |
device_init_wakeup(&pdev->dev, 1); |
317a6104a
|
657 |
return 0; |
0305794c7
|
658 |
err_unmap: |
063adc750
|
659 |
clk_disable(rtc->clk); |
317a6104a
|
660 661 662 |
return ret; } |
5c9740a8b
|
663 |
static int __exit sh_rtc_remove(struct platform_device *pdev) |
317a6104a
|
664 665 |
{ struct sh_rtc *rtc = platform_get_drvdata(pdev); |
5c9740a8b
|
666 |
sh_rtc_irq_set_state(&pdev->dev, 0); |
317a6104a
|
667 |
|
317a6104a
|
668 |
sh_rtc_setaie(&pdev->dev, 0); |
9cd88b90a
|
669 |
sh_rtc_setcie(&pdev->dev, 0); |
317a6104a
|
670 |
|
063adc750
|
671 |
clk_disable(rtc->clk); |
317a6104a
|
672 673 674 |
return 0; } |
faa9fa8e4
|
675 676 677 678 679 |
static void sh_rtc_set_irq_wake(struct device *dev, int enabled) { struct platform_device *pdev = to_platform_device(dev); struct sh_rtc *rtc = platform_get_drvdata(pdev); |
dced35aeb
|
680 |
irq_set_irq_wake(rtc->periodic_irq, enabled); |
063adc750
|
681 |
|
faa9fa8e4
|
682 |
if (rtc->carry_irq > 0) { |
dced35aeb
|
683 684 |
irq_set_irq_wake(rtc->carry_irq, enabled); irq_set_irq_wake(rtc->alarm_irq, enabled); |
faa9fa8e4
|
685 |
} |
faa9fa8e4
|
686 |
} |
0ed505444
|
687 |
#ifdef CONFIG_PM_SLEEP |
faa9fa8e4
|
688 689 690 691 692 693 694 695 696 697 698 699 700 701 702 |
static int sh_rtc_suspend(struct device *dev) { if (device_may_wakeup(dev)) sh_rtc_set_irq_wake(dev, 1); return 0; } static int sh_rtc_resume(struct device *dev) { if (device_may_wakeup(dev)) sh_rtc_set_irq_wake(dev, 0); return 0; } |
0ed505444
|
703 |
#endif |
faa9fa8e4
|
704 |
|
0ed505444
|
705 |
static SIMPLE_DEV_PM_OPS(sh_rtc_pm_ops, sh_rtc_suspend, sh_rtc_resume); |
faa9fa8e4
|
706 |
|
317a6104a
|
707 708 |
static struct platform_driver sh_rtc_platform_driver = { .driver = { |
1b73e6ae4
|
709 |
.name = DRV_NAME, |
0ed505444
|
710 |
.pm = &sh_rtc_pm_ops, |
317a6104a
|
711 |
}, |
5c9740a8b
|
712 |
.remove = __exit_p(sh_rtc_remove), |
317a6104a
|
713 |
}; |
deed5a9dc
|
714 |
module_platform_driver_probe(sh_rtc_platform_driver, sh_rtc_probe); |
317a6104a
|
715 716 |
MODULE_DESCRIPTION("SuperH on-chip RTC driver"); |
b420b1a7a
|
717 718 719 |
MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>, " "Jamie Lenehan <lenehan@twibble.org>, " "Angelo Castello <angelo.castello@st.com>"); |
317a6104a
|
720 |
MODULE_LICENSE("GPL"); |
ad28a07bc
|
721 |
MODULE_ALIAS("platform:" DRV_NAME); |