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arch/arm/mach-s3c/pm.c
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// SPDX-License-Identifier: GPL-2.0 // // Copyright 2008 Openmoko, Inc. // Copyright 2004-2008 Simtec Electronics // Ben Dooks <ben@simtec.co.uk> // http://armlinux.simtec.co.uk/ // // S3C common power management (suspend to ram) support. |
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#include <linux/init.h> #include <linux/suspend.h> #include <linux/errno.h> |
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#include <linux/delay.h> |
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#include <linux/of.h> |
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#include <linux/serial_s3c.h> |
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#include <linux/io.h> |
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#include <asm/cacheflush.h> |
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#include <asm/suspend.h> |
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#include "map.h" #include "regs-clock.h" #include "regs-irq.h" |
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#include <mach/irqs.h> |
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#include <asm/irq.h> |
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#include "cpu.h" #include "pm.h" #include "pm-core.h" |
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/* for external use */ unsigned long s3c_pm_flags; |
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/* The IRQ ext-int code goes here, it is too small to currently bother * with its own file. */ unsigned long s3c_irqwake_intmask = 0xffffffffL; unsigned long s3c_irqwake_eintmask = 0xffffffffL; |
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int s3c_irqext_wake(struct irq_data *data, unsigned int state) |
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{ |
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unsigned long bit = 1L << IRQ_EINT_BIT(data->irq); |
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if (!(s3c_irqwake_eintallow & bit)) return -ENOENT; printk(KERN_INFO "wake %s for irq %d ", |
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state ? "enabled" : "disabled", data->irq); |
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if (!state) s3c_irqwake_eintmask |= bit; else s3c_irqwake_eintmask &= ~bit; return 0; } |
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void (*pm_cpu_prep)(void); |
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int (*pm_cpu_sleep)(unsigned long); |
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#define any_allowed(mask, allow) (((mask) & (allow)) != (allow)) /* s3c_pm_enter * * central control for sleep/resume process */ static int s3c_pm_enter(suspend_state_t state) { |
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int ret; |
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/* ensure the debug is initialised (if enabled) */ |
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s3c_pm_debug_init_uart(); |
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S3C_PMDBG("%s(%d) ", __func__, state); if (pm_cpu_prep == NULL || pm_cpu_sleep == NULL) { printk(KERN_ERR "%s: error: no cpu sleep function ", __func__); return -EINVAL; } /* check if we have anything to wake-up with... bad things seem * to happen if you suspend with no wakeup (system will often * require a full power-cycle) */ |
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if (!of_have_populated_dt() && !any_allowed(s3c_irqwake_intmask, s3c_irqwake_intallow) && |
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!any_allowed(s3c_irqwake_eintmask, s3c_irqwake_eintallow)) { printk(KERN_ERR "%s: No wake-up sources! ", __func__); printk(KERN_ERR "%s: Aborting sleep ", __func__); return -EINVAL; } |
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/* save all necessary core registers not covered by the drivers */ |
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if (!of_have_populated_dt()) { samsung_pm_save_gpios(); samsung_pm_saved_gpios(); } |
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s3c_pm_save_uarts(soc_is_s3c2410()); |
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s3c_pm_save_core(); /* set the irq configuration for wake */ s3c_pm_configure_extint(); S3C_PMDBG("sleep: irq wakeup masks: %08lx,%08lx ", s3c_irqwake_intmask, s3c_irqwake_eintmask); s3c_pm_arch_prepare_irqs(); /* call cpu specific preparation */ pm_cpu_prep(); /* flush cache back to ram */ flush_cache_all(); s3c_pm_check_store(); /* send the cpu to sleep... */ s3c_pm_arch_stop_clocks(); |
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/* this will also act as our return point from when |
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* we resume as it saves its own register state and restores it * during the resume. */ |
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ret = cpu_suspend(0, pm_cpu_sleep); if (ret) return ret; |
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/* restore the system state */ s3c_pm_restore_core(); |
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s3c_pm_restore_uarts(soc_is_s3c2410()); |
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if (!of_have_populated_dt()) { samsung_pm_restore_gpios(); s3c_pm_restored_gpios(); } |
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s3c_pm_debug_init_uart(); |
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/* check what irq (if any) restored the system */ s3c_pm_arch_show_resume_irqs(); S3C_PMDBG("%s: post sleep, preparing to return ", __func__); |
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/* LEDs should now be 1110 */ s3c_pm_debug_smdkled(1 << 1, 0); |
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s3c_pm_check_restore(); /* ok, let's return from sleep */ S3C_PMDBG("S3C PM Resume (post-restore) "); return 0; } |
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static int s3c_pm_prepare(void) { /* prepare check area if configured */ s3c_pm_check_prepare(); return 0; } static void s3c_pm_finish(void) { s3c_pm_check_cleanup(); } |
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static const struct platform_suspend_ops s3c_pm_ops = { |
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.enter = s3c_pm_enter, |
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.prepare = s3c_pm_prepare, .finish = s3c_pm_finish, |
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.valid = suspend_valid_only_mem, }; |
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/* s3c_pm_init |
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* * Attach the power management functions. This should be called * from the board specific initialisation if the board supports * it. */ |
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int __init s3c_pm_init(void) |
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{ printk("S3C Power Management, Copyright 2004 Simtec Electronics "); suspend_set_ops(&s3c_pm_ops); return 0; } |