Blame view
arch/x86/kernel/vmlinux.lds.S
8.89 KB
17ce265d6
|
1 2 3 4 5 |
/* * ld script for the x86 kernel * * Historic 32-bit version written by Martin Mares <mj@atrey.karlin.mff.cuni.cz> * |
91fd7fe80
|
6 7 |
* Modernisation, unification and other changes and fixes: * Copyright (C) 2007-2009 Sam Ravnborg <sam@ravnborg.org> |
17ce265d6
|
8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 |
* * * Don't define absolute symbols until and unless you know that symbol * value is should remain constant even if kernel image is relocated * at run time. Absolute symbols are not relocated. If symbol value should * change if kernel is relocated, make the symbol section relative and * put it inside the section definition. */ #ifdef CONFIG_X86_32 #define LOAD_OFFSET __PAGE_OFFSET #else #define LOAD_OFFSET __START_KERNEL_map #endif #include <asm-generic/vmlinux.lds.h> #include <asm/asm-offsets.h> #include <asm/thread_info.h> #include <asm/page_types.h> #include <asm/cache.h> #include <asm/boot.h> #undef i386 /* in case the preprocessor is a 32bit one */ OUTPUT_FORMAT(CONFIG_OUTPUT_FORMAT, CONFIG_OUTPUT_FORMAT, CONFIG_OUTPUT_FORMAT) #ifdef CONFIG_X86_32 OUTPUT_ARCH(i386) ENTRY(phys_startup_32) |
6b35eb9dd
|
37 |
jiffies = jiffies_64; |
17ce265d6
|
38 39 40 |
#else OUTPUT_ARCH(i386:x86-64) ENTRY(phys_startup_64) |
6b35eb9dd
|
41 |
jiffies_64 = jiffies; |
17ce265d6
|
42 |
#endif |
74e081797
|
43 |
#if defined(CONFIG_X86_64) && defined(CONFIG_DEBUG_RODATA) |
d6cc1c3af
|
44 45 46 47 48 49 50 51 52 53 54 55 |
/* * On 64-bit, align RODATA to 2MB so that even with CONFIG_DEBUG_RODATA * we retain large page mappings for boundaries spanning kernel text, rodata * and data sections. * * However, kernel identity mappings will have different RWX permissions * to the pages mapping to text and to the pages padding (which are freed) the * text section. Hence kernel identity mappings will be broken to smaller * pages. For 64-bit, kernel text and kernel identity mappings are different, * so we can enable protection checks that come with CONFIG_DEBUG_RODATA, * as well as retain 2MB large page mappings for kernel text. */ |
74e081797
|
56 57 58 59 60 61 62 63 64 65 66 67 |
#define X64_ALIGN_DEBUG_RODATA_BEGIN . = ALIGN(HPAGE_SIZE); #define X64_ALIGN_DEBUG_RODATA_END \ . = ALIGN(HPAGE_SIZE); \ __end_rodata_hpage_align = .; #else #define X64_ALIGN_DEBUG_RODATA_BEGIN #define X64_ALIGN_DEBUG_RODATA_END #endif |
afb8095a7
|
68 69 |
PHDRS { text PT_LOAD FLAGS(5); /* R_E */ |
5bd5a4526
|
70 |
data PT_LOAD FLAGS(6); /* RW_ */ |
afb8095a7
|
71 |
#ifdef CONFIG_X86_64 |
afb8095a7
|
72 |
#ifdef CONFIG_SMP |
8d0cc631f
|
73 |
percpu PT_LOAD FLAGS(6); /* RW_ */ |
afb8095a7
|
74 |
#endif |
c62e43202
|
75 |
init PT_LOAD FLAGS(7); /* RWE */ |
afb8095a7
|
76 77 78 |
#endif note PT_NOTE FLAGS(0); /* ___ */ } |
17ce265d6
|
79 |
|
444e0ae48
|
80 81 82 83 84 85 86 87 88 |
SECTIONS { #ifdef CONFIG_X86_32 . = LOAD_OFFSET + LOAD_PHYSICAL_ADDR; phys_startup_32 = startup_32 - LOAD_OFFSET; #else . = __START_KERNEL; phys_startup_64 = startup_64 - LOAD_OFFSET; #endif |
dfc20895d
|
89 |
/* Text and read-only data */ |
dfc20895d
|
90 |
.text : AT(ADDR(.text) - LOAD_OFFSET) { |
4ae59b916
|
91 92 93 |
_text = .; /* bootstrapping code */ HEAD_TEXT |
dfc20895d
|
94 |
#ifdef CONFIG_X86_32 |
dfc20895d
|
95 |
. = ALIGN(PAGE_SIZE); |
819d67621
|
96 |
*(.text..page_aligned) |
dfc20895d
|
97 98 99 100 101 102 103 |
#endif . = ALIGN(8); _stext = .; TEXT_TEXT SCHED_TEXT LOCK_TEXT KPROBES_TEXT |
ea7145477
|
104 |
ENTRY_TEXT |
dfc20895d
|
105 106 107 108 109 110 111 112 |
IRQENTRY_TEXT *(.fixup) *(.gnu.warning) /* End of text section */ _etext = .; } :text = 0x9090 NOTES :text :note |
123f3e1d7
|
113 |
EXCEPTION_TABLE(16) :text = 0x9090 |
448bc3ab0
|
114 |
|
5bd5a4526
|
115 116 117 118 |
#if defined(CONFIG_DEBUG_RODATA) /* .text should occupy whole number of pages */ . = ALIGN(PAGE_SIZE); #endif |
74e081797
|
119 |
X64_ALIGN_DEBUG_RODATA_BEGIN |
c62e43202
|
120 |
RO_DATA(PAGE_SIZE) |
74e081797
|
121 |
X64_ALIGN_DEBUG_RODATA_END |
448bc3ab0
|
122 |
|
1f6397bac
|
123 |
/* Data */ |
1f6397bac
|
124 |
.data : AT(ADDR(.data) - LOAD_OFFSET) { |
1260866a2
|
125 126 |
/* Start of data section */ _sdata = .; |
c62e43202
|
127 128 129 |
/* init_task */ INIT_TASK_DATA(THREAD_SIZE) |
1f6397bac
|
130 131 |
#ifdef CONFIG_X86_32 |
c62e43202
|
132 133 |
/* 32 bit has nosave before _edata */ NOSAVE_DATA |
1f6397bac
|
134 |
#endif |
c62e43202
|
135 |
PAGE_ALIGNED_DATA(PAGE_SIZE) |
1f6397bac
|
136 |
|
350f8f563
|
137 |
CACHELINE_ALIGNED_DATA(L1_CACHE_BYTES) |
1f6397bac
|
138 |
|
c62e43202
|
139 140 141 142 |
DATA_DATA CONSTRUCTORS /* rarely changed data like cpu maps */ |
350f8f563
|
143 |
READ_MOSTLY_DATA(INTERNODE_CACHE_BYTES) |
1f6397bac
|
144 |
|
1f6397bac
|
145 146 |
/* End of data section */ _edata = .; |
c62e43202
|
147 |
} :data |
1f6397bac
|
148 |
|
ff6f87e16
|
149 |
#ifdef CONFIG_X86_64 |
9c40818da
|
150 151 152 153 |
. = ALIGN(PAGE_SIZE); __vvar_page = .; .vvar : AT(ADDR(.vvar) - LOAD_OFFSET) { |
f670bb760
|
154 155 |
/* work around gold bug 13023 */ __vvar_beginning_hack = .; |
9c40818da
|
156 |
|
f670bb760
|
157 158 159 |
/* Place all vvars at the offsets in asm/vvar.h. */ #define EMIT_VVAR(name, offset) \ . = __vvar_beginning_hack + offset; \ |
9c40818da
|
160 161 162 163 164 165 166 167 168 |
*(.vvar_ ## name) #define __VVAR_KERNEL_LDS #include <asm/vvar.h> #undef __VVAR_KERNEL_LDS #undef EMIT_VVAR } :data . = ALIGN(__vvar_page + PAGE_SIZE, PAGE_SIZE); |
ff6f87e16
|
169 |
#endif /* CONFIG_X86_64 */ |
dfc20895d
|
170 |
|
c62e43202
|
171 172 173 174 |
/* Init code and data - will be freed after init */ . = ALIGN(PAGE_SIZE); .init.begin : AT(ADDR(.init.begin) - LOAD_OFFSET) { __init_begin = .; /* paired with __init_end */ |
e58bdaa8f
|
175 |
} |
e58bdaa8f
|
176 |
|
c62e43202
|
177 |
#if defined(CONFIG_X86_64) && defined(CONFIG_SMP) |
e58bdaa8f
|
178 |
/* |
c62e43202
|
179 180 181 |
* percpu offsets are zero-based on SMP. PERCPU_VADDR() changes the * output PHDR, so the next output section - .init.text - should * start another segment - init. |
e58bdaa8f
|
182 |
*/ |
19df0c2fe
|
183 |
PERCPU_VADDR(INTERNODE_CACHE_BYTES, 0, :percpu) |
c62e43202
|
184 |
#endif |
e58bdaa8f
|
185 |
|
123f3e1d7
|
186 |
INIT_TEXT_SECTION(PAGE_SIZE) |
c62e43202
|
187 188 189 |
#ifdef CONFIG_X86_64 :init #endif |
e58bdaa8f
|
190 |
|
123f3e1d7
|
191 |
INIT_DATA_SECTION(16) |
e58bdaa8f
|
192 |
|
4822b7fc6
|
193 194 195 196 197 198 199 200 201 202 203 |
/* * Code and data for a variety of lowlevel trampolines, to be * copied into base memory (< 1 MiB) during initialization. * Since it is copied early, the main copy can be discarded * afterwards. */ .x86_trampoline : AT(ADDR(.x86_trampoline) - LOAD_OFFSET) { x86_trampoline_start = .; *(.x86_trampoline) x86_trampoline_end = .; } |
e58bdaa8f
|
204 205 206 207 208 |
.x86_cpu_dev.init : AT(ADDR(.x86_cpu_dev.init) - LOAD_OFFSET) { __x86_cpu_dev_start = .; *(.x86_cpu_dev.init) __x86_cpu_dev_end = .; } |
6f44d0337
|
209 210 211 212 213 214 |
/* * start address and size of operations which during runtime * can be patched with virtualization friendly instructions or * baremetal native ones. Think page table operations. * Details in paravirt_types.h */ |
ae6183628
|
215 216 217 218 219 220 |
. = ALIGN(8); .parainstructions : AT(ADDR(.parainstructions) - LOAD_OFFSET) { __parainstructions = .; *(.parainstructions) __parainstructions_end = .; } |
6f44d0337
|
221 222 223 224 225 |
/* * struct alt_inst entries. From the header (alternative.h): * "Alternative instructions for different CPU types or capabilities" * Think locking instructions on spinlocks. */ |
ae6183628
|
226 227 228 229 230 231 |
. = ALIGN(8); .altinstructions : AT(ADDR(.altinstructions) - LOAD_OFFSET) { __alt_instructions = .; *(.altinstructions) __alt_instructions_end = .; } |
6f44d0337
|
232 233 234 235 236 |
/* * And here are the replacement instructions. The linker sticks * them as binary blobs. The .altinstructions has enough data to * get the address and the length of them to patch the kernel safely. */ |
ae6183628
|
237 238 239 |
.altinstr_replacement : AT(ADDR(.altinstr_replacement) - LOAD_OFFSET) { *(.altinstr_replacement) } |
6f44d0337
|
240 241 242 243 244 245 |
/* * struct iommu_table_entry entries are injected in this section. * It is an array of IOMMUs which during run time gets sorted depending * on its dependency order. After rootfs_initcall is complete * this section can be safely removed. */ |
0444ad93e
|
246 247 248 |
.iommu_table : AT(ADDR(.iommu_table) - LOAD_OFFSET) { __iommu_table = .; *(.iommu_table) |
0444ad93e
|
249 250 |
__iommu_table_end = .; } |
4822b7fc6
|
251 |
|
7ac41ccf4
|
252 |
. = ALIGN(8); |
107e0e0cd
|
253 254 255 256 257 258 259 |
.apicdrivers : AT(ADDR(.apicdrivers) - LOAD_OFFSET) { __apicdrivers = .; *(.apicdrivers); __apicdrivers_end = .; } . = ALIGN(8); |
bf6a57418
|
260 261 262 263 264 265 266 267 268 269 270 |
/* * .exit.text is discard at runtime, not link time, to deal with * references from .altinstructions and .eh_frame */ .exit.text : AT(ADDR(.exit.text) - LOAD_OFFSET) { EXIT_TEXT } .exit.data : AT(ADDR(.exit.data) - LOAD_OFFSET) { EXIT_DATA } |
c62e43202
|
271 |
#if !defined(CONFIG_X86_64) || !defined(CONFIG_SMP) |
0415b00d1
|
272 |
PERCPU_SECTION(INTERNODE_CACHE_BYTES) |
9d16e7831
|
273 274 275 |
#endif . = ALIGN(PAGE_SIZE); |
fd0731944
|
276 |
|
9d16e7831
|
277 |
/* freed after init ends here */ |
fd0731944
|
278 279 280 |
.init.end : AT(ADDR(.init.end) - LOAD_OFFSET) { __init_end = .; } |
9d16e7831
|
281 |
|
c62e43202
|
282 283 284 285 286 287 288 289 |
/* * smp_locks might be freed after init * start/end must be page aligned */ . = ALIGN(PAGE_SIZE); .smp_locks : AT(ADDR(.smp_locks) - LOAD_OFFSET) { __smp_locks = .; *(.smp_locks) |
c62e43202
|
290 |
. = ALIGN(PAGE_SIZE); |
596b711ed
|
291 |
__smp_locks_end = .; |
c62e43202
|
292 |
} |
9d16e7831
|
293 294 |
#ifdef CONFIG_X86_64 .data_nosave : AT(ADDR(.data_nosave) - LOAD_OFFSET) { |
c62e43202
|
295 296 |
NOSAVE_DATA } |
9d16e7831
|
297 |
#endif |
091e52c35
|
298 299 300 301 |
/* BSS */ . = ALIGN(PAGE_SIZE); .bss : AT(ADDR(.bss) - LOAD_OFFSET) { __bss_start = .; |
7c74df07f
|
302 |
*(.bss..page_aligned) |
091e52c35
|
303 |
*(.bss) |
5bd5a4526
|
304 |
. = ALIGN(PAGE_SIZE); |
091e52c35
|
305 306 |
__bss_stop = .; } |
9d16e7831
|
307 |
|
091e52c35
|
308 309 310 311 312 313 314 |
. = ALIGN(PAGE_SIZE); .brk : AT(ADDR(.brk) - LOAD_OFFSET) { __brk_base = .; . += 64 * 1024; /* 64k alignment slop space */ *(.brk_reservation) /* areas brk users have reserved */ __brk_limit = .; } |
873b5271f
|
315 |
_end = .; |
091e52c35
|
316 |
|
444e0ae48
|
317 318 |
STABS_DEBUG DWARF_DEBUG |
023bf6f1b
|
319 320 321 322 |
/* Sections to be discarded */ DISCARDS /DISCARD/ : { *(.eh_frame) } |
444e0ae48
|
323 |
} |
17ce265d6
|
324 325 |
#ifdef CONFIG_X86_32 |
a5912f6b3
|
326 327 328 |
/* * The ASSERT() sink to . is intentional, for binutils 2.14 compatibility: */ |
d2ba8b211
|
329 330 |
. = ASSERT((_end - LOAD_OFFSET <= KERNEL_IMAGE_SIZE), "kernel image bigger than KERNEL_IMAGE_SIZE"); |
17ce265d6
|
331 332 333 334 335 |
#else /* * Per-cpu symbols which need to be offset from __per_cpu_load * for the boot processor. */ |
dd17c8f72
|
336 |
#define INIT_PER_CPU(x) init_per_cpu__##x = x + __per_cpu_load |
17ce265d6
|
337 338 339 340 341 342 |
INIT_PER_CPU(gdt_page); INIT_PER_CPU(irq_stack_union); /* * Build-time check on the image size: */ |
d2ba8b211
|
343 344 |
. = ASSERT((_end - _text <= KERNEL_IMAGE_SIZE), "kernel image bigger than KERNEL_IMAGE_SIZE"); |
17ce265d6
|
345 346 |
#ifdef CONFIG_SMP |
dd17c8f72
|
347 |
. = ASSERT((irq_stack_union == 0), |
d2ba8b211
|
348 |
"irq_stack_union is not at start of per-cpu area"); |
17ce265d6
|
349 350 351 352 353 354 |
#endif #endif /* CONFIG_X86_32 */ #ifdef CONFIG_KEXEC #include <asm/kexec.h> |
d2ba8b211
|
355 356 |
. = ASSERT(kexec_control_code_size <= KEXEC_CONTROL_CODE_MAX_SIZE, "kexec control code size is too big"); |
17ce265d6
|
357 |
#endif |