Blame view
Documentation/i2c/i2c-topology.rst
15.8 KB
f6fcefa10
|
1 2 3 |
================================ I2C muxes and complex topologies ================================ |
2254d24af
|
4 |
|
2f07c05f1
|
5 6 |
There are a couple of reasons for building more complex I2C topologies than a straight-forward I2C bus with one adapter and one or more devices. |
2254d24af
|
7 8 9 10 11 12 13 |
1. A mux may be needed on the bus to prevent address collisions. 2. The bus may be accessible from some external bus master, and arbitration may be needed to determine if it is ok to access the bus. 3. A device (particularly RF tuners) may want to avoid the digital noise |
2f07c05f1
|
14 |
from the I2C bus, at least most of the time, and sits behind a gate |
2254d24af
|
15 16 17 |
that has to be operated before the device can be accessed. Etc |
ccf988b66
|
18 |
=== |
2254d24af
|
19 |
|
2f07c05f1
|
20 |
These constructs are represented as I2C adapter trees by Linux, where |
2254d24af
|
21 22 |
each adapter has a parent adapter (except the root adapter) and zero or more child adapters. The root adapter is the actual adapter that issues |
2f07c05f1
|
23 |
I2C transfers, and all adapters with a parent are part of an "i2c-mux" |
2254d24af
|
24 25 26 |
object (quoted, since it can also be an arbitrator or a gate). Depending of the particular mux driver, something happens when there is |
2f07c05f1
|
27 |
an I2C transfer on one of its child adapters. The mux driver can |
2254d24af
|
28 29 30 31 32 33 34 35 |
obviously operate a mux, but it can also do arbitration with an external bus master or open a gate. The mux driver has two operations for this, select and deselect. select is called before the transfer and (the optional) deselect is called after the transfer. Locking ======= |
2f07c05f1
|
36 |
There are two variants of locking available to I2C muxes, they can be |
2254d24af
|
37 38 39 |
mux-locked or parent-locked muxes. As is evident from below, it can be useful to know if a mux is mux-locked or if it is parent-locked. The following list was correct at the time of writing: |
ccf988b66
|
40 41 42 |
In drivers/i2c/muxes/: ====================== ============================================= |
2254d24af
|
43 44 45 |
i2c-arb-gpio-challenge Parent-locked i2c-mux-gpio Normally parent-locked, mux-locked iff all involved gpio pins are controlled by the |
2f07c05f1
|
46 |
same I2C root adapter that they mux. |
234fa0ad4
|
47 48 49 50 |
i2c-mux-gpmux Normally parent-locked, mux-locked iff specified in device-tree. i2c-mux-ltc4306 Mux-locked i2c-mux-mlxcpld Parent-locked |
2254d24af
|
51 52 53 54 |
i2c-mux-pca9541 Parent-locked i2c-mux-pca954x Parent-locked i2c-mux-pinctrl Normally parent-locked, mux-locked iff all involved pinctrl devices are controlled |
2f07c05f1
|
55 |
by the same I2C root adapter that they mux. |
2254d24af
|
56 |
i2c-mux-reg Parent-locked |
ccf988b66
|
57 58 59 |
====================== ============================================= In drivers/iio/: |
2254d24af
|
60 |
|
ccf988b66
|
61 |
====================== ============================================= |
234fa0ad4
|
62 |
gyro/mpu3050 Mux-locked |
1ffcfaf19
|
63 |
imu/inv_mpu6050/ Mux-locked |
ccf988b66
|
64 |
====================== ============================================= |
2254d24af
|
65 |
|
ccf988b66
|
66 67 68 |
In drivers/media/: ======================= ============================================= |
234fa0ad4
|
69 |
dvb-frontends/lgdt3306a Mux-locked |
2254d24af
|
70 71 |
dvb-frontends/m88ds3103 Parent-locked dvb-frontends/rtl2830 Parent-locked |
1cf79db28
|
72 |
dvb-frontends/rtl2832 Mux-locked |
e6d7ffcdf
|
73 |
dvb-frontends/si2168 Mux-locked |
2254d24af
|
74 |
usb/cx231xx/ Parent-locked |
ccf988b66
|
75 |
======================= ============================================= |
2254d24af
|
76 77 78 79 80 81 82 83 |
Mux-locked muxes ---------------- Mux-locked muxes does not lock the entire parent adapter during the full select-transfer-deselect transaction, only the muxes on the parent adapter are locked. Mux-locked muxes are mostly interesting if the |
2f07c05f1
|
84 |
select and/or deselect operations must use I2C transfers to complete |
2254d24af
|
85 |
their tasks. Since the parent adapter is not fully locked during the |
2f07c05f1
|
86 |
full transaction, unrelated I2C transfers may interleave the different |
2254d24af
|
87 88 |
stages of the transaction. This has the benefit that the mux driver may be easier and cleaner to implement, but it has some caveats. |
ccf988b66
|
89 |
==== ===================================================================== |
2254d24af
|
90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 |
ML1. If you build a topology with a mux-locked mux being the parent of a parent-locked mux, this might break the expectation from the parent-locked mux that the root adapter is locked during the transaction. ML2. It is not safe to build arbitrary topologies with two (or more) mux-locked muxes that are not siblings, when there are address collisions between the devices on the child adapters of these non-sibling muxes. I.e. the select-transfer-deselect transaction targeting e.g. device address 0x42 behind mux-one may be interleaved with a similar operation targeting device address 0x42 behind mux-two. The intension with such a topology would in this hypothetical example be that mux-one and mux-two should not be selected simultaneously, but mux-locked muxes do not guarantee that in all topologies. ML3. A mux-locked mux cannot be used by a driver for auto-closing gates/muxes, i.e. something that closes automatically after a given |
2f07c05f1
|
109 |
number (one, in most cases) of I2C transfers. Unrelated I2C transfers |
2254d24af
|
110 |
may creep in and close prematurely. |
2f07c05f1
|
111 |
ML4. If any non-I2C operation in the mux driver changes the I2C mux state, |
2254d24af
|
112 113 |
the driver has to lock the root adapter during that operation. Otherwise garbage may appear on the bus as seen from devices |
2f07c05f1
|
114 115 |
behind the mux, when an unrelated I2C transfer is in flight during the non-I2C mux-changing operation. |
ccf988b66
|
116 |
==== ===================================================================== |
2254d24af
|
117 118 119 120 |
Mux-locked Example ------------------ |
ccf988b66
|
121 122 |
:: |
2254d24af
|
123 124 125 126 127 128 129 130 131 132 |
.----------. .--------. .--------. | mux- |-----| dev D1 | | root |--+--| locked | '--------' '--------' | | mux M1 |--. .--------. | '----------' '--| dev D2 | | .--------. '--------' '--| dev D3 | '--------' When there is an access to D1, this happens: |
48ca3b7fb
|
133 |
1. Someone issues an I2C transfer to D1. |
2254d24af
|
134 135 |
2. M1 locks muxes on its parent (the root adapter in this case). 3. M1 calls ->select to ready the mux. |
48ca3b7fb
|
136 137 |
4. M1 (presumably) does some I2C transfers as part of its select. These transfers are normal I2C transfers that locks the parent |
2254d24af
|
138 |
adapter. |
48ca3b7fb
|
139 140 |
5. M1 feeds the I2C transfer from step 1 to its parent adapter as a normal I2C transfer that locks the parent adapter. |
2254d24af
|
141 142 143 144 145 146 147 148 149 150 151 152 153 154 |
6. M1 calls ->deselect, if it has one. 7. Same rules as in step 4, but for ->deselect. 8. M1 unlocks muxes on its parent. This means that accesses to D2 are lockout out for the full duration of the entire operation. But accesses to D3 are possibly interleaved at any point. Parent-locked muxes ------------------- Parent-locked muxes lock the parent adapter during the full select- transfer-deselect transaction. The implication is that the mux driver |
2f07c05f1
|
155 156 |
has to ensure that any and all I2C transfers through that parent adapter during the transaction are unlocked I2C transfers (using e.g. |
2254d24af
|
157 158 |
__i2c_transfer), or a deadlock will follow. There are a couple of caveats. |
ccf988b66
|
159 |
==== ==================================================================== |
2254d24af
|
160 161 162 163 |
PL1. If you build a topology with a parent-locked mux being the child of another mux, this might break a possible assumption from the child mux that the root adapter is unused between its select op and the actual transfer (e.g. if the child mux is auto-closing |
48ca3b7fb
|
164 |
and the parent mux issues I2C transfers as part of its select). |
2254d24af
|
165 166 167 168 |
This is especially the case if the parent mux is mux-locked, but it may also happen if the parent mux is parent-locked. PL2. If select/deselect calls out to other subsystems such as gpio, |
2f07c05f1
|
169 |
pinctrl, regmap or iio, it is essential that any I2C transfers |
2254d24af
|
170 171 172 |
caused by these subsystems are unlocked. This can be convoluted to accomplish, maybe even impossible if an acceptably clean solution is sought. |
ccf988b66
|
173 |
==== ==================================================================== |
2254d24af
|
174 175 176 177 |
Parent-locked Example --------------------- |
ccf988b66
|
178 |
:: |
2254d24af
|
179 180 181 182 183 184 185 186 187 188 |
.----------. .--------. .--------. | parent- |-----| dev D1 | | root |--+--| locked | '--------' '--------' | | mux M1 |--. .--------. | '----------' '--| dev D2 | | .--------. '--------' '--| dev D3 | '--------' When there is an access to D1, this happens: |
48ca3b7fb
|
189 |
1. Someone issues an I2C transfer to D1. |
ccf988b66
|
190 191 192 |
2. M1 locks muxes on its parent (the root adapter in this case). 3. M1 locks its parent adapter. 4. M1 calls ->select to ready the mux. |
48ca3b7fb
|
193 194 |
5. If M1 does any I2C transfers (on this root adapter) as part of its select, those transfers must be unlocked I2C transfers so |
ccf988b66
|
195 |
that they do not deadlock the root adapter. |
48ca3b7fb
|
196 197 |
6. M1 feeds the I2C transfer from step 1 to the root adapter as an unlocked I2C transfer, so that it does not deadlock the parent |
ccf988b66
|
198 199 200 201 202 |
adapter. 7. M1 calls ->deselect, if it has one. 8. Same rules as in step 5, but for ->deselect. 9. M1 unlocks its parent adapter. 10. M1 unlocks muxes on its parent. |
2254d24af
|
203 204 205 206 207 208 209 210 211 212 213 |
This means that accesses to both D2 and D3 are locked out for the full duration of the entire operation. Complex Examples ================ Parent-locked mux as parent of parent-locked mux ------------------------------------------------ |
ccf988b66
|
214 |
This is a useful topology, but it can be bad:: |
2254d24af
|
215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 |
.----------. .----------. .--------. .--------. | parent- |-----| parent- |-----| dev D1 | | root |--+--| locked | | locked | '--------' '--------' | | mux M1 |--. | mux M2 |--. .--------. | '----------' | '----------' '--| dev D2 | | .--------. | .--------. '--------' '--| dev D4 | '--| dev D3 | '--------' '--------' When any device is accessed, all other devices are locked out for the full duration of the operation (both muxes lock their parent, and specifically when M2 requests its parent to lock, M1 passes the buck to the root adapter). This topology is bad if M2 is an auto-closing mux and M1->select |
2f07c05f1
|
231 |
issues any unlocked I2C transfers on the root adapter that may leak |
2254d24af
|
232 233 234 235 236 |
through and be seen by the M2 adapter, thus closing M2 prematurely. Mux-locked mux as parent of mux-locked mux ------------------------------------------ |
ccf988b66
|
237 |
This is a good topology:: |
2254d24af
|
238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 |
.----------. .----------. .--------. .--------. | mux- |-----| mux- |-----| dev D1 | | root |--+--| locked | | locked | '--------' '--------' | | mux M1 |--. | mux M2 |--. .--------. | '----------' | '----------' '--| dev D2 | | .--------. | .--------. '--------' '--| dev D4 | '--| dev D3 | '--------' '--------' When device D1 is accessed, accesses to D2 are locked out for the full duration of the operation (muxes on the top child adapter of M1 are locked). But accesses to D3 and D4 are possibly interleaved at any point. Accesses to D3 locks out D1 and D2, but accesses to D4 are still possibly interleaved. Mux-locked mux as parent of parent-locked mux --------------------------------------------- |
ccf988b66
|
257 |
This is probably a bad topology:: |
2254d24af
|
258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 |
.----------. .----------. .--------. .--------. | mux- |-----| parent- |-----| dev D1 | | root |--+--| locked | | locked | '--------' '--------' | | mux M1 |--. | mux M2 |--. .--------. | '----------' | '----------' '--| dev D2 | | .--------. | .--------. '--------' '--| dev D4 | '--| dev D3 | '--------' '--------' When device D1 is accessed, accesses to D2 and D3 are locked out for the full duration of the operation (M1 locks child muxes on the root adapter). But accesses to D4 are possibly interleaved at any point. This kind of topology is generally not suitable and should probably be avoided. The reason is that M2 probably assumes that there will |
2f07c05f1
|
275 |
be no I2C transfers during its calls to ->select and ->deselect, and |
2254d24af
|
276 |
if there are, any such transfers might appear on the slave side of M2 |
2f07c05f1
|
277 |
as partial I2C transfers, i.e. garbage or worse. This might cause |
2254d24af
|
278 279 280 281 |
device lockups and/or other problems. The topology is especially troublesome if M2 is an auto-closing mux. In that case, any interleaved accesses to D4 might close M2 |
48ca3b7fb
|
282 |
prematurely, as might any I2C transfers part of M1->select. |
2254d24af
|
283 284 285 286 287 288 289 |
But if M2 is not making the above stated assumption, and if M2 is not auto-closing, the topology is fine. Parent-locked mux as parent of mux-locked mux --------------------------------------------- |
ccf988b66
|
290 |
This is a good topology:: |
2254d24af
|
291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 |
.----------. .----------. .--------. .--------. | parent- |-----| mux- |-----| dev D1 | | root |--+--| locked | | locked | '--------' '--------' | | mux M1 |--. | mux M2 |--. .--------. | '----------' | '----------' '--| dev D2 | | .--------. | .--------. '--------' '--| dev D4 | '--| dev D3 | '--------' '--------' When D1 is accessed, accesses to D2 are locked out for the full duration of the operation (muxes on the top child adapter of M1 are locked). Accesses to D3 and D4 are possibly interleaved at any point, just as is expected for mux-locked muxes. When D3 or D4 are accessed, everything else is locked out. For D3 accesses, M1 locks the root adapter. For D4 accesses, the root adapter is locked directly. Two mux-locked sibling muxes ---------------------------- |
ccf988b66
|
313 |
This is a good topology:: |
2254d24af
|
314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 |
.--------. .----------. .--| dev D1 | | mux- |--' '--------' .--| locked | .--------. | | mux M1 |-----| dev D2 | | '----------' '--------' | .----------. .--------. .--------. | | mux- |-----| dev D3 | | root |--+--| locked | '--------' '--------' | | mux M2 |--. .--------. | '----------' '--| dev D4 | | .--------. '--------' '--| dev D5 | '--------' When D1 is accessed, accesses to D2, D3 and D4 are locked out. But accesses to D5 may be interleaved at any time. Two parent-locked sibling muxes ------------------------------- |
ccf988b66
|
336 |
This is a good topology:: |
2254d24af
|
337 |
|
f10a59eb8
|
338 |
.--------. |
2254d24af
|
339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 |
.----------. .--| dev D1 | | parent- |--' '--------' .--| locked | .--------. | | mux M1 |-----| dev D2 | | '----------' '--------' | .----------. .--------. .--------. | | parent- |-----| dev D3 | | root |--+--| locked | '--------' '--------' | | mux M2 |--. .--------. | '----------' '--| dev D4 | | .--------. '--------' '--| dev D5 | '--------' When any device is accessed, accesses to all other devices are locked out. Mux-locked and parent-locked sibling muxes ------------------------------------------ |
ccf988b66
|
359 |
This is a good topology:: |
2254d24af
|
360 |
|
f10a59eb8
|
361 |
.--------. |
2254d24af
|
362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 |
.----------. .--| dev D1 | | mux- |--' '--------' .--| locked | .--------. | | mux M1 |-----| dev D2 | | '----------' '--------' | .----------. .--------. .--------. | | parent- |-----| dev D3 | | root |--+--| locked | '--------' '--------' | | mux M2 |--. .--------. | '----------' '--| dev D4 | | .--------. '--------' '--| dev D5 | '--------' When D1 or D2 are accessed, accesses to D3 and D4 are locked out while accesses to D5 may interleave. When D3 or D4 are accessed, accesses to all other devices are locked out. |