Blame view

arch/riscv/Kconfig 10 KB
ec8f24b7f   Thomas Gleixner   treewide: Add SPD...
1
  # SPDX-License-Identifier: GPL-2.0-only
fbe934d69   Palmer Dabbelt   RISC-V: Build Inf...
2
3
  #
  # For a description of the syntax of this configuration file,
cd238effe   Mauro Carvalho Chehab   docs: kbuild: con...
4
  # see Documentation/kbuild/kconfig-language.rst.
fbe934d69   Palmer Dabbelt   RISC-V: Build Inf...
5
  #
c3e4ed012   Christoph Hellwig   riscv: simplify K...
6
7
8
9
10
  config 64BIT
  	bool
  
  config 32BIT
  	bool
fbe934d69   Palmer Dabbelt   RISC-V: Build Inf...
11
12
  config RISCV
  	def_bool y
ad5d1122b   Vincent Chen   riscv: use vDSO c...
13
  	select ARCH_CLOCKSOURCE_INIT
234e9d7a6   Chenxi Mao   riscv: Select ARC...
14
  	select ARCH_SUPPORTS_ATOMIC_RMW
ad97f9df0   Christoph Hellwig   riscv: add binfmt...
15
  	select ARCH_HAS_BINFMT_FLAT
925ac7b66   Emil Renner Berthing   riscv: Select ARC...
16
  	select ARCH_HAS_DEBUG_VM_PGTABLE
e8c7ef7d5   Palmer Dabbelt   RISC-V: Sort sele...
17
  	select ARCH_HAS_DEBUG_VIRTUAL if MMU
b422d28b2   Zong Li   riscv: support DE...
18
  	select ARCH_HAS_DEBUG_WX
e8c7ef7d5   Palmer Dabbelt   RISC-V: Sort sele...
19
20
  	select ARCH_HAS_GCOV_PROFILE_ALL
  	select ARCH_HAS_GIGANTIC_PAGE
20d38f7c4   Tobias Klauser   riscv: Allow buil...
21
  	select ARCH_HAS_KCOV
e8c7ef7d5   Palmer Dabbelt   RISC-V: Sort sele...
22
23
24
25
26
  	select ARCH_HAS_MMIOWB
  	select ARCH_HAS_PTE_SPECIAL
  	select ARCH_HAS_SET_DIRECT_MAP
  	select ARCH_HAS_SET_MEMORY
  	select ARCH_HAS_STRICT_KERNEL_RWX if MMU
fc0c769ff   Vincent Chen   riscv: enable the...
27
28
  	select ARCH_OPTIONAL_KERNEL_RWX if ARCH_HAS_STRICT_KERNEL_RWX
  	select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT
e8c7ef7d5   Palmer Dabbelt   RISC-V: Sort sele...
29
  	select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
fbe934d69   Palmer Dabbelt   RISC-V: Build Inf...
30
  	select ARCH_WANT_FRAME_POINTERS
e8c7ef7d5   Palmer Dabbelt   RISC-V: Sort sele...
31
  	select ARCH_WANT_HUGE_PMD_SHARE if 64BIT
fbe934d69   Palmer Dabbelt   RISC-V: Build Inf...
32
  	select CLONE_BACKWARDS
d5be89a8d   Palmer Dabbelt   RISC-V: Resurrect...
33
  	select CLINT_TIMER if !MMU
fbe934d69   Palmer Dabbelt   RISC-V: Build Inf...
34
  	select COMMON_CLK
e8c7ef7d5   Palmer Dabbelt   RISC-V: Sort sele...
35
36
37
  	select EDAC_SUPPORT
  	select GENERIC_ARCH_TOPOLOGY if SMP
  	select GENERIC_ATOMIC64 if !64BIT
fbe934d69   Palmer Dabbelt   RISC-V: Build Inf...
38
  	select GENERIC_CLOCKEVENTS
6262f661f   Atish Patra   RISC-V: Add early...
39
  	select GENERIC_EARLY_IOREMAP
ad5d1122b   Vincent Chen   riscv: use vDSO c...
40
  	select GENERIC_GETTIMEOFDAY if HAVE_GENERIC_VDSO
e8c7ef7d5   Palmer Dabbelt   RISC-V: Sort sele...
41
42
  	select GENERIC_IOREMAP
  	select GENERIC_IRQ_MULTI_HANDLER
fbe934d69   Palmer Dabbelt   RISC-V: Build Inf...
43
44
  	select GENERIC_IRQ_SHOW
  	select GENERIC_PCI_IOMAP
e8c7ef7d5   Palmer Dabbelt   RISC-V: Sort sele...
45
  	select GENERIC_PTDUMP if MMU
9b9afe4a0   Anup Patel   RISC-V: Select GE...
46
  	select GENERIC_SCHED_CLOCK
e8c7ef7d5   Palmer Dabbelt   RISC-V: Sort sele...
47
  	select GENERIC_SMP_IDLE_THREAD
6bd33e1ec   Christoph Hellwig   riscv: add nommu ...
48
49
  	select GENERIC_STRNCPY_FROM_USER if MMU
  	select GENERIC_STRNLEN_USER if MMU
ad5d1122b   Vincent Chen   riscv: use vDSO c...
50
  	select GENERIC_TIME_VSYSCALL if MMU && 64BIT
6b7ce8927   Anup Patel   irqchip: RISC-V p...
51
  	select HANDLE_DOMAIN_IRQ
efe75c494   David Abdurachmanov   riscv: add audit ...
52
  	select HAVE_ARCH_AUDITSYSCALL
ebc00dde8   Emil Renner Berthing   riscv: Add jump-l...
53
54
  	select HAVE_ARCH_JUMP_LABEL
  	select HAVE_ARCH_JUMP_LABEL_RELATIVE
e8c7ef7d5   Palmer Dabbelt   RISC-V: Sort sele...
55
56
57
58
  	select HAVE_ARCH_KASAN if MMU && 64BIT
  	select HAVE_ARCH_KGDB
  	select HAVE_ARCH_KGDB_QXFER_PKT
  	select HAVE_ARCH_MMAP_RND_BITS if MMU
5340627e3   David Abdurachmanov   riscv: add suppor...
59
  	select HAVE_ARCH_SECCOMP_FILTER
e8c7ef7d5   Palmer Dabbelt   RISC-V: Sort sele...
60
  	select HAVE_ARCH_TRACEHOOK
2ff2b7ec6   Masahiro Yamada   kbuild: add CONFI...
61
  	select HAVE_ASM_MODVERSIONS
ed48b297f   Greentime Hu   riscv: Enable con...
62
  	select HAVE_CONTEXT_TRACKING
cbb3d91d3   Tobias Klauser   riscv: Add kmemle...
63
  	select HAVE_DEBUG_KMEMLEAK
6bd33e1ec   Christoph Hellwig   riscv: add nommu ...
64
  	select HAVE_DMA_CONTIGUOUS if MMU
e8c7ef7d5   Palmer Dabbelt   RISC-V: Sort sele...
65
  	select HAVE_EBPF_JIT if MMU
b90edb330   Jim Wilson   RISC-V: Add futex...
66
  	select HAVE_FUTEX_CMPXCHG if FUTEX
20d38f7c4   Tobias Klauser   riscv: Allow buil...
67
  	select HAVE_GCC_PLUGINS
ad5d1122b   Vincent Chen   riscv: use vDSO c...
68
  	select HAVE_GENERIC_VDSO if MMU && 64BIT
e8c7ef7d5   Palmer Dabbelt   RISC-V: Sort sele...
69
  	select HAVE_PCI
178e9fc47   Alan Kao   perf: riscv: prel...
70
  	select HAVE_PERF_EVENTS
98a93b0b5   Mao Han   riscv: Add suppor...
71
72
  	select HAVE_PERF_REGS
  	select HAVE_PERF_USER_STACK_DUMP
f2c9699f6   Guo Ren   riscv: Add STACKP...
73
  	select HAVE_STACKPROTECTOR
5aeb1b36c   David Abdurachmanov   riscv: add HAVE_S...
74
  	select HAVE_SYSCALL_TRACEPOINTS
fbe934d69   Palmer Dabbelt   RISC-V: Build Inf...
75
  	select IRQ_DOMAIN
fbe934d69   Palmer Dabbelt   RISC-V: Build Inf...
76
  	select MODULES_USE_ELF_RELA if MODULES
2cffc9569   Zong Li   RISC-V: Support M...
77
  	select MODULE_SECTIONS if MODULES
e8c7ef7d5   Palmer Dabbelt   RISC-V: Sort sele...
78
79
80
  	select OF
  	select OF_EARLY_FLATTREE
  	select OF_IRQ
2eac9c2df   Christoph Hellwig   PCI: consolidate ...
81
  	select PCI_DOMAINS_GENERIC if PCI
eb01d42a7   Christoph Hellwig   PCI: consolidate ...
82
  	select PCI_MSI if PCI
e71ee06e3   Anup Patel   RISC-V: Force sel...
83
  	select RISCV_INTC
2bc3fc877   Anup Patel   RISC-V: Remove CL...
84
  	select RISCV_TIMER if RISCV_SBI
d95f1a542   Logan Gunthorpe   RISC-V: Implement...
85
  	select SPARSEMEM_STATIC if 32BIT
e8c7ef7d5   Palmer Dabbelt   RISC-V: Sort sele...
86
87
88
  	select SPARSE_IRQ
  	select SYSCTL_EXCEPTION_TRACE
  	select THREAD_INFO_IN_TASK
11129e8ed   Christoph Hellwig   riscv: use memcpy...
89
  	select UACCESS_MEMCPY if !MMU
54c95a11c   Alexandre Ghiti   riscv: make mmap ...
90
91
92
93
94
95
96
97
98
99
  
  config ARCH_MMAP_RND_BITS_MIN
  	default 18 if 64BIT
  	default 8
  
  # max bits determined by the following formula:
  #  VA_BITS - PAGE_SHIFT - 3
  config ARCH_MMAP_RND_BITS_MAX
  	default 24 if 64BIT # SV39 based
  	default 17
fbe934d69   Palmer Dabbelt   RISC-V: Build Inf...
100

a4c3733d3   Christoph Hellwig   riscv: abstract o...
101
102
103
  # set if we run in machine mode, cleared if we run in supervisor mode
  config RISCV_M_MODE
  	bool
6bd33e1ec   Christoph Hellwig   riscv: add nommu ...
104
  	default !MMU
a4c3733d3   Christoph Hellwig   riscv: abstract o...
105

eded8bc66   Damien Le Moal   riscv: don't allo...
106
107
108
109
110
  # set if we are running in S-mode and can use SBI calls
  config RISCV_SBI
  	bool
  	depends on !RISCV_M_MODE
  	default y
fbe934d69   Palmer Dabbelt   RISC-V: Build Inf...
111
  config MMU
6bd33e1ec   Christoph Hellwig   riscv: add nommu ...
112
113
114
115
116
  	bool "MMU-based Paged Memory Management Support"
  	default y
  	help
  	  Select if you want MMU-based virtualised addressing space
  	  support by paged memory management. If unsure, say 'Y'.
fbe934d69   Palmer Dabbelt   RISC-V: Build Inf...
117

5ec9c4ff0   Christoph Hellwig   riscv: add ZONE_D...
118
119
  config ZONE_DMA32
  	bool
f1306f042   Christoph Hellwig   riscv: only enabl...
120
  	default y if 64BIT
5ec9c4ff0   Christoph Hellwig   riscv: add ZONE_D...
121

d95f1a542   Logan Gunthorpe   RISC-V: Implement...
122
123
124
125
126
127
128
129
130
  config VA_BITS
  	int
  	default 32 if 32BIT
  	default 39 if 64BIT
  
  config PA_BITS
  	int
  	default 34 if 32BIT
  	default 56 if 64BIT
fbe934d69   Palmer Dabbelt   RISC-V: Build Inf...
131
132
133
  config PAGE_OFFSET
  	hex
  	default 0xC0000000 if 32BIT && MAXPHYSMEM_2GB
6bd33e1ec   Christoph Hellwig   riscv: add nommu ...
134
  	default 0x80000000 if 64BIT && !MMU
fbe934d69   Palmer Dabbelt   RISC-V: Build Inf...
135
136
  	default 0xffffffff80000000 if 64BIT && MAXPHYSMEM_2GB
  	default 0xffffffe000000000 if 64BIT && MAXPHYSMEM_128GB
d95f1a542   Logan Gunthorpe   RISC-V: Implement...
137
138
139
140
141
  config ARCH_FLATMEM_ENABLE
  	def_bool y
  
  config ARCH_SPARSEMEM_ENABLE
  	def_bool y
aa2734202   Damien Le Moal   riscv: Force flat...
142
  	depends on MMU
d95f1a542   Logan Gunthorpe   RISC-V: Implement...
143
144
145
146
  	select SPARSEMEM_VMEMMAP_ENABLE
  
  config ARCH_SELECT_MEMORY_MODEL
  	def_bool ARCH_SPARSEMEM_ENABLE
9e953cda5   Alexandre Ghiti   riscv: Introduce ...
147
148
  config ARCH_WANT_GENERAL_HUGETLB
  	def_bool y
5fde3db5e   Zong Li   riscv: add ARCH_S...
149
150
  config ARCH_SUPPORTS_DEBUG_PAGEALLOC
  	def_bool y
9e953cda5   Alexandre Ghiti   riscv: Introduce ...
151
  config SYS_SUPPORTS_HUGETLBFS
69868418e   Kefeng Wang   riscv: Make SYS_S...
152
  	depends on MMU
9e953cda5   Alexandre Ghiti   riscv: Introduce ...
153
  	def_bool y
fbe934d69   Palmer Dabbelt   RISC-V: Build Inf...
154
155
  config STACKTRACE_SUPPORT
  	def_bool y
10626c32e   Alan Kao   riscv/ftrace: Add...
156
157
  config TRACE_IRQFLAGS_SUPPORT
  	def_bool y
fbe934d69   Palmer Dabbelt   RISC-V: Build Inf...
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
  config GENERIC_BUG
  	def_bool y
  	depends on BUG
  	select GENERIC_BUG_RELATIVE_POINTERS if 64BIT
  
  config GENERIC_BUG_RELATIVE_POINTERS
  	bool
  
  config GENERIC_CALIBRATE_DELAY
  	def_bool y
  
  config GENERIC_CSUM
  	def_bool y
  
  config GENERIC_HWEIGHT
  	def_bool y
f2c17aabc   Anup Patel   RISC-V: Implement...
174
  config FIX_EARLYCON_MEM
0312a3d4b   Andreas Schwab   riscv: Fix use of...
175
  	def_bool MMU
f2c17aabc   Anup Patel   RISC-V: Implement...
176

fbe934d69   Palmer Dabbelt   RISC-V: Build Inf...
177
178
179
180
  config PGTABLE_LEVELS
  	int
  	default 3 if 64BIT
  	default 2
3c4697982   Guo Ren   riscv: Enable LOC...
181
182
  config LOCKDEP_SUPPORT
  	def_bool y
0cbb8a32c   Loys Ollivier   arch: riscv: add ...
183
  source "arch/riscv/Kconfig.socs"
fbe934d69   Palmer Dabbelt   RISC-V: Build Inf...
184
185
186
187
188
189
  menu "Platform type"
  
  choice
  	prompt "Base ISA"
  	default ARCH_RV64I
  	help
86cca81a3   Antony Pavlov   RISC-V: Kconfig: ...
190
  	  This selects the base ISA that this kernel will target and must match
fbe934d69   Palmer Dabbelt   RISC-V: Build Inf...
191
192
193
194
  	  the target platform.
  
  config ARCH_RV32I
  	bool "RV32I"
fbe934d69   Palmer Dabbelt   RISC-V: Build Inf...
195
  	select 32BIT
e3d598056   Matt Redfearn   lib: Rename compi...
196
197
198
  	select GENERIC_LIB_ASHLDI3
  	select GENERIC_LIB_ASHRDI3
  	select GENERIC_LIB_LSHRDI3
8f79125d2   Zong Li   RISC-V: Select GE...
199
  	select GENERIC_LIB_UCMPDI2
6bd33e1ec   Christoph Hellwig   riscv: add nommu ...
200
  	select MMU
fbe934d69   Palmer Dabbelt   RISC-V: Build Inf...
201
202
203
  
  config ARCH_RV64I
  	bool "RV64I"
fbe934d69   Palmer Dabbelt   RISC-V: Build Inf...
204
  	select 64BIT
c12d3362a   Ard Biesheuvel   int128: move __ui...
205
  	select ARCH_SUPPORTS_INT128 if CC_HAS_INT128 && GCC_VERSION >= 50000
6bd33e1ec   Christoph Hellwig   riscv: add nommu ...
206
207
  	select HAVE_DYNAMIC_FTRACE if MMU
  	select HAVE_DYNAMIC_FTRACE_WITH_REGS if HAVE_DYNAMIC_FTRACE
e8c7ef7d5   Palmer Dabbelt   RISC-V: Sort sele...
208
209
210
  	select HAVE_FTRACE_MCOUNT_RECORD
  	select HAVE_FUNCTION_GRAPH_TRACER
  	select HAVE_FUNCTION_TRACER
6bd33e1ec   Christoph Hellwig   riscv: add nommu ...
211
  	select SWIOTLB if MMU
fbe934d69   Palmer Dabbelt   RISC-V: Build Inf...
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
  
  endchoice
  
  # We must be able to map all physical memory into the kernel, but the compiler
  # is still a bit more efficient when generating code if it's setup in a manner
  # such that it can only map 2GiB of memory.
  choice
  	prompt "Kernel Code Model"
  	default CMODEL_MEDLOW if 32BIT
  	default CMODEL_MEDANY if 64BIT
  
  	config CMODEL_MEDLOW
  		bool "medium low code model"
  	config CMODEL_MEDANY
  		bool "medium any code model"
  endchoice
ab1ef68e5   Zong Li   RISC-V: Add secti...
228
229
230
  config MODULE_SECTIONS
  	bool
  	select HAVE_MOD_ARCH_SPECIFIC
fbe934d69   Palmer Dabbelt   RISC-V: Build Inf...
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
  choice
  	prompt "Maximum Physical Memory"
  	default MAXPHYSMEM_2GB if 32BIT
  	default MAXPHYSMEM_2GB if 64BIT && CMODEL_MEDLOW
  	default MAXPHYSMEM_128GB if 64BIT && CMODEL_MEDANY
  
  	config MAXPHYSMEM_2GB
  		bool "2GiB"
  	config MAXPHYSMEM_128GB
  		depends on 64BIT && CMODEL_MEDANY
  		bool "128GiB"
  endchoice
  
  
  config SMP
  	bool "Symmetric Multi-Processing"
  	help
  	  This enables support for systems with more than one CPU.  If
  	  you say N here, the kernel will run on single and
  	  multiprocessor machines, but will use only one CPU of a
  	  multiprocessor machine. If you say Y here, the kernel will run
  	  on many, but not all, single processor machines. On a single
  	  processor machine, the kernel will run faster if you say N
  	  here.
  
  	  If you don't know what to do here, say N.
  
  config NR_CPUS
  	int "Maximum number of CPUs (2-32)"
  	range 2 32
  	depends on SMP
  	default "8"
f1e58583b   Atish Patra   RISC-V: Support c...
263
264
265
266
267
268
269
270
271
272
  config HOTPLUG_CPU
  	bool "Support for hot-pluggable CPUs"
  	depends on SMP
  	select GENERIC_IRQ_MIGRATION
  	help
  
  	  Say Y here to experiment with turning CPUs off and on.  CPUs
  	  can be controlled through /sys/devices/system/cpu.
  
  	  Say N if you want to disable CPU hotplug.
fbe934d69   Palmer Dabbelt   RISC-V: Build Inf...
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
  choice
  	prompt "CPU Tuning"
  	default TUNE_GENERIC
  
  config TUNE_GENERIC
  	bool "generic"
  
  endchoice
  
  config RISCV_ISA_C
  	bool "Emit compressed instructions when building Linux"
  	default y
  	help
  	   Adds "C" to the ISA subsets that the toolchain is allowed to emit
  	   when building Linux, which results in compressed instructions in the
  	   Linux binary.
  
  	   If you don't know what to do here, say Y.
178e9fc47   Alan Kao   perf: riscv: prel...
291
292
293
294
295
296
297
298
299
300
301
302
  menu "supported PMU type"
  	depends on PERF_EVENTS
  
  config RISCV_BASE_PMU
  	bool "Base Performance Monitoring Unit"
  	def_bool y
  	help
  	  A base PMU that serves as a reference implementation and has limited
  	  feature of perf.  It can run on any RISC-V machines so serves as the
  	  fallback, but this option can also be disable to reduce kernel size.
  
  endmenu
9671f7061   Alan Kao   Allow to disable ...
303
304
305
306
307
308
309
310
  config FPU
  	bool "FPU support"
  	default y
  	help
  	  Say N here if you want to disable all floating-point related procedure
  	  in the kernel.
  
  	  If you don't know what to do here, say Y.
fbe934d69   Palmer Dabbelt   RISC-V: Build Inf...
311
  endmenu
aef53f97b   Nick Kossifidis   RISC-V: Cosmetic ...
312
  menu "Kernel features"
fbe934d69   Palmer Dabbelt   RISC-V: Build Inf...
313

fbe934d69   Palmer Dabbelt   RISC-V: Build Inf...
314
  source "kernel/Kconfig.hz"
efca13989   Atish Patra   RISC-V: Introduce...
315
316
317
318
319
320
321
  config RISCV_SBI_V01
  	bool "SBI v0.1 support"
  	default y
  	depends on RISCV_SBI
  	help
  	  This config allows kernel to use SBI v0.1 APIs. This will be
  	  deprecated in future once legacy M-mode software are no longer in use.
fbe934d69   Palmer Dabbelt   RISC-V: Build Inf...
322
  endmenu
aef53f97b   Nick Kossifidis   RISC-V: Cosmetic ...
323
  menu "Boot options"
3aed8c432   Nick Kossifidis   RISC-V: Update Kc...
324
325
  config CMDLINE
  	string "Built-in kernel command line"
aef53f97b   Nick Kossifidis   RISC-V: Cosmetic ...
326
  	help
3aed8c432   Nick Kossifidis   RISC-V: Update Kc...
327
328
329
330
  	  For most platforms, the arguments for the kernel's command line
  	  are provided at run-time, during boot. However, there are cases
  	  where either no arguments are being provided or the provided
  	  arguments are insufficient or even invalid.
aef53f97b   Nick Kossifidis   RISC-V: Cosmetic ...
331

3aed8c432   Nick Kossifidis   RISC-V: Update Kc...
332
333
  	  When that occurs, it is possible to define a built-in command
  	  line here and choose how the kernel should use it later on.
aef53f97b   Nick Kossifidis   RISC-V: Cosmetic ...
334

3aed8c432   Nick Kossifidis   RISC-V: Update Kc...
335
336
337
338
339
340
  choice
  	prompt "Built-in command line usage" if CMDLINE != ""
  	default CMDLINE_FALLBACK
  	help
  	  Choose how the kernel will handle the provided built-in command
  	  line.
aef53f97b   Nick Kossifidis   RISC-V: Cosmetic ...
341

3aed8c432   Nick Kossifidis   RISC-V: Update Kc...
342
343
  config CMDLINE_FALLBACK
  	bool "Use bootloader kernel arguments if available"
aef53f97b   Nick Kossifidis   RISC-V: Cosmetic ...
344
  	help
3aed8c432   Nick Kossifidis   RISC-V: Update Kc...
345
346
347
348
349
350
351
352
353
354
  	  Use the built-in command line as fallback in case we get nothing
  	  during boot. This is the default behaviour.
  
  config CMDLINE_EXTEND
  	bool "Extend bootloader kernel arguments"
  	help
  	  The command-line arguments provided during boot will be
  	  appended to the built-in command line. This is useful in
  	  cases where the provided arguments are insufficient and
  	  you don't want to or cannot modify them.
aef53f97b   Nick Kossifidis   RISC-V: Cosmetic ...
355
356
  
  config CMDLINE_FORCE
3aed8c432   Nick Kossifidis   RISC-V: Update Kc...
357
  	bool "Always use the default kernel command string"
aef53f97b   Nick Kossifidis   RISC-V: Cosmetic ...
358
  	help
3aed8c432   Nick Kossifidis   RISC-V: Update Kc...
359
360
361
362
  	  Always use the built-in command line, even if we get one during
  	  boot. This is useful in case you need to override the provided
  	  command line on systems where you don't have or want control
  	  over it.
aef53f97b   Nick Kossifidis   RISC-V: Cosmetic ...
363

3aed8c432   Nick Kossifidis   RISC-V: Update Kc...
364
  endchoice
aef53f97b   Nick Kossifidis   RISC-V: Cosmetic ...
365

d7071743d   Atish Patra   RISC-V: Add EFI s...
366
367
368
369
370
371
372
373
374
375
376
  config EFI_STUB
  	bool
  
  config EFI
  	bool "UEFI runtime support"
  	depends on OF
  	select LIBFDT
  	select UCS2_STRING
  	select EFI_PARAMS_FROM_FDT
  	select EFI_STUB
  	select EFI_GENERIC_STUB
b91540d52   Atish Patra   RISC-V: Add EFI r...
377
  	select EFI_RUNTIME_WRAPPERS
d7071743d   Atish Patra   RISC-V: Add EFI s...
378
  	select RISCV_ISA_C
b91540d52   Atish Patra   RISC-V: Add EFI r...
379
  	depends on MMU
d7071743d   Atish Patra   RISC-V: Add EFI s...
380
381
382
383
384
385
386
  	default y
  	help
  	  This option provides support for runtime services provided
  	  by UEFI firmware (such as non-volatile variables, realtime
  	  clock, and platform reset). A UEFI stub is also provided to
  	  allow the kernel to be booted as an EFI application. This
  	  is only useful on systems that have UEFI firmware.
aef53f97b   Nick Kossifidis   RISC-V: Cosmetic ...
387
  endmenu
2d2682512   Palmer Dabbelt   riscv: Allow devi...
388
389
390
391
  config BUILTIN_DTB
  	def_bool n
  	depends on RISCV_M_MODE
  	depends on OF
fbe934d69   Palmer Dabbelt   RISC-V: Build Inf...
392
  menu "Power management options"
8636a1f96   Masahiro Yamada   treewide: surroun...
393
  source "kernel/power/Kconfig"
fbe934d69   Palmer Dabbelt   RISC-V: Build Inf...
394
395
  
  endmenu
d7071743d   Atish Patra   RISC-V: Add EFI s...
396
397
  
  source "drivers/firmware/Kconfig"