Blame view
drivers/pcmcia/m32r_pcc.h
1.33 KB
b24413180 License cleanup: ... |
1 |
/* SPDX-License-Identifier: GPL-2.0 */ |
1da177e4c Linux-2.6.12-rc2 |
2 3 4 5 6 7 8 |
/* * Copyright (C) 2001 by Hiroyuki Kondo */ #define M32R_MAX_PCC 2 /* |
b595076a1 tree-wide: fix co... |
9 |
* M32R PC Card Controller |
1da177e4c Linux-2.6.12-rc2 |
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 |
*/ #define M32R_PCC0_BASE 0x00ef7000 #define M32R_PCC1_BASE 0x00ef7020 /* * Register offsets */ #define PCCR 0x00 #define PCADR 0x04 #define PCMOD 0x08 #define PCIRC 0x0c #define PCCSIGCR 0x10 #define PCATCR 0x14 /* * PCCR */ #define PCCR_PCEN (1UL<<(31-31)) /* * PCIRC */ #define PCIRC_BWERR (1UL<<(31-7)) #define PCIRC_CDIN1 (1UL<<(31-14)) #define PCIRC_CDIN2 (1UL<<(31-15)) #define PCIRC_BEIEN (1UL<<(31-23)) #define PCIRC_CIIEN (1UL<<(31-30)) #define PCIRC_COIEN (1UL<<(31-31)) /* * PCCSIGCR */ #define PCCSIGCR_SEN (1UL<<(31-3)) #define PCCSIGCR_VEN (1UL<<(31-7)) #define PCCSIGCR_CRST (1UL<<(31-15)) #define PCCSIGCR_COCR (1UL<<(31-31)) /* * */ #define PCMOD_AS_ATTRIB (1UL<<(31-19)) #define PCMOD_AS_IO (1UL<<(31-18)) #define PCMOD_CBSZ (1UL<<(31-23)) /* set for 8bit */ #define PCMOD_DBEX (1UL<<(31-31)) /* set for excahnge */ /* * M32R PCC Map addr */ #define M32R_PCC0_MAPBASE 0x14000000 #define M32R_PCC1_MAPBASE 0x16000000 #define M32R_PCC_MAPMAX 0x02000000 #define M32R_PCC_MAPSIZE 0x00001000 /* XXX */ #define M32R_PCC_MAPMASK (~(M32R_PCC_MAPMAX-1)) |