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virt/kvm/arm/mmu.c
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/* * Copyright (C) 2012 - Virtual Open Systems and Columbia University * Author: Christoffer Dall <c.dall@virtualopensystems.com> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License, version 2, as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. */ |
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#include <linux/mman.h> #include <linux/kvm_host.h> #include <linux/io.h> |
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#include <linux/hugetlb.h> |
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#include <linux/sched/signal.h> |
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#include <trace/events/kvm.h> |
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#include <asm/pgalloc.h> |
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#include <asm/cacheflush.h> |
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#include <asm/kvm_arm.h> #include <asm/kvm_mmu.h> |
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#include <asm/kvm_mmio.h> |
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#include <asm/kvm_asm.h> |
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#include <asm/kvm_emulate.h> |
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#include <asm/virt.h> |
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#include <asm/system_misc.h> |
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#include "trace.h" |
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static pgd_t *boot_hyp_pgd; |
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static pgd_t *hyp_pgd; |
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static pgd_t *merged_hyp_pgd; |
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static DEFINE_MUTEX(kvm_hyp_pgd_mutex); |
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static unsigned long hyp_idmap_start; static unsigned long hyp_idmap_end; static phys_addr_t hyp_idmap_vector; |
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#define S2_PGD_SIZE (PTRS_PER_S2_PGD * sizeof(pgd_t)) |
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#define hyp_pgd_order get_order(PTRS_PER_PGD * sizeof(pgd_t)) |
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#define KVM_S2PTE_FLAG_IS_IOMAP (1UL << 0) #define KVM_S2_FLAG_LOGGING_ACTIVE (1UL << 1) static bool memslot_is_logging(struct kvm_memory_slot *memslot) { |
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return memslot->dirty_bitmap && !(memslot->flags & KVM_MEM_READONLY); |
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} /** * kvm_flush_remote_tlbs() - flush all VM TLB entries for v7/8 * @kvm: pointer to kvm structure. * * Interface to HYP function to flush all VM TLB entries */ void kvm_flush_remote_tlbs(struct kvm *kvm) { kvm_call_hyp(__kvm_tlb_flush_vmid, kvm); |
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} |
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static void kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa) |
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{ |
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kvm_call_hyp(__kvm_tlb_flush_vmid_ipa, kvm, ipa); |
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} |
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/* * D-Cache management functions. They take the page table entries by * value, as they are flushing the cache using the kernel mapping (or * kmap on 32bit). */ static void kvm_flush_dcache_pte(pte_t pte) { __kvm_flush_dcache_pte(pte); } static void kvm_flush_dcache_pmd(pmd_t pmd) { __kvm_flush_dcache_pmd(pmd); } static void kvm_flush_dcache_pud(pud_t pud) { __kvm_flush_dcache_pud(pud); } |
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static bool kvm_is_device_pfn(unsigned long pfn) { return !pfn_valid(pfn); } |
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/** * stage2_dissolve_pmd() - clear and flush huge PMD entry * @kvm: pointer to kvm structure. * @addr: IPA * @pmd: pmd pointer for IPA * * Function clears a PMD entry, flushes addr 1st and 2nd stage TLBs. Marks all * pages in the range dirty. */ static void stage2_dissolve_pmd(struct kvm *kvm, phys_addr_t addr, pmd_t *pmd) { |
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if (!pmd_thp_or_huge(*pmd)) |
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return; pmd_clear(pmd); kvm_tlb_flush_vmid_ipa(kvm, addr); put_page(virt_to_page(pmd)); } |
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static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache, int min, int max) { void *page; BUG_ON(max > KVM_NR_MEM_OBJS); if (cache->nobjs >= min) return 0; while (cache->nobjs < max) { page = (void *)__get_free_page(PGALLOC_GFP); if (!page) return -ENOMEM; cache->objects[cache->nobjs++] = page; } return 0; } static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc) { while (mc->nobjs) free_page((unsigned long)mc->objects[--mc->nobjs]); } static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc) { void *p; BUG_ON(!mc || !mc->nobjs); p = mc->objects[--mc->nobjs]; return p; } |
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static void clear_stage2_pgd_entry(struct kvm *kvm, pgd_t *pgd, phys_addr_t addr) |
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{ |
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pud_t *pud_table __maybe_unused = stage2_pud_offset(pgd, 0UL); stage2_pgd_clear(pgd); |
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kvm_tlb_flush_vmid_ipa(kvm, addr); |
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stage2_pud_free(pud_table); |
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put_page(virt_to_page(pgd)); |
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} |
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static void clear_stage2_pud_entry(struct kvm *kvm, pud_t *pud, phys_addr_t addr) |
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{ |
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pmd_t *pmd_table __maybe_unused = stage2_pmd_offset(pud, 0); VM_BUG_ON(stage2_pud_huge(*pud)); stage2_pud_clear(pud); |
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kvm_tlb_flush_vmid_ipa(kvm, addr); |
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stage2_pmd_free(pmd_table); |
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put_page(virt_to_page(pud)); } |
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|
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static void clear_stage2_pmd_entry(struct kvm *kvm, pmd_t *pmd, phys_addr_t addr) |
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{ |
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pte_t *pte_table = pte_offset_kernel(pmd, 0); |
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VM_BUG_ON(pmd_thp_or_huge(*pmd)); |
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pmd_clear(pmd); kvm_tlb_flush_vmid_ipa(kvm, addr); pte_free_kernel(NULL, pte_table); |
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put_page(virt_to_page(pmd)); } |
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/* * Unmapping vs dcache management: * * If a guest maps certain memory pages as uncached, all writes will * bypass the data cache and go directly to RAM. However, the CPUs * can still speculate reads (not writes) and fill cache lines with * data. * * Those cache lines will be *clean* cache lines though, so a * clean+invalidate operation is equivalent to an invalidate * operation, because no cache lines are marked dirty. * * Those clean cache lines could be filled prior to an uncached write * by the guest, and the cache coherent IO subsystem would therefore * end up writing old data to disk. * * This is why right after unmapping a page/section and invalidating * the corresponding TLBs, we call kvm_flush_dcache_p*() to make sure * the IO subsystem will never hit in the cache. */ |
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static void unmap_stage2_ptes(struct kvm *kvm, pmd_t *pmd, |
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phys_addr_t addr, phys_addr_t end) |
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{ |
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phys_addr_t start_addr = addr; pte_t *pte, *start_pte; start_pte = pte = pte_offset_kernel(pmd, addr); do { if (!pte_none(*pte)) { |
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pte_t old_pte = *pte; |
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kvm_set_pte(pte, __pte(0)); |
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kvm_tlb_flush_vmid_ipa(kvm, addr); |
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/* No need to invalidate the cache for device mappings */ |
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if (!kvm_is_device_pfn(pte_pfn(old_pte))) |
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kvm_flush_dcache_pte(old_pte); put_page(virt_to_page(pte)); |
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} } while (pte++, addr += PAGE_SIZE, addr != end); |
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if (stage2_pte_table_empty(start_pte)) clear_stage2_pmd_entry(kvm, pmd, start_addr); |
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} |
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static void unmap_stage2_pmds(struct kvm *kvm, pud_t *pud, |
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phys_addr_t addr, phys_addr_t end) |
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{ |
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phys_addr_t next, start_addr = addr; pmd_t *pmd, *start_pmd; |
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|
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start_pmd = pmd = stage2_pmd_offset(pud, addr); |
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do { |
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next = stage2_pmd_addr_end(addr, end); |
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if (!pmd_none(*pmd)) { |
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if (pmd_thp_or_huge(*pmd)) { |
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pmd_t old_pmd = *pmd; |
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pmd_clear(pmd); kvm_tlb_flush_vmid_ipa(kvm, addr); |
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kvm_flush_dcache_pmd(old_pmd); |
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put_page(virt_to_page(pmd)); } else { |
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unmap_stage2_ptes(kvm, pmd, addr, next); |
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} |
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} |
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} while (pmd++, addr = next, addr != end); |
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|
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if (stage2_pmd_table_empty(start_pmd)) clear_stage2_pud_entry(kvm, pud, start_addr); |
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} |
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|
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static void unmap_stage2_puds(struct kvm *kvm, pgd_t *pgd, |
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phys_addr_t addr, phys_addr_t end) { phys_addr_t next, start_addr = addr; pud_t *pud, *start_pud; |
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|
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start_pud = pud = stage2_pud_offset(pgd, addr); |
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do { |
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next = stage2_pud_addr_end(addr, end); if (!stage2_pud_none(*pud)) { if (stage2_pud_huge(*pud)) { |
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pud_t old_pud = *pud; |
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stage2_pud_clear(pud); |
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kvm_tlb_flush_vmid_ipa(kvm, addr); |
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kvm_flush_dcache_pud(old_pud); |
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put_page(virt_to_page(pud)); } else { |
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unmap_stage2_pmds(kvm, pud, addr, next); |
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} } |
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} while (pud++, addr = next, addr != end); |
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|
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if (stage2_pud_table_empty(start_pud)) clear_stage2_pgd_entry(kvm, pgd, start_addr); |
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} |
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/** * unmap_stage2_range -- Clear stage2 page table entries to unmap a range * @kvm: The VM pointer * @start: The intermediate physical base address of the range to unmap * @size: The size of the area to unmap * * Clear a range of stage-2 mappings, lowering the various ref-counts. Must * be called while holding mmu_lock (unless for freeing the stage2 pgd before * destroying the VM), otherwise another faulting VCPU may come in and mess * with things behind our backs. */ static void unmap_stage2_range(struct kvm *kvm, phys_addr_t start, u64 size) |
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{ pgd_t *pgd; phys_addr_t addr = start, end = start + size; phys_addr_t next; |
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assert_spin_locked(&kvm->mmu_lock); |
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pgd = kvm->arch.pgd + stage2_pgd_index(addr); |
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do { |
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/* * Make sure the page table is still active, as another thread * could have possibly freed the page table, while we released * the lock. */ if (!READ_ONCE(kvm->arch.pgd)) break; |
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next = stage2_pgd_addr_end(addr, end); if (!stage2_pgd_none(*pgd)) unmap_stage2_puds(kvm, pgd, addr, next); |
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/* * If the range is too large, release the kvm->mmu_lock * to prevent starvation and lockup detector warnings. */ if (next != end) cond_resched_lock(&kvm->mmu_lock); |
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} while (pgd++, addr = next, addr != end); |
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} |
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static void stage2_flush_ptes(struct kvm *kvm, pmd_t *pmd, phys_addr_t addr, phys_addr_t end) { pte_t *pte; pte = pte_offset_kernel(pmd, addr); do { |
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if (!pte_none(*pte) && !kvm_is_device_pfn(pte_pfn(*pte))) |
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kvm_flush_dcache_pte(*pte); |
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} while (pte++, addr += PAGE_SIZE, addr != end); } static void stage2_flush_pmds(struct kvm *kvm, pud_t *pud, phys_addr_t addr, phys_addr_t end) { pmd_t *pmd; phys_addr_t next; |
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pmd = stage2_pmd_offset(pud, addr); |
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do { |
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next = stage2_pmd_addr_end(addr, end); |
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if (!pmd_none(*pmd)) { |
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if (pmd_thp_or_huge(*pmd)) |
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kvm_flush_dcache_pmd(*pmd); else |
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stage2_flush_ptes(kvm, pmd, addr, next); |
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} } while (pmd++, addr = next, addr != end); } static void stage2_flush_puds(struct kvm *kvm, pgd_t *pgd, phys_addr_t addr, phys_addr_t end) { pud_t *pud; phys_addr_t next; |
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pud = stage2_pud_offset(pgd, addr); |
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do { |
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next = stage2_pud_addr_end(addr, end); if (!stage2_pud_none(*pud)) { if (stage2_pud_huge(*pud)) |
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kvm_flush_dcache_pud(*pud); else |
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stage2_flush_pmds(kvm, pud, addr, next); |
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} } while (pud++, addr = next, addr != end); } static void stage2_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot) { phys_addr_t addr = memslot->base_gfn << PAGE_SHIFT; phys_addr_t end = addr + PAGE_SIZE * memslot->npages; phys_addr_t next; pgd_t *pgd; |
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pgd = kvm->arch.pgd + stage2_pgd_index(addr); |
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do { |
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next = stage2_pgd_addr_end(addr, end); |
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stage2_flush_puds(kvm, pgd, addr, next); } while (pgd++, addr = next, addr != end); } /** * stage2_flush_vm - Invalidate cache for pages mapped in stage 2 * @kvm: The struct kvm pointer * * Go through the stage 2 page tables and invalidate any cache lines * backing memory already mapped to the VM. */ |
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static void stage2_flush_vm(struct kvm *kvm) |
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{ struct kvm_memslots *slots; struct kvm_memory_slot *memslot; int idx; idx = srcu_read_lock(&kvm->srcu); spin_lock(&kvm->mmu_lock); slots = kvm_memslots(kvm); kvm_for_each_memslot(memslot, slots) stage2_flush_memslot(kvm, memslot); spin_unlock(&kvm->mmu_lock); srcu_read_unlock(&kvm->srcu, idx); } |
64f324979 kvm-arm: Add expl... |
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static void clear_hyp_pgd_entry(pgd_t *pgd) { pud_t *pud_table __maybe_unused = pud_offset(pgd, 0UL); pgd_clear(pgd); pud_free(NULL, pud_table); put_page(virt_to_page(pgd)); } static void clear_hyp_pud_entry(pud_t *pud) { pmd_t *pmd_table __maybe_unused = pmd_offset(pud, 0); VM_BUG_ON(pud_huge(*pud)); pud_clear(pud); pmd_free(NULL, pmd_table); put_page(virt_to_page(pud)); } static void clear_hyp_pmd_entry(pmd_t *pmd) { pte_t *pte_table = pte_offset_kernel(pmd, 0); VM_BUG_ON(pmd_thp_or_huge(*pmd)); pmd_clear(pmd); pte_free_kernel(NULL, pte_table); put_page(virt_to_page(pmd)); } static void unmap_hyp_ptes(pmd_t *pmd, phys_addr_t addr, phys_addr_t end) { pte_t *pte, *start_pte; start_pte = pte = pte_offset_kernel(pmd, addr); do { if (!pte_none(*pte)) { kvm_set_pte(pte, __pte(0)); put_page(virt_to_page(pte)); } } while (pte++, addr += PAGE_SIZE, addr != end); if (hyp_pte_table_empty(start_pte)) clear_hyp_pmd_entry(pmd); } static void unmap_hyp_pmds(pud_t *pud, phys_addr_t addr, phys_addr_t end) { phys_addr_t next; pmd_t *pmd, *start_pmd; start_pmd = pmd = pmd_offset(pud, addr); do { next = pmd_addr_end(addr, end); /* Hyp doesn't use huge pmds */ if (!pmd_none(*pmd)) unmap_hyp_ptes(pmd, addr, next); } while (pmd++, addr = next, addr != end); if (hyp_pmd_table_empty(start_pmd)) clear_hyp_pud_entry(pud); } static void unmap_hyp_puds(pgd_t *pgd, phys_addr_t addr, phys_addr_t end) { phys_addr_t next; pud_t *pud, *start_pud; start_pud = pud = pud_offset(pgd, addr); do { next = pud_addr_end(addr, end); /* Hyp doesn't use huge puds */ if (!pud_none(*pud)) unmap_hyp_pmds(pud, addr, next); } while (pud++, addr = next, addr != end); if (hyp_pud_table_empty(start_pud)) clear_hyp_pgd_entry(pgd); } static void unmap_hyp_range(pgd_t *pgdp, phys_addr_t start, u64 size) { pgd_t *pgd; phys_addr_t addr = start, end = start + size; phys_addr_t next; /* * We don't unmap anything from HYP, except at the hyp tear down. * Hence, we don't have to invalidate the TLBs here. */ pgd = pgdp + pgd_index(addr); do { next = pgd_addr_end(addr, end); if (!pgd_none(*pgd)) unmap_hyp_puds(pgd, addr, next); } while (pgd++, addr = next, addr != end); } |
342cd0ab0 KVM: ARM: Hypervi... |
477 |
/** |
4f728276f ARM: KVM: rework ... |
478 |
* free_hyp_pgds - free Hyp-mode page tables |
342cd0ab0 KVM: ARM: Hypervi... |
479 |
* |
5a677ce04 ARM: KVM: switch ... |
480 481 482 483 484 485 |
* Assumes hyp_pgd is a page table used strictly in Hyp-mode and * therefore contains either mappings in the kernel memory area (above * PAGE_OFFSET), or device mappings in the vmalloc range (from * VMALLOC_START to VMALLOC_END). * * boot_hyp_pgd should only map two pages for the init code. |
342cd0ab0 KVM: ARM: Hypervi... |
486 |
*/ |
4f728276f ARM: KVM: rework ... |
487 |
void free_hyp_pgds(void) |
342cd0ab0 KVM: ARM: Hypervi... |
488 |
{ |
d157f4a51 ARM: KVM: perform... |
489 |
mutex_lock(&kvm_hyp_pgd_mutex); |
5a677ce04 ARM: KVM: switch ... |
490 |
|
26781f9ce arm/arm64: KVM: K... |
491 492 493 494 495 |
if (boot_hyp_pgd) { unmap_hyp_range(boot_hyp_pgd, hyp_idmap_start, PAGE_SIZE); free_pages((unsigned long)boot_hyp_pgd, hyp_pgd_order); boot_hyp_pgd = NULL; } |
4f728276f ARM: KVM: rework ... |
496 |
if (hyp_pgd) { |
26781f9ce arm/arm64: KVM: K... |
497 |
unmap_hyp_range(hyp_pgd, hyp_idmap_start, PAGE_SIZE); |
4e9cca926 KVM: arm/arm64: F... |
498 499 500 501 |
unmap_hyp_range(hyp_pgd, kern_hyp_va(PAGE_OFFSET), (uintptr_t)high_memory - PAGE_OFFSET); unmap_hyp_range(hyp_pgd, kern_hyp_va(VMALLOC_START), VMALLOC_END - VMALLOC_START); |
d4cb9df5d ARM: KVM: be more... |
502 |
|
38f791a4e arm64: KVM: Imple... |
503 |
free_pages((unsigned long)hyp_pgd, hyp_pgd_order); |
d157f4a51 ARM: KVM: perform... |
504 |
hyp_pgd = NULL; |
4f728276f ARM: KVM: rework ... |
505 |
} |
e4c5a6851 arm64: KVM: use I... |
506 507 508 509 510 |
if (merged_hyp_pgd) { clear_page(merged_hyp_pgd); free_page((unsigned long)merged_hyp_pgd); merged_hyp_pgd = NULL; } |
4f728276f ARM: KVM: rework ... |
511 |
|
342cd0ab0 KVM: ARM: Hypervi... |
512 513 514 515 |
mutex_unlock(&kvm_hyp_pgd_mutex); } static void create_hyp_pte_mappings(pmd_t *pmd, unsigned long start, |
6060df84c ARM: KVM: simplif... |
516 517 |
unsigned long end, unsigned long pfn, pgprot_t prot) |
342cd0ab0 KVM: ARM: Hypervi... |
518 519 520 |
{ pte_t *pte; unsigned long addr; |
342cd0ab0 KVM: ARM: Hypervi... |
521 |
|
3562c76dc ARM: KVM: fix HYP... |
522 523 |
addr = start; do { |
6060df84c ARM: KVM: simplif... |
524 525 |
pte = pte_offset_kernel(pmd, addr); kvm_set_pte(pte, pfn_pte(pfn, prot)); |
4f728276f ARM: KVM: rework ... |
526 |
get_page(virt_to_page(pte)); |
5a677ce04 ARM: KVM: switch ... |
527 |
kvm_flush_dcache_to_poc(pte, sizeof(*pte)); |
6060df84c ARM: KVM: simplif... |
528 |
pfn++; |
3562c76dc ARM: KVM: fix HYP... |
529 |
} while (addr += PAGE_SIZE, addr != end); |
342cd0ab0 KVM: ARM: Hypervi... |
530 531 532 |
} static int create_hyp_pmd_mappings(pud_t *pud, unsigned long start, |
6060df84c ARM: KVM: simplif... |
533 534 |
unsigned long end, unsigned long pfn, pgprot_t prot) |
342cd0ab0 KVM: ARM: Hypervi... |
535 536 537 538 |
{ pmd_t *pmd; pte_t *pte; unsigned long addr, next; |
3562c76dc ARM: KVM: fix HYP... |
539 540 |
addr = start; do { |
6060df84c ARM: KVM: simplif... |
541 |
pmd = pmd_offset(pud, addr); |
342cd0ab0 KVM: ARM: Hypervi... |
542 543 544 545 |
BUG_ON(pmd_sect(*pmd)); if (pmd_none(*pmd)) { |
6060df84c ARM: KVM: simplif... |
546 |
pte = pte_alloc_one_kernel(NULL, addr); |
342cd0ab0 KVM: ARM: Hypervi... |
547 548 549 550 551 552 |
if (!pte) { kvm_err("Cannot allocate Hyp pte "); return -ENOMEM; } pmd_populate_kernel(NULL, pmd, pte); |
4f728276f ARM: KVM: rework ... |
553 |
get_page(virt_to_page(pmd)); |
5a677ce04 ARM: KVM: switch ... |
554 |
kvm_flush_dcache_to_poc(pmd, sizeof(*pmd)); |
342cd0ab0 KVM: ARM: Hypervi... |
555 556 557 |
} next = pmd_addr_end(addr, end); |
6060df84c ARM: KVM: simplif... |
558 559 |
create_hyp_pte_mappings(pmd, addr, next, pfn, prot); pfn += (next - addr) >> PAGE_SHIFT; |
3562c76dc ARM: KVM: fix HYP... |
560 |
} while (addr = next, addr != end); |
342cd0ab0 KVM: ARM: Hypervi... |
561 562 563 |
return 0; } |
38f791a4e arm64: KVM: Imple... |
564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 |
static int create_hyp_pud_mappings(pgd_t *pgd, unsigned long start, unsigned long end, unsigned long pfn, pgprot_t prot) { pud_t *pud; pmd_t *pmd; unsigned long addr, next; int ret; addr = start; do { pud = pud_offset(pgd, addr); if (pud_none_or_clear_bad(pud)) { pmd = pmd_alloc_one(NULL, addr); if (!pmd) { kvm_err("Cannot allocate Hyp pmd "); return -ENOMEM; } pud_populate(NULL, pud, pmd); get_page(virt_to_page(pud)); kvm_flush_dcache_to_poc(pud, sizeof(*pud)); } next = pud_addr_end(addr, end); ret = create_hyp_pmd_mappings(pud, addr, next, pfn, prot); if (ret) return ret; pfn += (next - addr) >> PAGE_SHIFT; } while (addr = next, addr != end); return 0; } |
6060df84c ARM: KVM: simplif... |
598 599 600 |
static int __create_hyp_mappings(pgd_t *pgdp, unsigned long start, unsigned long end, unsigned long pfn, pgprot_t prot) |
342cd0ab0 KVM: ARM: Hypervi... |
601 |
{ |
342cd0ab0 KVM: ARM: Hypervi... |
602 603 |
pgd_t *pgd; pud_t *pud; |
342cd0ab0 KVM: ARM: Hypervi... |
604 605 |
unsigned long addr, next; int err = 0; |
342cd0ab0 KVM: ARM: Hypervi... |
606 |
mutex_lock(&kvm_hyp_pgd_mutex); |
3562c76dc ARM: KVM: fix HYP... |
607 608 609 |
addr = start & PAGE_MASK; end = PAGE_ALIGN(end); do { |
6060df84c ARM: KVM: simplif... |
610 |
pgd = pgdp + pgd_index(addr); |
342cd0ab0 KVM: ARM: Hypervi... |
611 |
|
38f791a4e arm64: KVM: Imple... |
612 613 614 615 616 |
if (pgd_none(*pgd)) { pud = pud_alloc_one(NULL, addr); if (!pud) { kvm_err("Cannot allocate Hyp pud "); |
342cd0ab0 KVM: ARM: Hypervi... |
617 618 619 |
err = -ENOMEM; goto out; } |
38f791a4e arm64: KVM: Imple... |
620 621 622 |
pgd_populate(NULL, pgd, pud); get_page(virt_to_page(pgd)); kvm_flush_dcache_to_poc(pgd, sizeof(*pgd)); |
342cd0ab0 KVM: ARM: Hypervi... |
623 624 625 |
} next = pgd_addr_end(addr, end); |
38f791a4e arm64: KVM: Imple... |
626 |
err = create_hyp_pud_mappings(pgd, addr, next, pfn, prot); |
342cd0ab0 KVM: ARM: Hypervi... |
627 628 |
if (err) goto out; |
6060df84c ARM: KVM: simplif... |
629 |
pfn += (next - addr) >> PAGE_SHIFT; |
3562c76dc ARM: KVM: fix HYP... |
630 |
} while (addr = next, addr != end); |
342cd0ab0 KVM: ARM: Hypervi... |
631 632 633 634 |
out: mutex_unlock(&kvm_hyp_pgd_mutex); return err; } |
40c2729ba arm/arm64: KVM: F... |
635 636 637 638 639 640 641 642 643 644 |
static phys_addr_t kvm_kaddr_to_phys(void *kaddr) { if (!is_vmalloc_addr(kaddr)) { BUG_ON(!virt_addr_valid(kaddr)); return __pa(kaddr); } else { return page_to_phys(vmalloc_to_page(kaddr)) + offset_in_page(kaddr); } } |
342cd0ab0 KVM: ARM: Hypervi... |
645 |
/** |
06e8c3b0f ARM: KVM: allow H... |
646 |
* create_hyp_mappings - duplicate a kernel virtual address range in Hyp mode |
342cd0ab0 KVM: ARM: Hypervi... |
647 648 |
* @from: The virtual kernel start address of the range * @to: The virtual kernel end address of the range (exclusive) |
c8dddecde arm/arm64: KVM: A... |
649 |
* @prot: The protection to be applied to this range |
342cd0ab0 KVM: ARM: Hypervi... |
650 |
* |
06e8c3b0f ARM: KVM: allow H... |
651 652 653 |
* The same virtual address as the kernel virtual address is also used * in Hyp-mode mapping (modulo HYP_PAGE_OFFSET) to the same underlying * physical pages. |
342cd0ab0 KVM: ARM: Hypervi... |
654 |
*/ |
c8dddecde arm/arm64: KVM: A... |
655 |
int create_hyp_mappings(void *from, void *to, pgprot_t prot) |
342cd0ab0 KVM: ARM: Hypervi... |
656 |
{ |
40c2729ba arm/arm64: KVM: F... |
657 658 |
phys_addr_t phys_addr; unsigned long virt_addr; |
6c41a413f arm/arm64: Get ri... |
659 660 |
unsigned long start = kern_hyp_va((unsigned long)from); unsigned long end = kern_hyp_va((unsigned long)to); |
6060df84c ARM: KVM: simplif... |
661 |
|
1e947bad0 arm64: KVM: Skip ... |
662 663 |
if (is_kernel_in_hyp_mode()) return 0; |
40c2729ba arm/arm64: KVM: F... |
664 665 |
start = start & PAGE_MASK; end = PAGE_ALIGN(end); |
6060df84c ARM: KVM: simplif... |
666 |
|
40c2729ba arm/arm64: KVM: F... |
667 668 |
for (virt_addr = start; virt_addr < end; virt_addr += PAGE_SIZE) { int err; |
6060df84c ARM: KVM: simplif... |
669 |
|
40c2729ba arm/arm64: KVM: F... |
670 671 672 673 |
phys_addr = kvm_kaddr_to_phys(from + virt_addr - start); err = __create_hyp_mappings(hyp_pgd, virt_addr, virt_addr + PAGE_SIZE, __phys_to_pfn(phys_addr), |
c8dddecde arm/arm64: KVM: A... |
674 |
prot); |
40c2729ba arm/arm64: KVM: F... |
675 676 677 678 679 |
if (err) return err; } return 0; |
342cd0ab0 KVM: ARM: Hypervi... |
680 681 682 |
} /** |
06e8c3b0f ARM: KVM: allow H... |
683 684 685 |
* create_hyp_io_mappings - duplicate a kernel IO mapping into Hyp mode * @from: The kernel start VA of the range * @to: The kernel end VA of the range (exclusive) |
6060df84c ARM: KVM: simplif... |
686 |
* @phys_addr: The physical start address which gets mapped |
06e8c3b0f ARM: KVM: allow H... |
687 688 689 |
* * The resulting HYP VA is the same as the kernel VA, modulo * HYP_PAGE_OFFSET. |
342cd0ab0 KVM: ARM: Hypervi... |
690 |
*/ |
6060df84c ARM: KVM: simplif... |
691 |
int create_hyp_io_mappings(void *from, void *to, phys_addr_t phys_addr) |
342cd0ab0 KVM: ARM: Hypervi... |
692 |
{ |
6c41a413f arm/arm64: Get ri... |
693 694 |
unsigned long start = kern_hyp_va((unsigned long)from); unsigned long end = kern_hyp_va((unsigned long)to); |
6060df84c ARM: KVM: simplif... |
695 |
|
1e947bad0 arm64: KVM: Skip ... |
696 697 |
if (is_kernel_in_hyp_mode()) return 0; |
6060df84c ARM: KVM: simplif... |
698 699 700 701 702 703 |
/* Check for a valid kernel IO mapping */ if (!is_vmalloc_addr(from) || !is_vmalloc_addr(to - 1)) return -EINVAL; return __create_hyp_mappings(hyp_pgd, start, end, __phys_to_pfn(phys_addr), PAGE_HYP_DEVICE); |
342cd0ab0 KVM: ARM: Hypervi... |
704 |
} |
d5d8184d3 KVM: ARM: Memory ... |
705 706 707 708 |
/** * kvm_alloc_stage2_pgd - allocate level-1 table for stage-2 translation. * @kvm: The KVM struct pointer for the VM. * |
9d4dc6883 arm/arm64: KVM: R... |
709 710 711 |
* Allocates only the stage-2 HW PGD level table(s) (can support either full * 40-bit input addresses or limited to 32-bit input addresses). Clears the * allocated pages. |
d5d8184d3 KVM: ARM: Memory ... |
712 713 714 715 716 717 718 719 720 721 722 723 724 |
* * Note we don't need locking here as this is only called when the VM is * created, which can only be done once. */ int kvm_alloc_stage2_pgd(struct kvm *kvm) { pgd_t *pgd; if (kvm->arch.pgd != NULL) { kvm_err("kvm_arch already initialized? "); return -EINVAL; } |
9163ee23e kvm-arm: Cleanup ... |
725 726 727 |
/* Allocate the HW PGD, making sure that each page gets its own refcount */ pgd = alloc_pages_exact(S2_PGD_SIZE, GFP_KERNEL | __GFP_ZERO); if (!pgd) |
a987370f8 arm64: KVM: Fix s... |
728 |
return -ENOMEM; |
d5d8184d3 KVM: ARM: Memory ... |
729 |
kvm->arch.pgd = pgd; |
d5d8184d3 KVM: ARM: Memory ... |
730 731 |
return 0; } |
957db105c arm/arm64: KVM: I... |
732 733 734 735 736 737 738 739 740 741 742 743 744 745 746 747 748 749 750 751 752 753 754 755 756 757 758 759 760 761 762 763 764 765 766 767 768 769 770 771 772 773 774 775 776 777 778 779 780 781 782 783 784 785 786 |
static void stage2_unmap_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot) { hva_t hva = memslot->userspace_addr; phys_addr_t addr = memslot->base_gfn << PAGE_SHIFT; phys_addr_t size = PAGE_SIZE * memslot->npages; hva_t reg_end = hva + size; /* * A memory region could potentially cover multiple VMAs, and any holes * between them, so iterate over all of them to find out if we should * unmap any of them. * * +--------------------------------------------+ * +---------------+----------------+ +----------------+ * | : VMA 1 | VMA 2 | | VMA 3 : | * +---------------+----------------+ +----------------+ * | memory region | * +--------------------------------------------+ */ do { struct vm_area_struct *vma = find_vma(current->mm, hva); hva_t vm_start, vm_end; if (!vma || vma->vm_start >= reg_end) break; /* * Take the intersection of this VMA with the memory region */ vm_start = max(hva, vma->vm_start); vm_end = min(reg_end, vma->vm_end); if (!(vma->vm_flags & VM_PFNMAP)) { gpa_t gpa = addr + (vm_start - memslot->userspace_addr); unmap_stage2_range(kvm, gpa, vm_end - vm_start); } hva = vm_end; } while (hva < reg_end); } /** * stage2_unmap_vm - Unmap Stage-2 RAM mappings * @kvm: The struct kvm pointer * * Go through the memregions and unmap any reguler RAM * backing memory already mapped to the VM. */ void stage2_unmap_vm(struct kvm *kvm) { struct kvm_memslots *slots; struct kvm_memory_slot *memslot; int idx; idx = srcu_read_lock(&kvm->srcu); |
90f6e150e arm/arm64: KVM: T... |
787 |
down_read(¤t->mm->mmap_sem); |
957db105c arm/arm64: KVM: I... |
788 789 790 791 792 793 794 |
spin_lock(&kvm->mmu_lock); slots = kvm_memslots(kvm); kvm_for_each_memslot(memslot, slots) stage2_unmap_memslot(kvm, memslot); spin_unlock(&kvm->mmu_lock); |
90f6e150e arm/arm64: KVM: T... |
795 |
up_read(¤t->mm->mmap_sem); |
957db105c arm/arm64: KVM: I... |
796 797 |
srcu_read_unlock(&kvm->srcu, idx); } |
d5d8184d3 KVM: ARM: Memory ... |
798 799 800 801 802 803 804 |
/** * kvm_free_stage2_pgd - free all stage-2 tables * @kvm: The KVM struct pointer for the VM. * * Walks the level-1 page table pointed to by kvm->arch.pgd and frees all * underlying level-2 and level-3 tables before freeing the actual level-1 table * and setting the struct pointer to NULL. |
d5d8184d3 KVM: ARM: Memory ... |
805 806 807 |
*/ void kvm_free_stage2_pgd(struct kvm *kvm) { |
6c0d706b5 kvm: arm/arm64: F... |
808 |
void *pgd = NULL; |
d5d8184d3 KVM: ARM: Memory ... |
809 |
|
8b3405e34 kvm: arm/arm64: F... |
810 |
spin_lock(&kvm->mmu_lock); |
6c0d706b5 kvm: arm/arm64: F... |
811 812 |
if (kvm->arch.pgd) { unmap_stage2_range(kvm, 0, KVM_PHYS_SIZE); |
2952a6070 kvm: arm/arm64: F... |
813 |
pgd = READ_ONCE(kvm->arch.pgd); |
6c0d706b5 kvm: arm/arm64: F... |
814 815 |
kvm->arch.pgd = NULL; } |
8b3405e34 kvm: arm/arm64: F... |
816 |
spin_unlock(&kvm->mmu_lock); |
9163ee23e kvm-arm: Cleanup ... |
817 |
/* Free the HW pgd, one page at a time */ |
6c0d706b5 kvm: arm/arm64: F... |
818 819 |
if (pgd) free_pages_exact(pgd, S2_PGD_SIZE); |
d5d8184d3 KVM: ARM: Memory ... |
820 |
} |
38f791a4e arm64: KVM: Imple... |
821 |
static pud_t *stage2_get_pud(struct kvm *kvm, struct kvm_mmu_memory_cache *cache, |
ad361f093 KVM: ARM: Support... |
822 |
phys_addr_t addr) |
d5d8184d3 KVM: ARM: Memory ... |
823 824 825 |
{ pgd_t *pgd; pud_t *pud; |
d5d8184d3 KVM: ARM: Memory ... |
826 |
|
70fd19068 kvm-arm: Use expl... |
827 828 |
pgd = kvm->arch.pgd + stage2_pgd_index(addr); if (WARN_ON(stage2_pgd_none(*pgd))) { |
38f791a4e arm64: KVM: Imple... |
829 830 831 |
if (!cache) return NULL; pud = mmu_memory_cache_alloc(cache); |
70fd19068 kvm-arm: Use expl... |
832 |
stage2_pgd_populate(pgd, pud); |
38f791a4e arm64: KVM: Imple... |
833 834 |
get_page(virt_to_page(pgd)); } |
70fd19068 kvm-arm: Use expl... |
835 |
return stage2_pud_offset(pgd, addr); |
38f791a4e arm64: KVM: Imple... |
836 837 838 839 840 841 842 843 844 |
} static pmd_t *stage2_get_pmd(struct kvm *kvm, struct kvm_mmu_memory_cache *cache, phys_addr_t addr) { pud_t *pud; pmd_t *pmd; pud = stage2_get_pud(kvm, cache, addr); |
d6dbdd3c8 KVM: arm/arm64: H... |
845 846 |
if (!pud) return NULL; |
70fd19068 kvm-arm: Use expl... |
847 |
if (stage2_pud_none(*pud)) { |
d5d8184d3 KVM: ARM: Memory ... |
848 |
if (!cache) |
ad361f093 KVM: ARM: Support... |
849 |
return NULL; |
d5d8184d3 KVM: ARM: Memory ... |
850 |
pmd = mmu_memory_cache_alloc(cache); |
70fd19068 kvm-arm: Use expl... |
851 |
stage2_pud_populate(pud, pmd); |
d5d8184d3 KVM: ARM: Memory ... |
852 |
get_page(virt_to_page(pud)); |
c62ee2b22 ARM: KVM: abstrac... |
853 |
} |
70fd19068 kvm-arm: Use expl... |
854 |
return stage2_pmd_offset(pud, addr); |
ad361f093 KVM: ARM: Support... |
855 856 857 858 859 860 861 862 863 |
} static int stage2_set_pmd_huge(struct kvm *kvm, struct kvm_mmu_memory_cache *cache, phys_addr_t addr, const pmd_t *new_pmd) { pmd_t *pmd, old_pmd; pmd = stage2_get_pmd(kvm, cache, addr); VM_BUG_ON(!pmd); |
d5d8184d3 KVM: ARM: Memory ... |
864 |
|
ad361f093 KVM: ARM: Support... |
865 |
old_pmd = *pmd; |
d4b9e0790 arm/arm64: KVM: E... |
866 |
if (pmd_present(old_pmd)) { |
792a03941 KVM: arm/arm64: S... |
867 868 869 870 871 872 873 874 875 876 877 878 879 880 881 882 883 884 885 886 887 888 889 890 891 892 |
/* * Multiple vcpus faulting on the same PMD entry, can * lead to them sequentially updating the PMD with the * same value. Following the break-before-make * (pmd_clear() followed by tlb_flush()) process can * hinder forward progress due to refaults generated * on missing translations. * * Skip updating the page table if the entry is * unchanged. */ if (pmd_val(old_pmd) == pmd_val(*new_pmd)) return 0; /* * Mapping in huge pages should only happen through a * fault. If a page is merged into a transparent huge * page, the individual subpages of that huge page * should be unmapped through MMU notifiers before we * get here. * * Merging of CompoundPages is not supported; they * should become splitting first, unmapped, merged, * and mapped back in on-demand. */ VM_BUG_ON(pmd_pfn(old_pmd) != pmd_pfn(*new_pmd)); |
d4b9e0790 arm/arm64: KVM: E... |
893 |
pmd_clear(pmd); |
ad361f093 KVM: ARM: Support... |
894 |
kvm_tlb_flush_vmid_ipa(kvm, addr); |
d4b9e0790 arm/arm64: KVM: E... |
895 |
} else { |
ad361f093 KVM: ARM: Support... |
896 |
get_page(virt_to_page(pmd)); |
d4b9e0790 arm/arm64: KVM: E... |
897 898 899 |
} kvm_set_pmd(pmd, *new_pmd); |
ad361f093 KVM: ARM: Support... |
900 901 902 903 |
return 0; } static int stage2_set_pte(struct kvm *kvm, struct kvm_mmu_memory_cache *cache, |
15a49a44f KVM: arm: page lo... |
904 905 |
phys_addr_t addr, const pte_t *new_pte, unsigned long flags) |
ad361f093 KVM: ARM: Support... |
906 907 908 |
{ pmd_t *pmd; pte_t *pte, old_pte; |
15a49a44f KVM: arm: page lo... |
909 910 911 912 |
bool iomap = flags & KVM_S2PTE_FLAG_IS_IOMAP; bool logging_active = flags & KVM_S2_FLAG_LOGGING_ACTIVE; VM_BUG_ON(logging_active && !cache); |
ad361f093 KVM: ARM: Support... |
913 |
|
38f791a4e arm64: KVM: Imple... |
914 |
/* Create stage-2 page table mapping - Levels 0 and 1 */ |
ad361f093 KVM: ARM: Support... |
915 916 917 918 919 920 921 922 |
pmd = stage2_get_pmd(kvm, cache, addr); if (!pmd) { /* * Ignore calls from kvm_set_spte_hva for unallocated * address ranges. */ return 0; } |
15a49a44f KVM: arm: page lo... |
923 924 925 926 927 928 |
/* * While dirty page logging - dissolve huge PMD, then continue on to * allocate page. */ if (logging_active) stage2_dissolve_pmd(kvm, addr, pmd); |
ad361f093 KVM: ARM: Support... |
929 |
/* Create stage-2 page mappings - Level 2 */ |
d5d8184d3 KVM: ARM: Memory ... |
930 931 932 933 |
if (pmd_none(*pmd)) { if (!cache) return 0; /* ignore calls from kvm_set_spte_hva */ pte = mmu_memory_cache_alloc(cache); |
d5d8184d3 KVM: ARM: Memory ... |
934 |
pmd_populate_kernel(NULL, pmd, pte); |
d5d8184d3 KVM: ARM: Memory ... |
935 |
get_page(virt_to_page(pmd)); |
c62ee2b22 ARM: KVM: abstrac... |
936 937 938 |
} pte = pte_offset_kernel(pmd, addr); |
d5d8184d3 KVM: ARM: Memory ... |
939 940 941 942 943 944 |
if (iomap && pte_present(*pte)) return -EFAULT; /* Create 2nd stage page table mapping - Level 3 */ old_pte = *pte; |
d4b9e0790 arm/arm64: KVM: E... |
945 |
if (pte_present(old_pte)) { |
4a06fdf2c KVM: arm/arm64: S... |
946 947 948 |
/* Skip page table update if there is no change */ if (pte_val(old_pte) == pte_val(*new_pte)) return 0; |
d4b9e0790 arm/arm64: KVM: E... |
949 |
kvm_set_pte(pte, __pte(0)); |
48762767e ARM: KVM: change ... |
950 |
kvm_tlb_flush_vmid_ipa(kvm, addr); |
d4b9e0790 arm/arm64: KVM: E... |
951 |
} else { |
d5d8184d3 KVM: ARM: Memory ... |
952 |
get_page(virt_to_page(pte)); |
d4b9e0790 arm/arm64: KVM: E... |
953 |
} |
d5d8184d3 KVM: ARM: Memory ... |
954 |
|
d4b9e0790 arm/arm64: KVM: E... |
955 |
kvm_set_pte(pte, *new_pte); |
d5d8184d3 KVM: ARM: Memory ... |
956 957 |
return 0; } |
d5d8184d3 KVM: ARM: Memory ... |
958 |
|
064850532 kvm: arm64: Enabl... |
959 960 961 962 963 964 965 |
#ifndef __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG static int stage2_ptep_test_and_clear_young(pte_t *pte) { if (pte_young(*pte)) { *pte = pte_mkold(*pte); return 1; } |
d5d8184d3 KVM: ARM: Memory ... |
966 967 |
return 0; } |
064850532 kvm: arm64: Enabl... |
968 969 970 971 972 973 974 975 976 977 978 |
#else static int stage2_ptep_test_and_clear_young(pte_t *pte) { return __ptep_test_and_clear_young(pte); } #endif static int stage2_pmdp_test_and_clear_young(pmd_t *pmd) { return stage2_ptep_test_and_clear_young((pte_t *)pmd); } |
d5d8184d3 KVM: ARM: Memory ... |
979 980 981 982 983 984 985 986 987 988 |
/** * kvm_phys_addr_ioremap - map a device range to guest IPA * * @kvm: The KVM pointer * @guest_ipa: The IPA at which to insert the mapping * @pa: The physical address of the device * @size: The size of the mapping */ int kvm_phys_addr_ioremap(struct kvm *kvm, phys_addr_t guest_ipa, |
c40f2f8ff arm/arm64: KVM: a... |
989 |
phys_addr_t pa, unsigned long size, bool writable) |
d5d8184d3 KVM: ARM: Memory ... |
990 991 992 993 994 995 996 997 998 999 |
{ phys_addr_t addr, end; int ret = 0; unsigned long pfn; struct kvm_mmu_memory_cache cache = { 0, }; end = (guest_ipa + size + PAGE_SIZE - 1) & PAGE_MASK; pfn = __phys_to_pfn(pa); for (addr = guest_ipa; addr < end; addr += PAGE_SIZE) { |
c62ee2b22 ARM: KVM: abstrac... |
1000 |
pte_t pte = pfn_pte(pfn, PAGE_S2_DEVICE); |
d5d8184d3 KVM: ARM: Memory ... |
1001 |
|
c40f2f8ff arm/arm64: KVM: a... |
1002 |
if (writable) |
064850532 kvm: arm64: Enabl... |
1003 |
pte = kvm_s2pte_mkwrite(pte); |
c40f2f8ff arm/arm64: KVM: a... |
1004 |
|
38f791a4e arm64: KVM: Imple... |
1005 1006 |
ret = mmu_topup_memory_cache(&cache, KVM_MMU_CACHE_MIN_PAGES, KVM_NR_MEM_OBJS); |
d5d8184d3 KVM: ARM: Memory ... |
1007 1008 1009 |
if (ret) goto out; spin_lock(&kvm->mmu_lock); |
15a49a44f KVM: arm: page lo... |
1010 1011 |
ret = stage2_set_pte(kvm, &cache, addr, &pte, KVM_S2PTE_FLAG_IS_IOMAP); |
d5d8184d3 KVM: ARM: Memory ... |
1012 1013 1014 1015 1016 1017 1018 1019 1020 1021 1022 |
spin_unlock(&kvm->mmu_lock); if (ret) goto out; pfn++; } out: mmu_free_memory_cache(&cache); return ret; } |
ba049e93a kvm: rename pfn_t... |
1023 |
static bool transparent_hugepage_adjust(kvm_pfn_t *pfnp, phys_addr_t *ipap) |
9b5fdb978 KVM: ARM: Transpa... |
1024 |
{ |
ba049e93a kvm: rename pfn_t... |
1025 |
kvm_pfn_t pfn = *pfnp; |
9b5fdb978 KVM: ARM: Transpa... |
1026 |
gfn_t gfn = *ipap >> PAGE_SHIFT; |
127393fbe mm: thp: kvm: fix... |
1027 |
if (PageTransCompoundMap(pfn_to_page(pfn))) { |
9b5fdb978 KVM: ARM: Transpa... |
1028 1029 1030 1031 1032 1033 1034 1035 1036 1037 1038 1039 1040 1041 1042 1043 1044 1045 1046 1047 1048 1049 1050 1051 1052 1053 1054 1055 1056 1057 1058 1059 1060 1061 |
unsigned long mask; /* * The address we faulted on is backed by a transparent huge * page. However, because we map the compound huge page and * not the individual tail page, we need to transfer the * refcount to the head page. We have to be careful that the * THP doesn't start to split while we are adjusting the * refcounts. * * We are sure this doesn't happen, because mmu_notifier_retry * was successful and we are holding the mmu_lock, so if this * THP is trying to split, it will be blocked in the mmu * notifier before touching any of the pages, specifically * before being able to call __split_huge_page_refcount(). * * We can therefore safely transfer the refcount from PG_tail * to PG_head and switch the pfn from a tail page to the head * page accordingly. */ mask = PTRS_PER_PMD - 1; VM_BUG_ON((gfn & mask) != (pfn & mask)); if (pfn & mask) { *ipap &= PMD_MASK; kvm_release_pfn_clean(pfn); pfn &= ~mask; kvm_get_pfn(pfn); *pfnp = pfn; } return true; } return false; } |
a7d079cea ARM/arm64: KVM: f... |
1062 1063 1064 1065 1066 1067 1068 |
static bool kvm_is_write_fault(struct kvm_vcpu *vcpu) { if (kvm_vcpu_trap_is_iabt(vcpu)) return false; return kvm_vcpu_dabt_iswrite(vcpu); } |
c64735554 KVM: arm: Add ini... |
1069 1070 1071 1072 1073 1074 1075 1076 1077 1078 1079 1080 1081 1082 1083 1084 1085 1086 1087 1088 1089 1090 1091 1092 1093 1094 1095 1096 1097 |
/** * stage2_wp_ptes - write protect PMD range * @pmd: pointer to pmd entry * @addr: range start address * @end: range end address */ static void stage2_wp_ptes(pmd_t *pmd, phys_addr_t addr, phys_addr_t end) { pte_t *pte; pte = pte_offset_kernel(pmd, addr); do { if (!pte_none(*pte)) { if (!kvm_s2pte_readonly(pte)) kvm_set_s2pte_readonly(pte); } } while (pte++, addr += PAGE_SIZE, addr != end); } /** * stage2_wp_pmds - write protect PUD range * @pud: pointer to pud entry * @addr: range start address * @end: range end address */ static void stage2_wp_pmds(pud_t *pud, phys_addr_t addr, phys_addr_t end) { pmd_t *pmd; phys_addr_t next; |
70fd19068 kvm-arm: Use expl... |
1098 |
pmd = stage2_pmd_offset(pud, addr); |
c64735554 KVM: arm: Add ini... |
1099 1100 |
do { |
70fd19068 kvm-arm: Use expl... |
1101 |
next = stage2_pmd_addr_end(addr, end); |
c64735554 KVM: arm: Add ini... |
1102 |
if (!pmd_none(*pmd)) { |
bbb3b6b35 kvm-arm: Replace ... |
1103 |
if (pmd_thp_or_huge(*pmd)) { |
c64735554 KVM: arm: Add ini... |
1104 1105 1106 1107 1108 1109 1110 1111 1112 1113 1114 1115 1116 1117 1118 1119 1120 1121 1122 1123 1124 |
if (!kvm_s2pmd_readonly(pmd)) kvm_set_s2pmd_readonly(pmd); } else { stage2_wp_ptes(pmd, addr, next); } } } while (pmd++, addr = next, addr != end); } /** * stage2_wp_puds - write protect PGD range * @pgd: pointer to pgd entry * @addr: range start address * @end: range end address * * Process PUD entries, for a huge PUD we cause a panic. */ static void stage2_wp_puds(pgd_t *pgd, phys_addr_t addr, phys_addr_t end) { pud_t *pud; phys_addr_t next; |
70fd19068 kvm-arm: Use expl... |
1125 |
pud = stage2_pud_offset(pgd, addr); |
c64735554 KVM: arm: Add ini... |
1126 |
do { |
70fd19068 kvm-arm: Use expl... |
1127 1128 |
next = stage2_pud_addr_end(addr, end); if (!stage2_pud_none(*pud)) { |
c64735554 KVM: arm: Add ini... |
1129 |
/* TODO:PUD not supported, revisit later if supported */ |
70fd19068 kvm-arm: Use expl... |
1130 |
BUG_ON(stage2_pud_huge(*pud)); |
c64735554 KVM: arm: Add ini... |
1131 1132 1133 1134 1135 1136 1137 1138 1139 1140 1141 1142 1143 1144 1145 |
stage2_wp_pmds(pud, addr, next); } } while (pud++, addr = next, addr != end); } /** * stage2_wp_range() - write protect stage2 memory region range * @kvm: The KVM pointer * @addr: Start address of range * @end: End address of range */ static void stage2_wp_range(struct kvm *kvm, phys_addr_t addr, phys_addr_t end) { pgd_t *pgd; phys_addr_t next; |
70fd19068 kvm-arm: Use expl... |
1146 |
pgd = kvm->arch.pgd + stage2_pgd_index(addr); |
c64735554 KVM: arm: Add ini... |
1147 1148 1149 1150 |
do { /* * Release kvm_mmu_lock periodically if the memory region is * large. Otherwise, we may see kernel panics with |
227ea818f arm/arm64: KVM: F... |
1151 1152 |
* CONFIG_DETECT_HUNG_TASK, CONFIG_LOCKUP_DETECTOR, * CONFIG_LOCKDEP. Additionally, holding the lock too long |
0c428a6a9 kvm: arm/arm64: F... |
1153 1154 1155 |
* will also starve other vCPUs. We have to also make sure * that the page tables are not freed while we released * the lock. |
c64735554 KVM: arm: Add ini... |
1156 |
*/ |
0c428a6a9 kvm: arm/arm64: F... |
1157 1158 1159 |
cond_resched_lock(&kvm->mmu_lock); if (!READ_ONCE(kvm->arch.pgd)) break; |
70fd19068 kvm-arm: Use expl... |
1160 1161 |
next = stage2_pgd_addr_end(addr, end); if (stage2_pgd_present(*pgd)) |
c64735554 KVM: arm: Add ini... |
1162 1163 1164 1165 1166 1167 1168 1169 1170 1171 1172 1173 1174 1175 1176 1177 1178 1179 1180 |
stage2_wp_puds(pgd, addr, next); } while (pgd++, addr = next, addr != end); } /** * kvm_mmu_wp_memory_region() - write protect stage 2 entries for memory slot * @kvm: The KVM pointer * @slot: The memory slot to write protect * * Called to start logging dirty pages after memory region * KVM_MEM_LOG_DIRTY_PAGES operation is called. After this function returns * all present PMD and PTEs are write protected in the memory region. * Afterwards read of dirty page log can be called. * * Acquires kvm_mmu_lock. Called with kvm->slots_lock mutex acquired, * serializing operations for VM memory regions. */ void kvm_mmu_wp_memory_region(struct kvm *kvm, int slot) { |
9f6b80297 KVM: use kvm_mems... |
1181 1182 |
struct kvm_memslots *slots = kvm_memslots(kvm); struct kvm_memory_slot *memslot = id_to_memslot(slots, slot); |
c64735554 KVM: arm: Add ini... |
1183 1184 1185 1186 1187 1188 1189 1190 |
phys_addr_t start = memslot->base_gfn << PAGE_SHIFT; phys_addr_t end = (memslot->base_gfn + memslot->npages) << PAGE_SHIFT; spin_lock(&kvm->mmu_lock); stage2_wp_range(kvm, start, end); spin_unlock(&kvm->mmu_lock); kvm_flush_remote_tlbs(kvm); } |
53c810c36 KVM: arm: dirty l... |
1191 1192 |
/** |
3b0f1d01e KVM: Rename kvm_a... |
1193 |
* kvm_mmu_write_protect_pt_masked() - write protect dirty pages |
53c810c36 KVM: arm: dirty l... |
1194 1195 1196 1197 1198 1199 1200 1201 1202 |
* @kvm: The KVM pointer * @slot: The memory slot associated with mask * @gfn_offset: The gfn offset in memory slot * @mask: The mask of dirty pages at offset 'gfn_offset' in this memory * slot to be write protected * * Walks bits set in mask write protects the associated pte's. Caller must * acquire kvm_mmu_lock. */ |
3b0f1d01e KVM: Rename kvm_a... |
1203 |
static void kvm_mmu_write_protect_pt_masked(struct kvm *kvm, |
53c810c36 KVM: arm: dirty l... |
1204 1205 1206 1207 1208 1209 1210 1211 1212 |
struct kvm_memory_slot *slot, gfn_t gfn_offset, unsigned long mask) { phys_addr_t base_gfn = slot->base_gfn + gfn_offset; phys_addr_t start = (base_gfn + __ffs(mask)) << PAGE_SHIFT; phys_addr_t end = (base_gfn + __fls(mask) + 1) << PAGE_SHIFT; stage2_wp_range(kvm, start, end); } |
c64735554 KVM: arm: Add ini... |
1213 |
|
3b0f1d01e KVM: Rename kvm_a... |
1214 1215 1216 1217 1218 1219 1220 1221 1222 1223 1224 1225 1226 |
/* * kvm_arch_mmu_enable_log_dirty_pt_masked - enable dirty logging for selected * dirty pages. * * It calls kvm_mmu_write_protect_pt_masked to write protect selected pages to * enable dirty logging for them. */ void kvm_arch_mmu_enable_log_dirty_pt_masked(struct kvm *kvm, struct kvm_memory_slot *slot, gfn_t gfn_offset, unsigned long mask) { kvm_mmu_write_protect_pt_masked(kvm, slot, gfn_offset, mask); } |
ba049e93a kvm: rename pfn_t... |
1227 |
static void coherent_cache_guest_page(struct kvm_vcpu *vcpu, kvm_pfn_t pfn, |
13b7756ce arm/arm64: KVM: S... |
1228 |
unsigned long size) |
0d3e4d4fa arm/arm64: KVM: U... |
1229 |
{ |
13b7756ce arm/arm64: KVM: S... |
1230 |
__coherent_cache_guest_page(vcpu, pfn, size); |
0d3e4d4fa arm/arm64: KVM: U... |
1231 |
} |
196f878a7 KVM: arm/arm64: S... |
1232 1233 1234 1235 1236 1237 1238 1239 1240 1241 1242 1243 1244 1245 1246 1247 1248 |
static void kvm_send_hwpoison_signal(unsigned long address, struct vm_area_struct *vma) { siginfo_t info; info.si_signo = SIGBUS; info.si_errno = 0; info.si_code = BUS_MCEERR_AR; info.si_addr = (void __user *)address; if (is_vm_hugetlb_page(vma)) info.si_addr_lsb = huge_page_shift(hstate_vma(vma)); else info.si_addr_lsb = PAGE_SHIFT; send_sig_info(SIGBUS, &info, current); } |
94f8e6418 KVM: ARM: Handle ... |
1249 |
static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa, |
98047888b arm/arm64: KVM: S... |
1250 |
struct kvm_memory_slot *memslot, unsigned long hva, |
94f8e6418 KVM: ARM: Handle ... |
1251 1252 |
unsigned long fault_status) { |
94f8e6418 KVM: ARM: Handle ... |
1253 |
int ret; |
9b5fdb978 KVM: ARM: Transpa... |
1254 |
bool write_fault, writable, hugetlb = false, force_pte = false; |
94f8e6418 KVM: ARM: Handle ... |
1255 |
unsigned long mmu_seq; |
ad361f093 KVM: ARM: Support... |
1256 |
gfn_t gfn = fault_ipa >> PAGE_SHIFT; |
ad361f093 KVM: ARM: Support... |
1257 |
struct kvm *kvm = vcpu->kvm; |
94f8e6418 KVM: ARM: Handle ... |
1258 |
struct kvm_mmu_memory_cache *memcache = &vcpu->arch.mmu_page_cache; |
ad361f093 KVM: ARM: Support... |
1259 |
struct vm_area_struct *vma; |
ba049e93a kvm: rename pfn_t... |
1260 |
kvm_pfn_t pfn; |
b88657674 ARM: KVM: user_me... |
1261 |
pgprot_t mem_type = PAGE_S2; |
15a49a44f KVM: arm: page lo... |
1262 1263 |
bool logging_active = memslot_is_logging(memslot); unsigned long flags = 0; |
94f8e6418 KVM: ARM: Handle ... |
1264 |
|
a7d079cea ARM/arm64: KVM: f... |
1265 |
write_fault = kvm_is_write_fault(vcpu); |
94f8e6418 KVM: ARM: Handle ... |
1266 1267 1268 1269 1270 |
if (fault_status == FSC_PERM && !write_fault) { kvm_err("Unexpected L2 read permission error "); return -EFAULT; } |
ad361f093 KVM: ARM: Support... |
1271 1272 1273 |
/* Let's check if we will get back a huge page backed by hugetlbfs */ down_read(¤t->mm->mmap_sem); vma = find_vma_intersection(current->mm, hva, hva + 1); |
37b544087 arm/arm64: KVM: f... |
1274 1275 1276 1277 1278 1279 |
if (unlikely(!vma)) { kvm_err("Failed to find VMA for hva 0x%lx ", hva); up_read(¤t->mm->mmap_sem); return -EFAULT; } |
d64105389 KVM: arm/arm64: C... |
1280 |
if (vma_kernel_pagesize(vma) == PMD_SIZE && !logging_active) { |
ad361f093 KVM: ARM: Support... |
1281 1282 |
hugetlb = true; gfn = (fault_ipa & PMD_MASK) >> PAGE_SHIFT; |
9b5fdb978 KVM: ARM: Transpa... |
1283 1284 |
} else { /* |
136d737fd arm/arm64: KVM: r... |
1285 1286 1287 1288 1289 1290 1291 |
* Pages belonging to memslots that don't have the same * alignment for userspace and IPA cannot be mapped using * block descriptors even if the pages belong to a THP for * the process, because the stage-2 block descriptor will * cover more than a single THP and we loose atomicity for * unmapping, updates, and splits of the THP or other pages * in the stage-2 block range. |
9b5fdb978 KVM: ARM: Transpa... |
1292 |
*/ |
136d737fd arm/arm64: KVM: r... |
1293 1294 |
if ((memslot->userspace_addr & ~PMD_MASK) != ((memslot->base_gfn << PAGE_SHIFT) & ~PMD_MASK)) |
9b5fdb978 KVM: ARM: Transpa... |
1295 |
force_pte = true; |
ad361f093 KVM: ARM: Support... |
1296 1297 |
} up_read(¤t->mm->mmap_sem); |
94f8e6418 KVM: ARM: Handle ... |
1298 |
/* We need minimum second+third level pages */ |
38f791a4e arm64: KVM: Imple... |
1299 1300 |
ret = mmu_topup_memory_cache(memcache, KVM_MMU_CACHE_MIN_PAGES, KVM_NR_MEM_OBJS); |
94f8e6418 KVM: ARM: Handle ... |
1301 1302 1303 1304 1305 1306 1307 1308 1309 1310 1311 1312 1313 1314 |
if (ret) return ret; mmu_seq = vcpu->kvm->mmu_notifier_seq; /* * Ensure the read of mmu_notifier_seq happens before we call * gfn_to_pfn_prot (which calls get_user_pages), so that we don't risk * the page we just got a reference to gets unmapped before we have a * chance to grab the mmu_lock, which ensure that if the page gets * unmapped afterwards, the call to kvm_unmap_hva will take it away * from us again properly. This smp_rmb() interacts with the smp_wmb() * in kvm_mmu_notifier_invalidate_<page|range_end>. */ smp_rmb(); |
ad361f093 KVM: ARM: Support... |
1315 |
pfn = gfn_to_pfn_prot(kvm, gfn, write_fault, &writable); |
196f878a7 KVM: arm/arm64: S... |
1316 1317 1318 1319 |
if (pfn == KVM_PFN_ERR_HWPOISON) { kvm_send_hwpoison_signal(hva, vma); return 0; } |
9ac715954 KVM: arm/arm64: C... |
1320 |
if (is_error_noslot_pfn(pfn)) |
94f8e6418 KVM: ARM: Handle ... |
1321 |
return -EFAULT; |
15a49a44f KVM: arm: page lo... |
1322 |
if (kvm_is_device_pfn(pfn)) { |
b88657674 ARM: KVM: user_me... |
1323 |
mem_type = PAGE_S2_DEVICE; |
15a49a44f KVM: arm: page lo... |
1324 1325 1326 1327 1328 1329 1330 1331 1332 1333 1334 1335 1336 1337 1338 1339 1340 |
flags |= KVM_S2PTE_FLAG_IS_IOMAP; } else if (logging_active) { /* * Faults on pages in a memslot with logging enabled * should not be mapped with huge pages (it introduces churn * and performance degradation), so force a pte mapping. */ force_pte = true; flags |= KVM_S2_FLAG_LOGGING_ACTIVE; /* * Only actually map the page as writable if this was a write * fault. */ if (!write_fault) writable = false; } |
b88657674 ARM: KVM: user_me... |
1341 |
|
ad361f093 KVM: ARM: Support... |
1342 1343 |
spin_lock(&kvm->mmu_lock); if (mmu_notifier_retry(kvm, mmu_seq)) |
94f8e6418 KVM: ARM: Handle ... |
1344 |
goto out_unlock; |
15a49a44f KVM: arm: page lo... |
1345 |
|
9b5fdb978 KVM: ARM: Transpa... |
1346 1347 |
if (!hugetlb && !force_pte) hugetlb = transparent_hugepage_adjust(&pfn, &fault_ipa); |
ad361f093 KVM: ARM: Support... |
1348 1349 |
if (hugetlb) { |
b88657674 ARM: KVM: user_me... |
1350 |
pmd_t new_pmd = pfn_pmd(pfn, mem_type); |
ad361f093 KVM: ARM: Support... |
1351 1352 |
new_pmd = pmd_mkhuge(new_pmd); if (writable) { |
064850532 kvm: arm64: Enabl... |
1353 |
new_pmd = kvm_s2pmd_mkwrite(new_pmd); |
ad361f093 KVM: ARM: Support... |
1354 1355 |
kvm_set_pfn_dirty(pfn); } |
13b7756ce arm/arm64: KVM: S... |
1356 |
coherent_cache_guest_page(vcpu, pfn, PMD_SIZE); |
ad361f093 KVM: ARM: Support... |
1357 1358 |
ret = stage2_set_pmd_huge(kvm, memcache, fault_ipa, &new_pmd); } else { |
b88657674 ARM: KVM: user_me... |
1359 |
pte_t new_pte = pfn_pte(pfn, mem_type); |
15a49a44f KVM: arm: page lo... |
1360 |
|
ad361f093 KVM: ARM: Support... |
1361 |
if (writable) { |
064850532 kvm: arm64: Enabl... |
1362 |
new_pte = kvm_s2pte_mkwrite(new_pte); |
ad361f093 KVM: ARM: Support... |
1363 |
kvm_set_pfn_dirty(pfn); |
15a49a44f KVM: arm: page lo... |
1364 |
mark_page_dirty(kvm, gfn); |
ad361f093 KVM: ARM: Support... |
1365 |
} |
13b7756ce arm/arm64: KVM: S... |
1366 |
coherent_cache_guest_page(vcpu, pfn, PAGE_SIZE); |
15a49a44f KVM: arm: page lo... |
1367 |
ret = stage2_set_pte(kvm, memcache, fault_ipa, &new_pte, flags); |
94f8e6418 KVM: ARM: Handle ... |
1368 |
} |
ad361f093 KVM: ARM: Support... |
1369 |
|
94f8e6418 KVM: ARM: Handle ... |
1370 |
out_unlock: |
ad361f093 KVM: ARM: Support... |
1371 |
spin_unlock(&kvm->mmu_lock); |
35307b9a5 arm/arm64: KVM: I... |
1372 |
kvm_set_pfn_accessed(pfn); |
94f8e6418 KVM: ARM: Handle ... |
1373 |
kvm_release_pfn_clean(pfn); |
ad361f093 KVM: ARM: Support... |
1374 |
return ret; |
94f8e6418 KVM: ARM: Handle ... |
1375 |
} |
aeda9130c arm/arm64: KVM: O... |
1376 1377 1378 1379 |
/* * Resolve the access fault by making the page young again. * Note that because the faulting entry is guaranteed not to be * cached in the TLB, we don't need to invalidate anything. |
064850532 kvm: arm64: Enabl... |
1380 1381 |
* Only the HW Access Flag updates are supported for Stage 2 (no DBM), * so there is no need for atomic (pte|pmd)_mkyoung operations. |
aeda9130c arm/arm64: KVM: O... |
1382 1383 1384 1385 1386 |
*/ static void handle_access_fault(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa) { pmd_t *pmd; pte_t *pte; |
ba049e93a kvm: rename pfn_t... |
1387 |
kvm_pfn_t pfn; |
aeda9130c arm/arm64: KVM: O... |
1388 1389 1390 1391 1392 1393 1394 1395 1396 |
bool pfn_valid = false; trace_kvm_access_fault(fault_ipa); spin_lock(&vcpu->kvm->mmu_lock); pmd = stage2_get_pmd(vcpu->kvm, NULL, fault_ipa); if (!pmd || pmd_none(*pmd)) /* Nothing there */ goto out; |
bbb3b6b35 kvm-arm: Replace ... |
1397 |
if (pmd_thp_or_huge(*pmd)) { /* THP, HugeTLB */ |
aeda9130c arm/arm64: KVM: O... |
1398 1399 1400 1401 1402 1403 1404 1405 1406 1407 1408 1409 1410 1411 1412 1413 1414 1415 |
*pmd = pmd_mkyoung(*pmd); pfn = pmd_pfn(*pmd); pfn_valid = true; goto out; } pte = pte_offset_kernel(pmd, fault_ipa); if (pte_none(*pte)) /* Nothing there either */ goto out; *pte = pte_mkyoung(*pte); /* Just a page... */ pfn = pte_pfn(*pte); pfn_valid = true; out: spin_unlock(&vcpu->kvm->mmu_lock); if (pfn_valid) kvm_set_pfn_accessed(pfn); } |
94f8e6418 KVM: ARM: Handle ... |
1416 1417 1418 1419 1420 1421 1422 1423 1424 1425 1426 1427 |
/** * kvm_handle_guest_abort - handles all 2nd stage aborts * @vcpu: the VCPU pointer * @run: the kvm_run structure * * Any abort that gets to the host is almost guaranteed to be caused by a * missing second stage translation table entry, which can mean that either the * guest simply needs more memory and we must allocate an appropriate page or it * can mean that the guest tried to access I/O memory, which is emulated by user * space. The distinction is based on the IPA causing the fault and whether this * memory region has been registered as standard RAM by user space. */ |
342cd0ab0 KVM: ARM: Hypervi... |
1428 1429 |
int kvm_handle_guest_abort(struct kvm_vcpu *vcpu, struct kvm_run *run) { |
94f8e6418 KVM: ARM: Handle ... |
1430 1431 1432 |
unsigned long fault_status; phys_addr_t fault_ipa; struct kvm_memory_slot *memslot; |
98047888b arm/arm64: KVM: S... |
1433 1434 |
unsigned long hva; bool is_iabt, write_fault, writable; |
94f8e6418 KVM: ARM: Handle ... |
1435 1436 |
gfn_t gfn; int ret, idx; |
621f48e40 arm/arm64: KVM: a... |
1437 1438 1439 |
fault_status = kvm_vcpu_trap_get_fault_type(vcpu); fault_ipa = kvm_vcpu_get_fault_ipa(vcpu); |
bb428921b KVM: arm/arm64: F... |
1440 |
is_iabt = kvm_vcpu_trap_is_iabt(vcpu); |
621f48e40 arm/arm64: KVM: a... |
1441 |
|
bb428921b KVM: arm/arm64: F... |
1442 1443 1444 1445 1446 1447 |
/* Synchronous External Abort? */ if (kvm_vcpu_dabt_isextabt(vcpu)) { /* * For RAS the host kernel may handle this abort. * There is no need to pass the error into the guest. */ |
621f48e40 arm/arm64: KVM: a... |
1448 1449 |
if (!handle_guest_sea(fault_ipa, kvm_vcpu_get_hsr(vcpu))) return 1; |
621f48e40 arm/arm64: KVM: a... |
1450 |
|
bb428921b KVM: arm/arm64: F... |
1451 1452 1453 1454 |
if (unlikely(!is_iabt)) { kvm_inject_vabt(vcpu); return 1; } |
4055710ba arm/arm64: KVM: I... |
1455 |
} |
7393b5991 ARM: KVM: abstrac... |
1456 1457 |
trace_kvm_guest_fault(*vcpu_pc(vcpu), kvm_vcpu_get_hsr(vcpu), kvm_vcpu_get_hfar(vcpu), fault_ipa); |
94f8e6418 KVM: ARM: Handle ... |
1458 1459 |
/* Check the stage-2 fault is trans. fault or write fault */ |
35307b9a5 arm/arm64: KVM: I... |
1460 1461 |
if (fault_status != FSC_FAULT && fault_status != FSC_PERM && fault_status != FSC_ACCESS) { |
0496daa5c arm/arm64: KVM: R... |
1462 1463 1464 1465 1466 |
kvm_err("Unsupported FSC: EC=%#x xFSC=%#lx ESR_EL2=%#lx ", kvm_vcpu_trap_get_class(vcpu), (unsigned long)kvm_vcpu_trap_get_fault(vcpu), (unsigned long)kvm_vcpu_get_hsr(vcpu)); |
94f8e6418 KVM: ARM: Handle ... |
1467 1468 1469 1470 1471 1472 |
return -EFAULT; } idx = srcu_read_lock(&vcpu->kvm->srcu); gfn = fault_ipa >> PAGE_SHIFT; |
98047888b arm/arm64: KVM: S... |
1473 1474 |
memslot = gfn_to_memslot(vcpu->kvm, gfn); hva = gfn_to_hva_memslot_prot(memslot, gfn, &writable); |
a7d079cea ARM/arm64: KVM: f... |
1475 |
write_fault = kvm_is_write_fault(vcpu); |
98047888b arm/arm64: KVM: S... |
1476 |
if (kvm_is_error_hva(hva) || (write_fault && !writable)) { |
94f8e6418 KVM: ARM: Handle ... |
1477 1478 |
if (is_iabt) { /* Prefetch Abort on I/O address */ |
7393b5991 ARM: KVM: abstrac... |
1479 |
kvm_inject_pabt(vcpu, kvm_vcpu_get_hfar(vcpu)); |
94f8e6418 KVM: ARM: Handle ... |
1480 1481 1482 |
ret = 1; goto out_unlock; } |
cfe3950c2 ARM: KVM: fix fau... |
1483 |
/* |
57c841f13 arm/arm64: KVM: H... |
1484 1485 1486 1487 1488 1489 1490 1491 1492 1493 1494 1495 1496 1497 1498 1499 |
* Check for a cache maintenance operation. Since we * ended-up here, we know it is outside of any memory * slot. But we can't find out if that is for a device, * or if the guest is just being stupid. The only thing * we know for sure is that this range cannot be cached. * * So let's assume that the guest is just being * cautious, and skip the instruction. */ if (kvm_vcpu_dabt_is_cm(vcpu)) { kvm_skip_instr(vcpu, kvm_vcpu_trap_il_is32bit(vcpu)); ret = 1; goto out_unlock; } /* |
cfe3950c2 ARM: KVM: fix fau... |
1500 1501 1502 1503 1504 1505 |
* The IPA is reported as [MAX:12], so we need to * complement it with the bottom 12 bits from the * faulting VA. This is always 12 bits, irrespective * of the page size. */ fault_ipa |= kvm_vcpu_get_hfar(vcpu) & ((1 << 12) - 1); |
45e96ea6b KVM: ARM: Handle ... |
1506 |
ret = io_mem_abort(vcpu, run, fault_ipa); |
94f8e6418 KVM: ARM: Handle ... |
1507 1508 |
goto out_unlock; } |
c3058d5da arm/arm64: KVM: E... |
1509 1510 |
/* Userspace should not be able to register out-of-bounds IPAs */ VM_BUG_ON(fault_ipa >= KVM_PHYS_SIZE); |
aeda9130c arm/arm64: KVM: O... |
1511 1512 1513 1514 1515 |
if (fault_status == FSC_ACCESS) { handle_access_fault(vcpu, fault_ipa); ret = 1; goto out_unlock; } |
98047888b arm/arm64: KVM: S... |
1516 |
ret = user_mem_abort(vcpu, fault_ipa, memslot, hva, fault_status); |
94f8e6418 KVM: ARM: Handle ... |
1517 1518 1519 1520 1521 |
if (ret == 0) ret = 1; out_unlock: srcu_read_unlock(&vcpu->kvm->srcu, idx); return ret; |
342cd0ab0 KVM: ARM: Hypervi... |
1522 |
} |
1d2ebaccc arm/arm64: KVM: A... |
1523 1524 1525 1526 |
static int handle_hva_to_gpa(struct kvm *kvm, unsigned long start, unsigned long end, int (*handler)(struct kvm *kvm, |
056aad67f kvm: arm/arm64: R... |
1527 1528 |
gpa_t gpa, u64 size, void *data), |
1d2ebaccc arm/arm64: KVM: A... |
1529 |
void *data) |
d5d8184d3 KVM: ARM: Memory ... |
1530 1531 1532 |
{ struct kvm_memslots *slots; struct kvm_memory_slot *memslot; |
1d2ebaccc arm/arm64: KVM: A... |
1533 |
int ret = 0; |
d5d8184d3 KVM: ARM: Memory ... |
1534 1535 1536 1537 1538 1539 |
slots = kvm_memslots(kvm); /* we only care about the pages that the guest sees */ kvm_for_each_memslot(memslot, slots) { unsigned long hva_start, hva_end; |
056aad67f kvm: arm/arm64: R... |
1540 |
gfn_t gpa; |
d5d8184d3 KVM: ARM: Memory ... |
1541 1542 1543 1544 1545 1546 |
hva_start = max(start, memslot->userspace_addr); hva_end = min(end, memslot->userspace_addr + (memslot->npages << PAGE_SHIFT)); if (hva_start >= hva_end) continue; |
056aad67f kvm: arm/arm64: R... |
1547 1548 |
gpa = hva_to_gfn_memslot(hva_start, memslot) << PAGE_SHIFT; ret |= handler(kvm, gpa, (u64)(hva_end - hva_start), data); |
d5d8184d3 KVM: ARM: Memory ... |
1549 |
} |
1d2ebaccc arm/arm64: KVM: A... |
1550 1551 |
return ret; |
d5d8184d3 KVM: ARM: Memory ... |
1552 |
} |
056aad67f kvm: arm/arm64: R... |
1553 |
static int kvm_unmap_hva_handler(struct kvm *kvm, gpa_t gpa, u64 size, void *data) |
d5d8184d3 KVM: ARM: Memory ... |
1554 |
{ |
056aad67f kvm: arm/arm64: R... |
1555 |
unmap_stage2_range(kvm, gpa, size); |
1d2ebaccc arm/arm64: KVM: A... |
1556 |
return 0; |
d5d8184d3 KVM: ARM: Memory ... |
1557 1558 1559 1560 1561 1562 1563 1564 1565 1566 1567 1568 1569 1570 1571 1572 1573 1574 1575 1576 1577 1578 1579 1580 |
} int kvm_unmap_hva(struct kvm *kvm, unsigned long hva) { unsigned long end = hva + PAGE_SIZE; if (!kvm->arch.pgd) return 0; trace_kvm_unmap_hva(hva); handle_hva_to_gpa(kvm, hva, end, &kvm_unmap_hva_handler, NULL); return 0; } int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end) { if (!kvm->arch.pgd) return 0; trace_kvm_unmap_hva_range(start, end); handle_hva_to_gpa(kvm, start, end, &kvm_unmap_hva_handler, NULL); return 0; } |
056aad67f kvm: arm/arm64: R... |
1581 |
static int kvm_set_spte_handler(struct kvm *kvm, gpa_t gpa, u64 size, void *data) |
d5d8184d3 KVM: ARM: Memory ... |
1582 1583 |
{ pte_t *pte = (pte_t *)data; |
056aad67f kvm: arm/arm64: R... |
1584 |
WARN_ON(size != PAGE_SIZE); |
15a49a44f KVM: arm: page lo... |
1585 1586 1587 1588 1589 1590 1591 1592 |
/* * We can always call stage2_set_pte with KVM_S2PTE_FLAG_LOGGING_ACTIVE * flag clear because MMU notifiers will have unmapped a huge PMD before * calling ->change_pte() (which in turn calls kvm_set_spte_hva()) and * therefore stage2_set_pte() never needs to clear out a huge PMD * through this calling path. */ stage2_set_pte(kvm, NULL, gpa, pte, 0); |
1d2ebaccc arm/arm64: KVM: A... |
1593 |
return 0; |
d5d8184d3 KVM: ARM: Memory ... |
1594 1595 1596 1597 1598 1599 1600 1601 1602 1603 1604 1605 1606 1607 1608 |
} void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte) { unsigned long end = hva + PAGE_SIZE; pte_t stage2_pte; if (!kvm->arch.pgd) return; trace_kvm_set_spte_hva(hva); stage2_pte = pfn_pte(pte_pfn(pte), PAGE_S2); handle_hva_to_gpa(kvm, hva, end, &kvm_set_spte_handler, &stage2_pte); } |
056aad67f kvm: arm/arm64: R... |
1609 |
static int kvm_age_hva_handler(struct kvm *kvm, gpa_t gpa, u64 size, void *data) |
35307b9a5 arm/arm64: KVM: I... |
1610 1611 1612 |
{ pmd_t *pmd; pte_t *pte; |
056aad67f kvm: arm/arm64: R... |
1613 |
WARN_ON(size != PAGE_SIZE && size != PMD_SIZE); |
35307b9a5 arm/arm64: KVM: I... |
1614 1615 1616 |
pmd = stage2_get_pmd(kvm, NULL, gpa); if (!pmd || pmd_none(*pmd)) /* Nothing there */ return 0; |
064850532 kvm: arm64: Enabl... |
1617 1618 |
if (pmd_thp_or_huge(*pmd)) /* THP, HugeTLB */ return stage2_pmdp_test_and_clear_young(pmd); |
35307b9a5 arm/arm64: KVM: I... |
1619 1620 1621 1622 |
pte = pte_offset_kernel(pmd, gpa); if (pte_none(*pte)) return 0; |
064850532 kvm: arm64: Enabl... |
1623 |
return stage2_ptep_test_and_clear_young(pte); |
35307b9a5 arm/arm64: KVM: I... |
1624 |
} |
056aad67f kvm: arm/arm64: R... |
1625 |
static int kvm_test_age_hva_handler(struct kvm *kvm, gpa_t gpa, u64 size, void *data) |
35307b9a5 arm/arm64: KVM: I... |
1626 1627 1628 |
{ pmd_t *pmd; pte_t *pte; |
056aad67f kvm: arm/arm64: R... |
1629 |
WARN_ON(size != PAGE_SIZE && size != PMD_SIZE); |
35307b9a5 arm/arm64: KVM: I... |
1630 1631 1632 |
pmd = stage2_get_pmd(kvm, NULL, gpa); if (!pmd || pmd_none(*pmd)) /* Nothing there */ return 0; |
bbb3b6b35 kvm-arm: Replace ... |
1633 |
if (pmd_thp_or_huge(*pmd)) /* THP, HugeTLB */ |
35307b9a5 arm/arm64: KVM: I... |
1634 1635 1636 1637 1638 1639 1640 1641 1642 1643 1644 |
return pmd_young(*pmd); pte = pte_offset_kernel(pmd, gpa); if (!pte_none(*pte)) /* Just a page... */ return pte_young(*pte); return 0; } int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end) { |
7e5a67228 KVM: arm/arm64: H... |
1645 1646 |
if (!kvm->arch.pgd) return 0; |
35307b9a5 arm/arm64: KVM: I... |
1647 1648 1649 1650 1651 1652 |
trace_kvm_age_hva(start, end); return handle_hva_to_gpa(kvm, start, end, kvm_age_hva_handler, NULL); } int kvm_test_age_hva(struct kvm *kvm, unsigned long hva) { |
7e5a67228 KVM: arm/arm64: H... |
1653 1654 |
if (!kvm->arch.pgd) return 0; |
35307b9a5 arm/arm64: KVM: I... |
1655 1656 1657 |
trace_kvm_test_age_hva(hva); return handle_hva_to_gpa(kvm, hva, hva, kvm_test_age_hva_handler, NULL); } |
d5d8184d3 KVM: ARM: Memory ... |
1658 1659 1660 1661 |
void kvm_mmu_free_memory_caches(struct kvm_vcpu *vcpu) { mmu_free_memory_cache(&vcpu->arch.mmu_page_cache); } |
342cd0ab0 KVM: ARM: Hypervi... |
1662 1663 |
phys_addr_t kvm_mmu_get_httbr(void) { |
e4c5a6851 arm64: KVM: use I... |
1664 1665 1666 1667 |
if (__kvm_cpu_uses_extended_idmap()) return virt_to_phys(merged_hyp_pgd); else return virt_to_phys(hyp_pgd); |
342cd0ab0 KVM: ARM: Hypervi... |
1668 |
} |
5a677ce04 ARM: KVM: switch ... |
1669 1670 1671 1672 |
phys_addr_t kvm_get_idmap_vector(void) { return hyp_idmap_vector; } |
0535a3e2b arm/arm64: KVM: A... |
1673 1674 1675 1676 1677 1678 1679 1680 1681 1682 1683 1684 1685 1686 1687 1688 |
static int kvm_map_idmap_text(pgd_t *pgd) { int err; /* Create the idmap in the boot page tables */ err = __create_hyp_mappings(pgd, hyp_idmap_start, hyp_idmap_end, __phys_to_pfn(hyp_idmap_start), PAGE_HYP_EXEC); if (err) kvm_err("Failed to idmap %lx-%lx ", hyp_idmap_start, hyp_idmap_end); return err; } |
342cd0ab0 KVM: ARM: Hypervi... |
1689 1690 |
int kvm_mmu_init(void) { |
2fb410596 ARM: KVM: move to... |
1691 |
int err; |
4fda342cc arm/arm64: kvm: U... |
1692 1693 1694 |
hyp_idmap_start = kvm_virt_to_phys(__hyp_idmap_text_start); hyp_idmap_end = kvm_virt_to_phys(__hyp_idmap_text_end); hyp_idmap_vector = kvm_virt_to_phys(__kvm_hyp_init); |
5a677ce04 ARM: KVM: switch ... |
1695 |
|
06f75a1f6 ARM, arm64: kvm: ... |
1696 1697 1698 1699 1700 |
/* * We rely on the linker script to ensure at build time that the HYP * init code does not cross a page boundary. */ BUG_ON((hyp_idmap_start ^ (hyp_idmap_end - 1)) & PAGE_MASK); |
5a677ce04 ARM: KVM: switch ... |
1701 |
|
2ffe95e3a KVM: arm/arm64: R... |
1702 1703 1704 1705 1706 |
kvm_debug("IDMAP page: %lx ", hyp_idmap_start); kvm_debug("HYP VA range: %lx:%lx ", kern_hyp_va(PAGE_OFFSET), kern_hyp_va(~0UL)); |
eac378a9c arm/arm64: KVM: C... |
1707 |
|
6c41a413f arm/arm64: Get ri... |
1708 |
if (hyp_idmap_start >= kern_hyp_va(PAGE_OFFSET) && |
d2896d4b5 arm: KVM: Fix idm... |
1709 1710 |
hyp_idmap_start < kern_hyp_va(~0UL) && hyp_idmap_start != (unsigned long)__hyp_idmap_text_start) { |
eac378a9c arm/arm64: KVM: C... |
1711 1712 1713 1714 1715 1716 1717 1718 1719 |
/* * The idmap page is intersecting with the VA space, * it is not safe to continue further. */ kvm_err("IDMAP intersecting with HYP VA, unable to continue "); err = -EINVAL; goto out; } |
38f791a4e arm64: KVM: Imple... |
1720 |
hyp_pgd = (pgd_t *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, hyp_pgd_order); |
0535a3e2b arm/arm64: KVM: A... |
1721 |
if (!hyp_pgd) { |
d5d8184d3 KVM: ARM: Memory ... |
1722 1723 |
kvm_err("Hyp mode PGD not allocated "); |
2fb410596 ARM: KVM: move to... |
1724 1725 1726 |
err = -ENOMEM; goto out; } |
0535a3e2b arm/arm64: KVM: A... |
1727 1728 1729 1730 1731 1732 1733 1734 1735 |
if (__kvm_cpu_uses_extended_idmap()) { boot_hyp_pgd = (pgd_t *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, hyp_pgd_order); if (!boot_hyp_pgd) { kvm_err("Hyp boot PGD not allocated "); err = -ENOMEM; goto out; } |
2fb410596 ARM: KVM: move to... |
1736 |
|
0535a3e2b arm/arm64: KVM: A... |
1737 1738 1739 |
err = kvm_map_idmap_text(boot_hyp_pgd); if (err) goto out; |
d5d8184d3 KVM: ARM: Memory ... |
1740 |
|
e4c5a6851 arm64: KVM: use I... |
1741 1742 1743 1744 1745 1746 1747 1748 |
merged_hyp_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO); if (!merged_hyp_pgd) { kvm_err("Failed to allocate extra HYP pgd "); goto out; } __kvm_extend_hypmap(boot_hyp_pgd, hyp_pgd, merged_hyp_pgd, hyp_idmap_start); |
0535a3e2b arm/arm64: KVM: A... |
1749 1750 1751 1752 |
} else { err = kvm_map_idmap_text(hyp_pgd); if (err) goto out; |
5a677ce04 ARM: KVM: switch ... |
1753 |
} |
d5d8184d3 KVM: ARM: Memory ... |
1754 |
return 0; |
2fb410596 ARM: KVM: move to... |
1755 |
out: |
4f728276f ARM: KVM: rework ... |
1756 |
free_hyp_pgds(); |
2fb410596 ARM: KVM: move to... |
1757 |
return err; |
342cd0ab0 KVM: ARM: Hypervi... |
1758 |
} |
df6ce24f2 ARM: KVM: Unmap I... |
1759 1760 |
void kvm_arch_commit_memory_region(struct kvm *kvm, |
09170a494 KVM: const-ify us... |
1761 |
const struct kvm_userspace_memory_region *mem, |
df6ce24f2 ARM: KVM: Unmap I... |
1762 |
const struct kvm_memory_slot *old, |
f36f3f284 KVM: add "new" ar... |
1763 |
const struct kvm_memory_slot *new, |
df6ce24f2 ARM: KVM: Unmap I... |
1764 1765 |
enum kvm_mr_change change) { |
c64735554 KVM: arm: Add ini... |
1766 1767 1768 1769 1770 1771 1772 |
/* * At this point memslot has been committed and there is an * allocated dirty_bitmap[], dirty pages will be be tracked while the * memory slot is write protected. */ if (change != KVM_MR_DELETE && mem->flags & KVM_MEM_LOG_DIRTY_PAGES) kvm_mmu_wp_memory_region(kvm, mem->slot); |
df6ce24f2 ARM: KVM: Unmap I... |
1773 1774 1775 1776 |
} int kvm_arch_prepare_memory_region(struct kvm *kvm, struct kvm_memory_slot *memslot, |
09170a494 KVM: const-ify us... |
1777 |
const struct kvm_userspace_memory_region *mem, |
df6ce24f2 ARM: KVM: Unmap I... |
1778 1779 |
enum kvm_mr_change change) { |
8eef91239 arm/arm64: KVM: m... |
1780 1781 1782 1783 |
hva_t hva = mem->userspace_addr; hva_t reg_end = hva + mem->memory_size; bool writable = !(mem->flags & KVM_MEM_READONLY); int ret = 0; |
15a49a44f KVM: arm: page lo... |
1784 1785 |
if (change != KVM_MR_CREATE && change != KVM_MR_MOVE && change != KVM_MR_FLAGS_ONLY) |
8eef91239 arm/arm64: KVM: m... |
1786 1787 1788 |
return 0; /* |
c3058d5da arm/arm64: KVM: E... |
1789 1790 1791 1792 1793 1794 |
* Prevent userspace from creating a memory region outside of the IPA * space addressable by the KVM guest IPA space. */ if (memslot->base_gfn + memslot->npages >= (KVM_PHYS_SIZE >> PAGE_SHIFT)) return -EFAULT; |
72f310481 arm/arm64: KVM: T... |
1795 |
down_read(¤t->mm->mmap_sem); |
c3058d5da arm/arm64: KVM: E... |
1796 |
/* |
8eef91239 arm/arm64: KVM: m... |
1797 1798 1799 1800 1801 1802 1803 1804 1805 1806 1807 1808 1809 1810 1811 1812 1813 1814 1815 1816 1817 1818 1819 1820 1821 1822 1823 1824 1825 1826 1827 1828 1829 1830 1831 1832 |
* A memory region could potentially cover multiple VMAs, and any holes * between them, so iterate over all of them to find out if we can map * any of them right now. * * +--------------------------------------------+ * +---------------+----------------+ +----------------+ * | : VMA 1 | VMA 2 | | VMA 3 : | * +---------------+----------------+ +----------------+ * | memory region | * +--------------------------------------------+ */ do { struct vm_area_struct *vma = find_vma(current->mm, hva); hva_t vm_start, vm_end; if (!vma || vma->vm_start >= reg_end) break; /* * Mapping a read-only VMA is only allowed if the * memory region is configured as read-only. */ if (writable && !(vma->vm_flags & VM_WRITE)) { ret = -EPERM; break; } /* * Take the intersection of this VMA with the memory region */ vm_start = max(hva, vma->vm_start); vm_end = min(reg_end, vma->vm_end); if (vma->vm_flags & VM_PFNMAP) { gpa_t gpa = mem->guest_phys_addr + (vm_start - mem->userspace_addr); |
ca09f02f1 arm: KVM: Fix inc... |
1833 1834 1835 1836 |
phys_addr_t pa; pa = (phys_addr_t)vma->vm_pgoff << PAGE_SHIFT; pa += vm_start - vma->vm_start; |
8eef91239 arm/arm64: KVM: m... |
1837 |
|
15a49a44f KVM: arm: page lo... |
1838 |
/* IO region dirty page logging not allowed */ |
72f310481 arm/arm64: KVM: T... |
1839 1840 1841 1842 |
if (memslot->flags & KVM_MEM_LOG_DIRTY_PAGES) { ret = -EINVAL; goto out; } |
15a49a44f KVM: arm: page lo... |
1843 |
|
8eef91239 arm/arm64: KVM: m... |
1844 1845 1846 1847 1848 1849 1850 1851 |
ret = kvm_phys_addr_ioremap(kvm, gpa, pa, vm_end - vm_start, writable); if (ret) break; } hva = vm_end; } while (hva < reg_end); |
15a49a44f KVM: arm: page lo... |
1852 |
if (change == KVM_MR_FLAGS_ONLY) |
72f310481 arm/arm64: KVM: T... |
1853 |
goto out; |
15a49a44f KVM: arm: page lo... |
1854 |
|
849260c72 arm, arm64: KVM: ... |
1855 1856 |
spin_lock(&kvm->mmu_lock); if (ret) |
8eef91239 arm/arm64: KVM: m... |
1857 |
unmap_stage2_range(kvm, mem->guest_phys_addr, mem->memory_size); |
849260c72 arm, arm64: KVM: ... |
1858 1859 1860 |
else stage2_flush_memslot(kvm, memslot); spin_unlock(&kvm->mmu_lock); |
72f310481 arm/arm64: KVM: T... |
1861 1862 |
out: up_read(¤t->mm->mmap_sem); |
8eef91239 arm/arm64: KVM: m... |
1863 |
return ret; |
df6ce24f2 ARM: KVM: Unmap I... |
1864 1865 1866 1867 1868 1869 1870 1871 1872 1873 1874 1875 |
} void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free, struct kvm_memory_slot *dont) { } int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot, unsigned long npages) { return 0; } |
15f46015e KVM: add memslots... |
1876 |
void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots) |
df6ce24f2 ARM: KVM: Unmap I... |
1877 1878 1879 1880 1881 |
{ } void kvm_arch_flush_shadow_all(struct kvm *kvm) { |
293f29363 kvm-arm: Unmap sh... |
1882 |
kvm_free_stage2_pgd(kvm); |
df6ce24f2 ARM: KVM: Unmap I... |
1883 1884 1885 1886 1887 |
} void kvm_arch_flush_shadow_memslot(struct kvm *kvm, struct kvm_memory_slot *slot) { |
8eef91239 arm/arm64: KVM: m... |
1888 1889 1890 1891 1892 1893 |
gpa_t gpa = slot->base_gfn << PAGE_SHIFT; phys_addr_t size = slot->npages << PAGE_SHIFT; spin_lock(&kvm->mmu_lock); unmap_stage2_range(kvm, gpa, size); spin_unlock(&kvm->mmu_lock); |
df6ce24f2 ARM: KVM: Unmap I... |
1894 |
} |
3c1e71650 arm/arm64: KVM: U... |
1895 1896 1897 1898 1899 1900 1901 1902 1903 1904 1905 1906 1907 1908 1909 1910 1911 1912 1913 1914 1915 1916 1917 1918 1919 1920 1921 1922 1923 1924 1925 1926 1927 1928 1929 1930 1931 1932 1933 1934 1935 1936 1937 1938 1939 1940 1941 1942 1943 1944 1945 1946 1947 1948 1949 1950 1951 1952 1953 1954 1955 1956 1957 1958 1959 1960 1961 1962 |
/* * See note at ARMv7 ARM B1.14.4 (TL;DR: S/W ops are not easily virtualized). * * Main problems: * - S/W ops are local to a CPU (not broadcast) * - We have line migration behind our back (speculation) * - System caches don't support S/W at all (damn!) * * In the face of the above, the best we can do is to try and convert * S/W ops to VA ops. Because the guest is not allowed to infer the * S/W to PA mapping, it can only use S/W to nuke the whole cache, * which is a rather good thing for us. * * Also, it is only used when turning caches on/off ("The expected * usage of the cache maintenance instructions that operate by set/way * is associated with the cache maintenance instructions associated * with the powerdown and powerup of caches, if this is required by * the implementation."). * * We use the following policy: * * - If we trap a S/W operation, we enable VM trapping to detect * caches being turned on/off, and do a full clean. * * - We flush the caches on both caches being turned on and off. * * - Once the caches are enabled, we stop trapping VM ops. */ void kvm_set_way_flush(struct kvm_vcpu *vcpu) { unsigned long hcr = vcpu_get_hcr(vcpu); /* * If this is the first time we do a S/W operation * (i.e. HCR_TVM not set) flush the whole memory, and set the * VM trapping. * * Otherwise, rely on the VM trapping to wait for the MMU + * Caches to be turned off. At that point, we'll be able to * clean the caches again. */ if (!(hcr & HCR_TVM)) { trace_kvm_set_way_flush(*vcpu_pc(vcpu), vcpu_has_cache_enabled(vcpu)); stage2_flush_vm(vcpu->kvm); vcpu_set_hcr(vcpu, hcr | HCR_TVM); } } void kvm_toggle_cache(struct kvm_vcpu *vcpu, bool was_enabled) { bool now_enabled = vcpu_has_cache_enabled(vcpu); /* * If switching the MMU+caches on, need to invalidate the caches. * If switching it off, need to clean the caches. * Clean + invalidate does the trick always. */ if (now_enabled != was_enabled) stage2_flush_vm(vcpu->kvm); /* Caches are now on, stop trapping VM ops (until a S/W op) */ if (now_enabled) vcpu_set_hcr(vcpu, vcpu_get_hcr(vcpu) & ~HCR_TVM); trace_kvm_toggle_cache(*vcpu_pc(vcpu), was_enabled, now_enabled); } |