Eric Lee / smarc-fsl-linux-kernel

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drivers/clk/clk-wm831x.c 9.62 KB

f05259a6f Mark Brown clk: wm831x: Add ...	1 2 3 4 5 6 7 8 9 10 11 12 13	/* * WM831x clock control * * Copyright 2011-2 Wolfson Microelectronics PLC. * * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. * */
f05259a6f Mark Brown clk: wm831x: Add ...	14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30	#include <linux/clk-provider.h> #include <linux/delay.h> #include <linux/module.h> #include <linux/slab.h> #include <linux/platform_device.h> #include <linux/mfd/wm831x/core.h> struct wm831x_clk { struct wm831x wm831x; struct clk_hw xtal_hw; struct clk_hw fll_hw; struct clk_hw clkout_hw; struct clk xtal; struct clk fll; struct clk clkout; bool xtal_ena; };
a5828a6c5 Mark Brown clk: wm831x: Prov...	31	static int wm831x_xtal_is_prepared(struct clk_hw *hw)
f05259a6f Mark Brown clk: wm831x: Add ...	32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51	{ struct wm831x_clk clkdata = container_of(hw, struct wm831x_clk, xtal_hw); return clkdata->xtal_ena; } static unsigned long wm831x_xtal_recalc_rate(struct clk_hw hw, unsigned long parent_rate) { struct wm831x_clk *clkdata = container_of(hw, struct wm831x_clk, xtal_hw); if (clkdata->xtal_ena) return 32768; else return 0; } static const struct clk_ops wm831x_xtal_ops = {
a5828a6c5 Mark Brown clk: wm831x: Prov...	52	.is_prepared = wm831x_xtal_is_prepared,
f05259a6f Mark Brown clk: wm831x: Add ...	53 54 55 56 57 58	.recalc_rate = wm831x_xtal_recalc_rate, }; static struct clk_init_data wm831x_xtal_init = { .name = "xtal", .ops = &wm831x_xtal_ops,
f05259a6f Mark Brown clk: wm831x: Add ...	59 60 61 62 63 64 65 66 67 68 69 70	}; static const unsigned long wm831x_fll_auto_rates[] = { 2048000, 11289600, 12000000, 12288000, 19200000, 22579600, 24000000, 24576000, };
a5828a6c5 Mark Brown clk: wm831x: Prov...	71	static int wm831x_fll_is_prepared(struct clk_hw *hw)
f05259a6f Mark Brown clk: wm831x: Add ...	72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94	{ struct wm831x_clk clkdata = container_of(hw, struct wm831x_clk, fll_hw); struct wm831x wm831x = clkdata->wm831x; int ret; ret = wm831x_reg_read(wm831x, WM831X_FLL_CONTROL_1); if (ret < 0) { dev_err(wm831x->dev, "Unable to read FLL_CONTROL_1: %d ", ret); return true; } return (ret & WM831X_FLL_ENA) != 0; } static int wm831x_fll_prepare(struct clk_hw hw) { struct wm831x_clk clkdata = container_of(hw, struct wm831x_clk, fll_hw); struct wm831x *wm831x = clkdata->wm831x; int ret;
6f8b31458 Axel Lin clk: wm831x: Fix ...	95	ret = wm831x_set_bits(wm831x, WM831X_FLL_CONTROL_1,
f05259a6f Mark Brown clk: wm831x: Add ...	96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111	WM831X_FLL_ENA, WM831X_FLL_ENA); if (ret != 0) dev_crit(wm831x->dev, "Failed to enable FLL: %d ", ret); usleep_range(2000, 2000); return ret; } static void wm831x_fll_unprepare(struct clk_hw hw) { struct wm831x_clk clkdata = container_of(hw, struct wm831x_clk, fll_hw); struct wm831x *wm831x = clkdata->wm831x; int ret;
6f8b31458 Axel Lin clk: wm831x: Fix ...	112	ret = wm831x_set_bits(wm831x, WM831X_FLL_CONTROL_1, WM831X_FLL_ENA, 0);
f05259a6f Mark Brown clk: wm831x: Add ...	113	if (ret != 0)
6f8b31458 Axel Lin clk: wm831x: Fix ...	114 115	dev_crit(wm831x->dev, "Failed to disable FLL: %d ", ret);
f05259a6f Mark Brown clk: wm831x: Add ...	116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169	} static unsigned long wm831x_fll_recalc_rate(struct clk_hw hw, unsigned long parent_rate) { struct wm831x_clk clkdata = container_of(hw, struct wm831x_clk, fll_hw); struct wm831x wm831x = clkdata->wm831x; int ret; ret = wm831x_reg_read(wm831x, WM831X_CLOCK_CONTROL_2); if (ret < 0) { dev_err(wm831x->dev, "Unable to read CLOCK_CONTROL_2: %d ", ret); return 0; } if (ret & WM831X_FLL_AUTO) return wm831x_fll_auto_rates[ret & WM831X_FLL_AUTO_FREQ_MASK]; dev_err(wm831x->dev, "FLL only supported in AUTO mode "); return 0; } static long wm831x_fll_round_rate(struct clk_hw hw, unsigned long rate, unsigned long unused) { int best = 0; int i; for (i = 0; i < ARRAY_SIZE(wm831x_fll_auto_rates); i++) if (abs(wm831x_fll_auto_rates[i] - rate) < abs(wm831x_fll_auto_rates[best] - rate)) best = i; return wm831x_fll_auto_rates[best]; } static int wm831x_fll_set_rate(struct clk_hw hw, unsigned long rate, unsigned long parent_rate) { struct wm831x_clk clkdata = container_of(hw, struct wm831x_clk, fll_hw); struct wm831x wm831x = clkdata->wm831x; int i; for (i = 0; i < ARRAY_SIZE(wm831x_fll_auto_rates); i++) if (wm831x_fll_auto_rates[i] == rate) break; if (i == ARRAY_SIZE(wm831x_fll_auto_rates)) return -EINVAL;
a5828a6c5 Mark Brown clk: wm831x: Prov...	170	if (wm831x_fll_is_prepared(hw))
f05259a6f Mark Brown clk: wm831x: Add ...	171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222	return -EPERM; return wm831x_set_bits(wm831x, WM831X_CLOCK_CONTROL_2, WM831X_FLL_AUTO_FREQ_MASK, i); } static const char wm831x_fll_parents[] = { "xtal", "clkin", }; static u8 wm831x_fll_get_parent(struct clk_hw hw) { struct wm831x_clk clkdata = container_of(hw, struct wm831x_clk, fll_hw); struct wm831x wm831x = clkdata->wm831x; int ret; /* AUTO mode is always clocked from the crystal */ ret = wm831x_reg_read(wm831x, WM831X_CLOCK_CONTROL_2); if (ret < 0) { dev_err(wm831x->dev, "Unable to read CLOCK_CONTROL_2: %d ", ret); return 0; } if (ret & WM831X_FLL_AUTO) return 0; ret = wm831x_reg_read(wm831x, WM831X_FLL_CONTROL_5); if (ret < 0) { dev_err(wm831x->dev, "Unable to read FLL_CONTROL_5: %d ", ret); return 0; } switch (ret & WM831X_FLL_CLK_SRC_MASK) { case 0: return 0; case 1: return 1; default: dev_err(wm831x->dev, "Unsupported FLL clock source %d ", ret & WM831X_FLL_CLK_SRC_MASK); return 0; } } static const struct clk_ops wm831x_fll_ops = {
a5828a6c5 Mark Brown clk: wm831x: Prov...	223	.is_prepared = wm831x_fll_is_prepared,
f05259a6f Mark Brown clk: wm831x: Add ...	224 225 226 227 228 229 230 231 232 233 234 235 236 237 238	.prepare = wm831x_fll_prepare, .unprepare = wm831x_fll_unprepare, .round_rate = wm831x_fll_round_rate, .recalc_rate = wm831x_fll_recalc_rate, .set_rate = wm831x_fll_set_rate, .get_parent = wm831x_fll_get_parent, }; static struct clk_init_data wm831x_fll_init = { .name = "fll", .ops = &wm831x_fll_ops, .parent_names = wm831x_fll_parents, .num_parents = ARRAY_SIZE(wm831x_fll_parents), .flags = CLK_SET_RATE_GATE, };
a5828a6c5 Mark Brown clk: wm831x: Prov...	239	static int wm831x_clkout_is_prepared(struct clk_hw *hw)
f05259a6f Mark Brown clk: wm831x: Add ...	240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305	{ struct wm831x_clk clkdata = container_of(hw, struct wm831x_clk, clkout_hw); struct wm831x wm831x = clkdata->wm831x; int ret; ret = wm831x_reg_read(wm831x, WM831X_CLOCK_CONTROL_1); if (ret < 0) { dev_err(wm831x->dev, "Unable to read CLOCK_CONTROL_1: %d ", ret); return true; } return (ret & WM831X_CLKOUT_ENA) != 0; } static int wm831x_clkout_prepare(struct clk_hw hw) { struct wm831x_clk clkdata = container_of(hw, struct wm831x_clk, clkout_hw); struct wm831x wm831x = clkdata->wm831x; int ret; ret = wm831x_reg_unlock(wm831x); if (ret != 0) { dev_crit(wm831x->dev, "Failed to lock registers: %d ", ret); return ret; } ret = wm831x_set_bits(wm831x, WM831X_CLOCK_CONTROL_1, WM831X_CLKOUT_ENA, WM831X_CLKOUT_ENA); if (ret != 0) dev_crit(wm831x->dev, "Failed to enable CLKOUT: %d ", ret); wm831x_reg_lock(wm831x); return ret; } static void wm831x_clkout_unprepare(struct clk_hw hw) { struct wm831x_clk clkdata = container_of(hw, struct wm831x_clk, clkout_hw); struct wm831x wm831x = clkdata->wm831x; int ret; ret = wm831x_reg_unlock(wm831x); if (ret != 0) { dev_crit(wm831x->dev, "Failed to lock registers: %d ", ret); return; } ret = wm831x_set_bits(wm831x, WM831X_CLOCK_CONTROL_1, WM831X_CLKOUT_ENA, 0); if (ret != 0) dev_crit(wm831x->dev, "Failed to disable CLKOUT: %d ", ret); wm831x_reg_lock(wm831x); } static const char *wm831x_clkout_parents[] = {
f05259a6f Mark Brown clk: wm831x: Add ...	306	"fll",
bcc7fd20e Axel Lin clk: wm831x: Fix ...	307	"xtal",
f05259a6f Mark Brown clk: wm831x: Add ...	308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325	}; static u8 wm831x_clkout_get_parent(struct clk_hw hw) { struct wm831x_clk clkdata = container_of(hw, struct wm831x_clk, clkout_hw); struct wm831x *wm831x = clkdata->wm831x; int ret; ret = wm831x_reg_read(wm831x, WM831X_CLOCK_CONTROL_1); if (ret < 0) { dev_err(wm831x->dev, "Unable to read CLOCK_CONTROL_1: %d ", ret); return 0; } if (ret & WM831X_CLKOUT_SRC)
f05259a6f Mark Brown clk: wm831x: Add ...	326	return 1;
bcc7fd20e Axel Lin clk: wm831x: Fix ...	327 328	else return 0;
f05259a6f Mark Brown clk: wm831x: Add ...	329 330 331 332 333 334 335 336 337 338 339 340 341 342	} static int wm831x_clkout_set_parent(struct clk_hw hw, u8 parent) { struct wm831x_clk clkdata = container_of(hw, struct wm831x_clk, clkout_hw); struct wm831x *wm831x = clkdata->wm831x; return wm831x_set_bits(wm831x, WM831X_CLOCK_CONTROL_1, WM831X_CLKOUT_SRC, parent << WM831X_CLKOUT_SRC_SHIFT); } static const struct clk_ops wm831x_clkout_ops = {
a5828a6c5 Mark Brown clk: wm831x: Prov...	343	.is_prepared = wm831x_clkout_is_prepared,
f05259a6f Mark Brown clk: wm831x: Add ...	344 345 346 347 348 349 350 351 352 353 354 355 356	.prepare = wm831x_clkout_prepare, .unprepare = wm831x_clkout_unprepare, .get_parent = wm831x_clkout_get_parent, .set_parent = wm831x_clkout_set_parent, }; static struct clk_init_data wm831x_clkout_init = { .name = "clkout", .ops = &wm831x_clkout_ops, .parent_names = wm831x_clkout_parents, .num_parents = ARRAY_SIZE(wm831x_clkout_parents), .flags = CLK_SET_RATE_PARENT, };
018ae93fb Bill Pemberton clk: remove use o...	357	static int wm831x_clk_probe(struct platform_device *pdev)
f05259a6f Mark Brown clk: wm831x: Add ...	358 359 360 361 362 363 364 365	{ struct wm831x wm831x = dev_get_drvdata(pdev->dev.parent); struct wm831x_clk clkdata; int ret; clkdata = devm_kzalloc(&pdev->dev, sizeof(*clkdata), GFP_KERNEL); if (!clkdata) return -ENOMEM;
08442ce99 Mark Brown clk: wm831x: Init...	366	clkdata->wm831x = wm831x;
f05259a6f Mark Brown clk: wm831x: Add ...	367 368 369 370 371 372 373 374 375 376 377	/* XTAL_ENA can only be set via OTP/InstantConfig so just read once */ ret = wm831x_reg_read(wm831x, WM831X_CLOCK_CONTROL_2); if (ret < 0) { dev_err(wm831x->dev, "Unable to read CLOCK_CONTROL_2: %d ", ret); return ret; } clkdata->xtal_ena = ret & WM831X_XTAL_ENA; clkdata->xtal_hw.init = &wm831x_xtal_init;
9be9d482b Stephen Boyd clk: wm831x: Use ...	378	clkdata->xtal = devm_clk_register(&pdev->dev, &clkdata->xtal_hw);
980f58a45 Stephen Boyd clk: wm831x: Fix ...	379 380	if (IS_ERR(clkdata->xtal)) return PTR_ERR(clkdata->xtal);
f05259a6f Mark Brown clk: wm831x: Add ...	381 382	clkdata->fll_hw.init = &wm831x_fll_init;
9be9d482b Stephen Boyd clk: wm831x: Use ...	383 384 385	clkdata->fll = devm_clk_register(&pdev->dev, &clkdata->fll_hw); if (IS_ERR(clkdata->fll)) return PTR_ERR(clkdata->fll);
f05259a6f Mark Brown clk: wm831x: Add ...	386 387	clkdata->clkout_hw.init = &wm831x_clkout_init;
9be9d482b Stephen Boyd clk: wm831x: Use ...	388 389 390	clkdata->clkout = devm_clk_register(&pdev->dev, &clkdata->clkout_hw); if (IS_ERR(clkdata->clkout)) return PTR_ERR(clkdata->clkout);
f05259a6f Mark Brown clk: wm831x: Add ...	391
c0431037b Jingoo Han clk: use platform...	392	platform_set_drvdata(pdev, clkdata);
f05259a6f Mark Brown clk: wm831x: Add ...	393 394	return 0;
f05259a6f Mark Brown clk: wm831x: Add ...	395	}
f05259a6f Mark Brown clk: wm831x: Add ...	396 397	static struct platform_driver wm831x_clk_driver = { .probe = wm831x_clk_probe,
f05259a6f Mark Brown clk: wm831x: Add ...	398 399	.driver = { .name = "wm831x-clk",
f05259a6f Mark Brown clk: wm831x: Add ...	400 401 402 403 404 405 406 407 408 409	}, }; module_platform_driver(wm831x_clk_driver); /* Module information */ MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>"); MODULE_DESCRIPTION("WM831x clock driver"); MODULE_LICENSE("GPL"); MODULE_ALIAS("platform:wm831x-clk");