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arch/x86/kvm/kvm_emulate.h 17 KB
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  /* SPDX-License-Identifier: GPL-2.0 */
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  /******************************************************************************
   * x86_emulate.h
   *
   * Generic x86 (32-bit and 64-bit) instruction decoder and emulator.
   *
   * Copyright (c) 2005 Keir Fraser
   *
   * From: xen-unstable 10676:af9809f51f81a3c43f276f00c81a52ef558afda4
   */
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  #ifndef _ASM_X86_KVM_X86_EMULATE_H
  #define _ASM_X86_KVM_X86_EMULATE_H
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  #include <asm/desc_defs.h>
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  struct x86_emulate_ctxt;
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  enum x86_intercept;
  enum x86_intercept_stage;
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  struct x86_exception {
  	u8 vector;
  	bool error_code_valid;
  	u16 error_code;
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  	bool nested_page_fault;
  	u64 address; /* cr2 or nested page fault gpa */
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  	u8 async_page_fault;
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  };
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  /*
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   * This struct is used to carry enough information from the instruction
   * decoder to main KVM so that a decision can be made whether the
   * instruction needs to be intercepted or not.
   */
  struct x86_instruction_info {
  	u8  intercept;          /* which intercept                      */
  	u8  rep_prefix;         /* rep prefix?                          */
  	u8  modrm_mod;		/* mod part of modrm			*/
  	u8  modrm_reg;          /* index of register used               */
  	u8  modrm_rm;		/* rm part of modrm			*/
  	u64 src_val;            /* value of source operand              */
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  	u64 dst_val;            /* value of destination operand         */
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  	u8  src_bytes;          /* size of source operand               */
  	u8  dst_bytes;          /* size of destination operand          */
  	u8  ad_bytes;           /* size of src/dst address              */
  	u64 next_rip;           /* rip following the instruction        */
  };
  
  /*
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   * x86_emulate_ops:
   *
   * These operations represent the instruction emulator's interface to memory.
   * There are two categories of operation: those that act on ordinary memory
   * regions (*_std), and those that act on memory regions known to require
   * special treatment or emulation (*_emulated).
   *
   * The emulator assumes that an instruction accesses only one 'emulated memory'
   * location, that this location is the given linear faulting address (cr2), and
   * that this is one of the instruction's data operands. Instruction fetches and
   * stack operations are assumed never to access emulated memory. The emulator
   * automatically deduces which operand of a string-move operation is accessing
   * emulated memory, and assumes that the other operand accesses normal memory.
   *
   * NOTES:
   *  1. The emulator isn't very smart about emulated vs. standard memory.
   *     'Emulated memory' access addresses should be checked for sanity.
   *     'Normal memory' accesses may fault, and the caller must arrange to
   *     detect and handle reentrancy into the emulator via recursive faults.
   *     Accesses may be unaligned and may cross page boundaries.
   *  2. If the access fails (cannot emulate, or a standard access faults) then
   *     it is up to the memop to propagate the fault to the guest VM via
   *     some out-of-band mechanism, unknown to the emulator. The memop signals
   *     failure by returning X86EMUL_PROPAGATE_FAULT to the emulator, which will
   *     then immediately bail.
   *  3. Valid access sizes are 1, 2, 4 and 8 bytes. On x86/32 systems only
   *     cmpxchg8b_emulated need support 8-byte accesses.
   *  4. The emulator cannot handle 64-bit mode emulation on an x86/32 system.
   */
  /* Access completed successfully: continue emulation as normal. */
  #define X86EMUL_CONTINUE        0
  /* Access is unhandleable: bail from emulation and return error to caller. */
  #define X86EMUL_UNHANDLEABLE    1
  /* Terminate emulation but return success to the caller. */
  #define X86EMUL_PROPAGATE_FAULT 2 /* propagate a generated fault to guest */
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  #define X86EMUL_RETRY_INSTR     3 /* retry the instruction for some reason */
  #define X86EMUL_CMPXCHG_FAILED  4 /* cmpxchg did not see expected value */
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  #define X86EMUL_IO_NEEDED       5 /* IO is needed to complete emulation */
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  #define X86EMUL_INTERCEPTED     6 /* Intercepted by nested VMCB/VMCS */
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  struct x86_emulate_ops {
  	/*
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  	 * read_gpr: read a general purpose register (rax - r15)
  	 *
  	 * @reg: gpr number.
  	 */
  	ulong (*read_gpr)(struct x86_emulate_ctxt *ctxt, unsigned reg);
  	/*
  	 * write_gpr: write a general purpose register (rax - r15)
  	 *
  	 * @reg: gpr number.
  	 * @val: value to write.
  	 */
  	void (*write_gpr)(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val);
  	/*
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  	 * read_std: Read bytes of standard (non-emulated/special) memory.
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  	 *           Used for descriptor reading.
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  	 *  @addr:  [IN ] Linear address from which to read.
  	 *  @val:   [OUT] Value read from memory, zero-extended to 'u_long'.
  	 *  @bytes: [IN ] Number of bytes to read from memory.
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  	 *  @system:[IN ] Whether the access is forced to be at CPL0.
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  	 */
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  	int (*read_std)(struct x86_emulate_ctxt *ctxt,
  			unsigned long addr, void *val,
  			unsigned int bytes,
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  			struct x86_exception *fault, bool system);
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  	/*
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  	 * read_phys: Read bytes of standard (non-emulated/special) memory.
  	 *            Used for descriptor reading.
  	 *  @addr:  [IN ] Physical address from which to read.
  	 *  @val:   [OUT] Value read from memory.
  	 *  @bytes: [IN ] Number of bytes to read from memory.
  	 */
  	int (*read_phys)(struct x86_emulate_ctxt *ctxt, unsigned long addr,
  			void *val, unsigned int bytes);
  
  	/*
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  	 * write_std: Write bytes of standard (non-emulated/special) memory.
  	 *            Used for descriptor writing.
  	 *  @addr:  [IN ] Linear address to which to write.
  	 *  @val:   [OUT] Value write to memory, zero-extended to 'u_long'.
  	 *  @bytes: [IN ] Number of bytes to write to memory.
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  	 *  @system:[IN ] Whether the access is forced to be at CPL0.
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  	 */
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  	int (*write_std)(struct x86_emulate_ctxt *ctxt,
  			 unsigned long addr, void *val, unsigned int bytes,
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  			 struct x86_exception *fault, bool system);
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  	/*
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  	 * fetch: Read bytes of standard (non-emulated/special) memory.
  	 *        Used for instruction fetch.
  	 *  @addr:  [IN ] Linear address from which to read.
  	 *  @val:   [OUT] Value read from memory, zero-extended to 'u_long'.
  	 *  @bytes: [IN ] Number of bytes to read from memory.
  	 */
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  	int (*fetch)(struct x86_emulate_ctxt *ctxt,
  		     unsigned long addr, void *val, unsigned int bytes,
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  		     struct x86_exception *fault);
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  	/*
  	 * read_emulated: Read bytes from emulated/special memory area.
  	 *  @addr:  [IN ] Linear address from which to read.
  	 *  @val:   [OUT] Value read from memory, zero-extended to 'u_long'.
  	 *  @bytes: [IN ] Number of bytes to read from memory.
  	 */
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  	int (*read_emulated)(struct x86_emulate_ctxt *ctxt,
  			     unsigned long addr, void *val, unsigned int bytes,
  			     struct x86_exception *fault);
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  	/*
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  	 * write_emulated: Write bytes to emulated/special memory area.
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  	 *  @addr:  [IN ] Linear address to which to write.
  	 *  @val:   [IN ] Value to write to memory (low-order bytes used as
  	 *                required).
  	 *  @bytes: [IN ] Number of bytes to write to memory.
  	 */
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  	int (*write_emulated)(struct x86_emulate_ctxt *ctxt,
  			      unsigned long addr, const void *val,
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  			      unsigned int bytes,
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  			      struct x86_exception *fault);
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  	/*
  	 * cmpxchg_emulated: Emulate an atomic (LOCKed) CMPXCHG operation on an
  	 *                   emulated/special memory area.
  	 *  @addr:  [IN ] Linear address to access.
  	 *  @old:   [IN ] Value expected to be current at @addr.
  	 *  @new:   [IN ] Value to write to @addr.
  	 *  @bytes: [IN ] Number of bytes to access using CMPXCHG.
  	 */
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  	int (*cmpxchg_emulated)(struct x86_emulate_ctxt *ctxt,
  				unsigned long addr,
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  				const void *old,
  				const void *new,
  				unsigned int bytes,
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  				struct x86_exception *fault);
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  	void (*invlpg)(struct x86_emulate_ctxt *ctxt, ulong addr);
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  	int (*pio_in_emulated)(struct x86_emulate_ctxt *ctxt,
  			       int size, unsigned short port, void *val,
  			       unsigned int count);
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  	int (*pio_out_emulated)(struct x86_emulate_ctxt *ctxt,
  				int size, unsigned short port, const void *val,
  				unsigned int count);
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  	bool (*get_segment)(struct x86_emulate_ctxt *ctxt, u16 *selector,
  			    struct desc_struct *desc, u32 *base3, int seg);
  	void (*set_segment)(struct x86_emulate_ctxt *ctxt, u16 selector,
  			    struct desc_struct *desc, u32 base3, int seg);
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  	unsigned long (*get_cached_segment_base)(struct x86_emulate_ctxt *ctxt,
  						 int seg);
  	void (*get_gdt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt);
  	void (*get_idt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt);
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  	void (*set_gdt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt);
  	void (*set_idt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt);
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  	ulong (*get_cr)(struct x86_emulate_ctxt *ctxt, int cr);
  	int (*set_cr)(struct x86_emulate_ctxt *ctxt, int cr, ulong val);
  	int (*cpl)(struct x86_emulate_ctxt *ctxt);
  	int (*get_dr)(struct x86_emulate_ctxt *ctxt, int dr, ulong *dest);
  	int (*set_dr)(struct x86_emulate_ctxt *ctxt, int dr, ulong value);
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  	u64 (*get_smbase)(struct x86_emulate_ctxt *ctxt);
  	void (*set_smbase)(struct x86_emulate_ctxt *ctxt, u64 smbase);
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  	int (*set_msr)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 data);
  	int (*get_msr)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 *pdata);
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  	int (*check_pmc)(struct x86_emulate_ctxt *ctxt, u32 pmc);
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  	int (*read_pmc)(struct x86_emulate_ctxt *ctxt, u32 pmc, u64 *pdata);
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  	void (*halt)(struct x86_emulate_ctxt *ctxt);
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  	void (*wbinvd)(struct x86_emulate_ctxt *ctxt);
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  	int (*fix_hypercall)(struct x86_emulate_ctxt *ctxt);
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  	int (*intercept)(struct x86_emulate_ctxt *ctxt,
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  			 struct x86_instruction_info *info,
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  			 enum x86_intercept_stage stage);
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  	bool (*get_cpuid)(struct x86_emulate_ctxt *ctxt, u32 *eax, u32 *ebx,
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  			  u32 *ecx, u32 *edx, bool exact_only);
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  	bool (*guest_has_long_mode)(struct x86_emulate_ctxt *ctxt);
  	bool (*guest_has_movbe)(struct x86_emulate_ctxt *ctxt);
  	bool (*guest_has_fxsr)(struct x86_emulate_ctxt *ctxt);
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  	void (*set_nmi_mask)(struct x86_emulate_ctxt *ctxt, bool masked);
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  	unsigned (*get_hflags)(struct x86_emulate_ctxt *ctxt);
  	void (*set_hflags)(struct x86_emulate_ctxt *ctxt, unsigned hflags);
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  	int (*pre_leave_smm)(struct x86_emulate_ctxt *ctxt,
  			     const char *smstate);
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  	void (*post_leave_smm)(struct x86_emulate_ctxt *ctxt);
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  	int (*set_xcr)(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr);
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  };
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  typedef u32 __attribute__((vector_size(16))) sse128_t;
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  /* Type, address-of, and value of an instruction's operand. */
  struct operand {
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  	enum { OP_REG, OP_MEM, OP_MEM_STR, OP_IMM, OP_XMM, OP_MM, OP_NONE } type;
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  	unsigned int bytes;
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  	unsigned int count;
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  	union {
  		unsigned long orig_val;
  		u64 orig_val64;
  	};
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  	union {
  		unsigned long *reg;
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  		struct segmented_address {
  			ulong ea;
  			unsigned seg;
  		} mem;
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  		unsigned xmm;
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  		unsigned mm;
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  	} addr;
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  	union {
  		unsigned long val;
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  		u64 val64;
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  		char valptr[sizeof(sse128_t)];
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  		sse128_t vec_val;
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  		u64 mm_val;
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  		void *data;
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  	};
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  };
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  struct fetch_cache {
  	u8 data[15];
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  	u8 *ptr;
  	u8 *end;
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  };
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  struct read_cache {
  	u8 data[1024];
  	unsigned long pos;
  	unsigned long end;
  };
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  /* Execution mode, passed to the emulator. */
  enum x86emul_mode {
  	X86EMUL_MODE_REAL,	/* Real mode.             */
  	X86EMUL_MODE_VM86,	/* Virtual 8086 mode.     */
  	X86EMUL_MODE_PROT16,	/* 16-bit protected mode. */
  	X86EMUL_MODE_PROT32,	/* 32-bit protected mode. */
  	X86EMUL_MODE_PROT64,	/* 64-bit (long) mode.    */
  };
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  /* These match some of the HF_* flags defined in kvm_host.h  */
  #define X86EMUL_GUEST_MASK           (1 << 5) /* VCPU is in guest-mode */
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  #define X86EMUL_SMM_MASK             (1 << 6)
  #define X86EMUL_SMM_INSIDE_NMI_MASK  (1 << 7)
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  /*
   * fastop functions are declared as taking a never-defined fastop parameter,
   * so they can't be called from C directly.
   */
  struct fastop;
  
  typedef void (*fastop_t)(struct fastop *);
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  struct x86_emulate_ctxt {
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  	void *vcpu;
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  	const struct x86_emulate_ops *ops;
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  	/* Register state before/after emulation. */
  	unsigned long eflags;
  	unsigned long eip; /* eip before instruction emulation */
  	/* Emulated execution mode, represented by an X86EMUL_MODE value. */
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  	enum x86emul_mode mode;
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  	/* interruptibility state, as a result of execution of STI or MOV SS */
  	int interruptibility;
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  	bool perm_ok; /* do not check permissions if true */
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  	bool ud;	/* inject an #UD if host doesn't support insn */
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  	bool tf;	/* TF value before instruction (after for syscall/sysret) */
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  	bool have_exception;
  	struct x86_exception exception;
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  	/* GPA available */
  	bool gpa_available;
  	gpa_t gpa_val;
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  	/*
  	 * decode cache
  	 */
  
  	/* current opcode length in bytes */
  	u8 opcode_len;
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  	u8 b;
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  	u8 intercept;
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  	u8 op_bytes;
  	u8 ad_bytes;
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  	union {
  		int (*execute)(struct x86_emulate_ctxt *ctxt);
  		fastop_t fop;
  	};
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  	int (*check_perm)(struct x86_emulate_ctxt *ctxt);
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  	/*
  	 * The following six fields are cleared together,
  	 * the rest are initialized unconditionally in x86_decode_insn
  	 * or elsewhere
  	 */
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  	bool rip_relative;
  	u8 rex_prefix;
  	u8 lock_prefix;
  	u8 rep_prefix;
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  	/* bitmaps of registers in _regs[] that can be read */
  	u32 regs_valid;
  	/* bitmaps of registers in _regs[] that have been written */
  	u32 regs_dirty;
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  	/* modrm */
  	u8 modrm;
  	u8 modrm_mod;
  	u8 modrm_reg;
  	u8 modrm_rm;
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  	u8 modrm_seg;
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  	u8 seg_override;
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  	u64 d;
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  	unsigned long _eip;
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  	/* Here begins the usercopy section. */
  	struct operand src;
  	struct operand src2;
  	struct operand dst;
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  	struct operand memop;
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  	unsigned long _regs[NR_VCPU_REGS];
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  	struct operand *memopp;
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  	struct fetch_cache fetch;
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  	struct read_cache io_read;
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  	struct read_cache mem_read;
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  };
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  /* Repeat String Operation Prefix */
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  #define REPE_PREFIX	0xf3
  #define REPNE_PREFIX	0xf2
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  /* CPUID vendors */
  #define X86EMUL_CPUID_VENDOR_AuthenticAMD_ebx 0x68747541
  #define X86EMUL_CPUID_VENDOR_AuthenticAMD_ecx 0x444d4163
  #define X86EMUL_CPUID_VENDOR_AuthenticAMD_edx 0x69746e65
  
  #define X86EMUL_CPUID_VENDOR_AMDisbetterI_ebx 0x69444d41
  #define X86EMUL_CPUID_VENDOR_AMDisbetterI_ecx 0x21726574
  #define X86EMUL_CPUID_VENDOR_AMDisbetterI_edx 0x74656273
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  #define X86EMUL_CPUID_VENDOR_HygonGenuine_ebx 0x6f677948
  #define X86EMUL_CPUID_VENDOR_HygonGenuine_ecx 0x656e6975
  #define X86EMUL_CPUID_VENDOR_HygonGenuine_edx 0x6e65476e
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  #define X86EMUL_CPUID_VENDOR_GenuineIntel_ebx 0x756e6547
  #define X86EMUL_CPUID_VENDOR_GenuineIntel_ecx 0x6c65746e
  #define X86EMUL_CPUID_VENDOR_GenuineIntel_edx 0x49656e69
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  #define X86EMUL_CPUID_VENDOR_CentaurHauls_ebx 0x746e6543
  #define X86EMUL_CPUID_VENDOR_CentaurHauls_ecx 0x736c7561
  #define X86EMUL_CPUID_VENDOR_CentaurHauls_edx 0x48727561
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  static inline bool is_guest_vendor_intel(u32 ebx, u32 ecx, u32 edx)
  {
  	return ebx == X86EMUL_CPUID_VENDOR_GenuineIntel_ebx &&
  	       ecx == X86EMUL_CPUID_VENDOR_GenuineIntel_ecx &&
  	       edx == X86EMUL_CPUID_VENDOR_GenuineIntel_edx;
  }
  
  static inline bool is_guest_vendor_amd(u32 ebx, u32 ecx, u32 edx)
  {
  	return (ebx == X86EMUL_CPUID_VENDOR_AuthenticAMD_ebx &&
  		ecx == X86EMUL_CPUID_VENDOR_AuthenticAMD_ecx &&
  		edx == X86EMUL_CPUID_VENDOR_AuthenticAMD_edx) ||
  	       (ebx == X86EMUL_CPUID_VENDOR_AMDisbetterI_ebx &&
  		ecx == X86EMUL_CPUID_VENDOR_AMDisbetterI_ecx &&
  		edx == X86EMUL_CPUID_VENDOR_AMDisbetterI_edx);
  }
  
  static inline bool is_guest_vendor_hygon(u32 ebx, u32 ecx, u32 edx)
  {
  	return ebx == X86EMUL_CPUID_VENDOR_HygonGenuine_ebx &&
  	       ecx == X86EMUL_CPUID_VENDOR_HygonGenuine_ecx &&
  	       edx == X86EMUL_CPUID_VENDOR_HygonGenuine_edx;
  }
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  enum x86_intercept_stage {
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  	X86_ICTP_NONE = 0,   /* Allow zero-init to not match anything */
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  	X86_ICPT_PRE_EXCEPT,
  	X86_ICPT_POST_EXCEPT,
  	X86_ICPT_POST_MEMACCESS,
  };
  
  enum x86_intercept {
  	x86_intercept_none,
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  	x86_intercept_cr_read,
  	x86_intercept_cr_write,
  	x86_intercept_clts,
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  	x86_intercept_lmsw,
  	x86_intercept_smsw,
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  	x86_intercept_dr_read,
  	x86_intercept_dr_write,
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  	x86_intercept_lidt,
  	x86_intercept_sidt,
  	x86_intercept_lgdt,
  	x86_intercept_sgdt,
  	x86_intercept_lldt,
  	x86_intercept_sldt,
  	x86_intercept_ltr,
  	x86_intercept_str,
  	x86_intercept_rdtsc,
  	x86_intercept_rdpmc,
  	x86_intercept_pushf,
  	x86_intercept_popf,
  	x86_intercept_cpuid,
  	x86_intercept_rsm,
  	x86_intercept_iret,
  	x86_intercept_intn,
  	x86_intercept_invd,
  	x86_intercept_pause,
  	x86_intercept_hlt,
  	x86_intercept_invlpg,
  	x86_intercept_invlpga,
  	x86_intercept_vmrun,
  	x86_intercept_vmload,
  	x86_intercept_vmsave,
  	x86_intercept_vmmcall,
  	x86_intercept_stgi,
  	x86_intercept_clgi,
  	x86_intercept_skinit,
  	x86_intercept_rdtscp,
  	x86_intercept_icebp,
  	x86_intercept_wbinvd,
  	x86_intercept_monitor,
  	x86_intercept_mwait,
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  	x86_intercept_rdmsr,
  	x86_intercept_wrmsr,
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  	x86_intercept_in,
  	x86_intercept_ins,
  	x86_intercept_out,
  	x86_intercept_outs,
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  	x86_intercept_xsetbv,
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  	nr_x86_intercepts
  };
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  /* Host execution mode. */
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  #if defined(CONFIG_X86_32)
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  #define X86EMUL_MODE_HOST X86EMUL_MODE_PROT32
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  #elif defined(CONFIG_X86_64)
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  #define X86EMUL_MODE_HOST X86EMUL_MODE_PROT64
  #endif
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  int x86_decode_insn(struct x86_emulate_ctxt *ctxt, void *insn, int insn_len);
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  bool x86_page_table_writing_insn(struct x86_emulate_ctxt *ctxt);
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  #define EMULATION_FAILED -1
  #define EMULATION_OK 0
  #define EMULATION_RESTART 1
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  #define EMULATION_INTERCEPTED 2
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  void init_decode_cache(struct x86_emulate_ctxt *ctxt);
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  int x86_emulate_insn(struct x86_emulate_ctxt *ctxt);
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  int emulator_task_switch(struct x86_emulate_ctxt *ctxt,
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  			 u16 tss_selector, int idt_index, int reason,
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  			 bool has_error_code, u32 error_code);
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  int emulate_int_real(struct x86_emulate_ctxt *ctxt, int irq);
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  void emulator_invalidate_register_cache(struct x86_emulate_ctxt *ctxt);
  void emulator_writeback_register_cache(struct x86_emulate_ctxt *ctxt);
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  bool emulator_can_use_gpa(struct x86_emulate_ctxt *ctxt);
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  #endif /* _ASM_X86_KVM_X86_EMULATE_H */