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arch/arm/boot/dts/vf610-cosmic.dts 1.99 KB
931398ecd   Matt Porter   ARM: dts: add ini...
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  /*
   * Copyright 2013 Freescale Semiconductor, Inc.
   * Copyright 2013 Linaro Limited
   *
   * This program is free software; you can redistribute it and/or modify
   * it under the terms of the GNU General Public License as published by
   * the Free Software Foundation; either version 2 of the License, or
   * (at your option) any later version.
   */
  
  /dts-v1/;
  #include "vf610.dtsi"
  
  / {
  	model = "PHYTEC Cosmic/Cosmic+ Board";
  	compatible = "phytec,vf610-cosmic", "fsl,vf610";
  
  	chosen {
  		bootargs = "console=ttyLP1,115200";
  	};
  
  	memory {
  		reg = <0x80000000 0x10000000>;
  	};
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  	enet_ext: enet_ext {
  		compatible = "fixed-clock";
  		#clock-cells = <0>;
  		clock-frequency = <50000000>;
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  	};
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  };
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  &clks {
  	clocks = <&sxosc>, <&fxosc>, <&enet_ext>;
  	clock-names = "sxosc", "fxosc", "enet_ext";
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  };
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  &esdhc1 {
  	pinctrl-names = "default";
  	pinctrl-0 = <&pinctrl_esdhc1>;
  	bus-width = <4>;
  	status = "okay";
  };
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  &fec1 {
  	phy-mode = "rmii";
  	pinctrl-names = "default";
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  	pinctrl-0 = <&pinctrl_fec1>;
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  	status = "okay";
  };
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  &iomuxc {
  	vf610-cosmic {
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  		pinctrl_esdhc1: esdhc1grp {
  			fsl,pins = <
  				VF610_PAD_PTA24__ESDHC1_CLK	0x31ef
  				VF610_PAD_PTA25__ESDHC1_CMD	0x31ef
  				VF610_PAD_PTA26__ESDHC1_DAT0	0x31ef
  				VF610_PAD_PTA27__ESDHC1_DAT1	0x31ef
  				VF610_PAD_PTA28__ESDHC1_DATA2	0x31ef
  				VF610_PAD_PTA29__ESDHC1_DAT3	0x31ef
  				VF610_PAD_PTB28__GPIO_98	0x219d
  			>;
  		};
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  		pinctrl_fec1: fec1grp {
  			fsl,pins = <
  				VF610_PAD_PTC9__ENET_RMII1_MDC		0x30d2
  				VF610_PAD_PTC10__ENET_RMII1_MDIO	0x30d3
  				VF610_PAD_PTC11__ENET_RMII1_CRS		0x30d1
aa5fec2db   Cory Tusar   ARM: dts: vf610: ...
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  				VF610_PAD_PTC12__ENET_RMII1_RXD1	0x30d1
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  				VF610_PAD_PTC13__ENET_RMII1_RXD0	0x30d1
  				VF610_PAD_PTC14__ENET_RMII1_RXER	0x30d1
  				VF610_PAD_PTC15__ENET_RMII1_TXD1	0x30d2
  				VF610_PAD_PTC16__ENET_RMII1_TXD0	0x30d2
  				VF610_PAD_PTC17__ENET_RMII1_TXEN	0x30d2
  			>;
  		};
  
  		pinctrl_uart1: uart1grp {
  			fsl,pins = <
  				VF610_PAD_PTB4__UART1_TX		0x21a2
  				VF610_PAD_PTB5__UART1_RX		0x21a1
  			>;
  		};
  	};
  };
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  &uart1 {
  	pinctrl-names = "default";
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  	pinctrl-0 = <&pinctrl_uart1>;
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  	status = "okay";
  };