Eric Lee / smarc-fsl-linux-kernel

Blame view

drivers/ata/ahci_octeon.c 2.62 KB
edit raw normal view history
a2127e400   Aleksey Makarov   libata: support A... 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
 
  /*
   * SATA glue for Cavium Octeon III SOCs.
   *
   *
   * This file is subject to the terms and conditions of the GNU General Public
   * License.  See the file "COPYING" in the main directory of this archive
   * for more details.
   *
   * Copyright (C) 2010-2015 Cavium Networks
   *
   */
  
  #include <linux/module.h>
  #include <linux/dma-mapping.h>
  #include <linux/platform_device.h>
  #include <linux/of_platform.h>
  
  #include <asm/octeon/octeon.h>
  #include <asm/bitfield.h>
  
  #define CVMX_SATA_UCTL_SHIM_CFG		0xE8
  
  #define SATA_UCTL_ENDIAN_MODE_BIG	1
  #define SATA_UCTL_ENDIAN_MODE_LITTLE	0
  #define SATA_UCTL_ENDIAN_MODE_MASK	3
  
  #define SATA_UCTL_DMA_ENDIAN_MODE_SHIFT	8
  #define SATA_UCTL_CSR_ENDIAN_MODE_SHIFT	0
  #define SATA_UCTL_DMA_READ_CMD_SHIFT	12
  
  static int ahci_octeon_probe(struct platform_device *pdev)
  {
  	struct device *dev = &pdev->dev;
  	struct device_node *node = dev->of_node;
  	struct resource *res;
  	void __iomem *base;
  	u64 cfg;
  	int ret;
  
  	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  	if (!res) {
  		dev_err(&pdev->dev, "Platform resource[0] is missing
  ");
  		return -ENODEV;
  	}
  
  	base = devm_ioremap_resource(&pdev->dev, res);
  	if (IS_ERR(base))
  		return PTR_ERR(base);
  
  	cfg = cvmx_readq_csr(base + CVMX_SATA_UCTL_SHIM_CFG);
  
  	cfg &= ~(SATA_UCTL_ENDIAN_MODE_MASK << SATA_UCTL_DMA_ENDIAN_MODE_SHIFT);
  	cfg &= ~(SATA_UCTL_ENDIAN_MODE_MASK << SATA_UCTL_CSR_ENDIAN_MODE_SHIFT);
  
  #ifdef __BIG_ENDIAN
  	cfg |= SATA_UCTL_ENDIAN_MODE_BIG << SATA_UCTL_DMA_ENDIAN_MODE_SHIFT;
  	cfg |= SATA_UCTL_ENDIAN_MODE_BIG << SATA_UCTL_CSR_ENDIAN_MODE_SHIFT;
  #else
  	cfg |= SATA_UCTL_ENDIAN_MODE_LITTLE << SATA_UCTL_DMA_ENDIAN_MODE_SHIFT;
  	cfg |= SATA_UCTL_ENDIAN_MODE_LITTLE << SATA_UCTL_CSR_ENDIAN_MODE_SHIFT;
  #endif
  
  	cfg |= 1 << SATA_UCTL_DMA_READ_CMD_SHIFT;
  
  	cvmx_writeq_csr(base + CVMX_SATA_UCTL_SHIM_CFG, cfg);
  
  	if (!node) {
  		dev_err(dev, "no device node, failed to add octeon sata
  ");
  		return -ENODEV;
  	}
  
  	ret = of_platform_populate(node, NULL, NULL, dev);
  	if (ret) {
  		dev_err(dev, "failed to add ahci-platform core
  ");
  		return ret;
  	}
  
  	return 0;
  }
  
  static int ahci_octeon_remove(struct platform_device *pdev)
  {
  	return 0;
  }
  
  static const struct of_device_id octeon_ahci_match[] = {
  	{ .compatible = "cavium,octeon-7130-sata-uctl", },
  	{},
  };
  MODULE_DEVICE_TABLE(of, octeon_ahci_match);
  
  static struct platform_driver ahci_octeon_driver = {
  	.probe          = ahci_octeon_probe,
  	.remove         = ahci_octeon_remove,
  	.driver         = {
  		.name   = "octeon-ahci",
  		.of_match_table = octeon_ahci_match,
  	},
  };
  
  module_platform_driver(ahci_octeon_driver);
  
  MODULE_LICENSE("GPL");
  MODULE_AUTHOR("Cavium, Inc. <support@cavium.com>");
  MODULE_DESCRIPTION("Cavium Inc. sata config.");