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drivers/clk/sunxi/clk-sun6i-apb0-gates.c 2.66 KB
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  /*
   * Copyright (C) 2014 Free Electrons
   *
   * License Terms: GNU General Public License v2
   * Author: Boris BREZILLON <boris.brezillon@free-electrons.com>
   *
   * Allwinner A31 APB0 clock gates driver
   *
   */
  
  #include <linux/clk-provider.h>
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  #include <linux/init.h>
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  #include <linux/of.h>
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  #include <linux/of_device.h>
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  #include <linux/platform_device.h>
  
  #define SUN6I_APB0_GATES_MAX_SIZE	32
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  struct gates_data {
  	DECLARE_BITMAP(mask, SUN6I_APB0_GATES_MAX_SIZE);
  };
  
  static const struct gates_data sun6i_a31_apb0_gates __initconst = {
  	.mask = {0x7F},
  };
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  static const struct gates_data sun8i_a23_apb0_gates __initconst = {
  	.mask = {0x5D},
  };
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  static const struct of_device_id sun6i_a31_apb0_gates_clk_dt_ids[] = {
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  	{ .compatible = "allwinner,sun6i-a31-apb0-gates-clk", .data = &sun6i_a31_apb0_gates },
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  	{ .compatible = "allwinner,sun8i-a23-apb0-gates-clk", .data = &sun8i_a23_apb0_gates },
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  	{ /* sentinel */ }
  };
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  static int sun6i_a31_apb0_gates_clk_probe(struct platform_device *pdev)
  {
  	struct device_node *np = pdev->dev.of_node;
  	struct clk_onecell_data *clk_data;
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  	const struct of_device_id *device;
  	const struct gates_data *data;
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  	const char *clk_parent;
  	const char *clk_name;
  	struct resource *r;
  	void __iomem *reg;
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  	int ngates;
  	int i;
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  	int j = 0;
  
  	if (!np)
  		return -ENODEV;
  
  	device = of_match_device(sun6i_a31_apb0_gates_clk_dt_ids, &pdev->dev);
  	if (!device)
  		return -ENODEV;
  	data = device->data;
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  	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  	reg = devm_ioremap_resource(&pdev->dev, r);
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  	if (IS_ERR(reg))
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  		return PTR_ERR(reg);
  
  	clk_parent = of_clk_get_parent_name(np, 0);
  	if (!clk_parent)
  		return -EINVAL;
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  	clk_data = devm_kzalloc(&pdev->dev, sizeof(struct clk_onecell_data),
  				GFP_KERNEL);
  	if (!clk_data)
  		return -ENOMEM;
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  	/* Worst-case size approximation and memory allocation */
  	ngates = find_last_bit(data->mask, SUN6I_APB0_GATES_MAX_SIZE);
  	clk_data->clks = devm_kcalloc(&pdev->dev, (ngates + 1),
  				      sizeof(struct clk *), GFP_KERNEL);
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  	if (!clk_data->clks)
  		return -ENOMEM;
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  	for_each_set_bit(i, data->mask, SUN6I_APB0_GATES_MAX_SIZE) {
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  		of_property_read_string_index(np, "clock-output-names",
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  					      j, &clk_name);
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  		clk_data->clks[i] = clk_register_gate(&pdev->dev, clk_name,
  						      clk_parent, 0, reg, i,
  						      0, NULL);
  		WARN_ON(IS_ERR(clk_data->clks[i]));
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  		j++;
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  	}
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  	clk_data->clk_num = ngates + 1;
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  	return of_clk_add_provider(np, of_clk_src_onecell_get, clk_data);
  }
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  static struct platform_driver sun6i_a31_apb0_gates_clk_driver = {
  	.driver = {
  		.name = "sun6i-a31-apb0-gates-clk",
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  		.of_match_table = sun6i_a31_apb0_gates_clk_dt_ids,
  	},
  	.probe = sun6i_a31_apb0_gates_clk_probe,
  };
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  builtin_platform_driver(sun6i_a31_apb0_gates_clk_driver);