Blame view
drivers/hwmon/dme1737.c
77.9 KB
9431996f5 hwmon: New SMSC D... |
1 |
/* |
ea694431f hwmon: (dme1737) ... |
2 3 4 5 |
* dme1737.c - Driver for the SMSC DME1737, Asus A8000, SMSC SCH311x, SCH5027, * and SCH5127 Super-I/O chips integrated hardware monitoring * features. * Copyright (c) 2007, 2008, 2009, 2010 Juerg Haefliger <juergh@gmail.com> |
9431996f5 hwmon: New SMSC D... |
6 |
* |
e95c237d7 hwmon: (dme1737) ... |
7 |
* This driver is an I2C/ISA hybrid, meaning that it uses the I2C bus to access |
549edb833 hwmon: (dme1737) ... |
8 |
* the chip registers if a DME1737, A8000, or SCH5027 is found and the ISA bus |
ea694431f hwmon: (dme1737) ... |
9 10 11 |
* if a SCH311x or SCH5127 chip is found. Both types of chips have very * similar hardware monitoring capabilities but differ in the way they can be * accessed. |
9431996f5 hwmon: New SMSC D... |
12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 |
* * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ |
9c6e13b41 hwmon: (dme1737) ... |
27 |
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
9431996f5 hwmon: New SMSC D... |
28 29 30 31 32 |
#include <linux/module.h> #include <linux/init.h> #include <linux/slab.h> #include <linux/jiffies.h> #include <linux/i2c.h> |
e95c237d7 hwmon: (dme1737) ... |
33 |
#include <linux/platform_device.h> |
9431996f5 hwmon: New SMSC D... |
34 35 36 37 38 |
#include <linux/hwmon.h> #include <linux/hwmon-sysfs.h> #include <linux/hwmon-vid.h> #include <linux/err.h> #include <linux/mutex.h> |
b9acb64a3 hwmon: Check for ... |
39 |
#include <linux/acpi.h> |
6055fae8a hwmon: Include <l... |
40 |
#include <linux/io.h> |
9431996f5 hwmon: New SMSC D... |
41 |
|
e95c237d7 hwmon: (dme1737) ... |
42 43 |
/* ISA device, if found */ static struct platform_device *pdev; |
9431996f5 hwmon: New SMSC D... |
44 |
/* Module load parameters */ |
90ab5ee94 module_param: mak... |
45 |
static bool force_start; |
9431996f5 hwmon: New SMSC D... |
46 47 |
module_param(force_start, bool, 0); MODULE_PARM_DESC(force_start, "Force the chip to start monitoring inputs"); |
67b671bce hwmon: Let the us... |
48 49 50 |
static unsigned short force_id; module_param(force_id, ushort, 0); MODULE_PARM_DESC(force_id, "Override the detected device ID"); |
90ab5ee94 module_param: mak... |
51 |
static bool probe_all_addr; |
92430b6fe hwmon: (dme1737) ... |
52 |
module_param(probe_all_addr, bool, 0); |
b55f37572 hwmon: Fix checkp... |
53 54 |
MODULE_PARM_DESC(probe_all_addr, "Include probing of non-standard LPC addresses"); |
92430b6fe hwmon: (dme1737) ... |
55 |
|
9431996f5 hwmon: New SMSC D... |
56 |
/* Addresses to scan */ |
25e9c86d5 hwmon: normal_i2c... |
57 |
static const unsigned short normal_i2c[] = {0x2c, 0x2d, 0x2e, I2C_CLIENT_END}; |
9431996f5 hwmon: New SMSC D... |
58 |
|
ea694431f hwmon: (dme1737) ... |
59 |
enum chips { dme1737, sch5027, sch311x, sch5127 }; |
9431996f5 hwmon: New SMSC D... |
60 |
|
b55f37572 hwmon: Fix checkp... |
61 |
#define DO_REPORT "Please report to the driver maintainer." |
9431996f5 hwmon: New SMSC D... |
62 63 64 65 66 67 68 69 70 71 72 73 74 75 |
/* --------------------------------------------------------------------- * Registers * * The sensors are defined as follows: * * Voltages Temperatures * -------- ------------ * in0 +5VTR (+5V stdby) temp1 Remote diode 1 * in1 Vccp (proc core) temp2 Internal temp * in2 VCC (internal +3.3V) temp3 Remote diode 2 * in3 +5V * in4 +12V * in5 VTR (+3.3V stby) * in6 Vbat |
d4b94e1fa hwmon: (dme1737) ... |
76 |
* in7 Vtrip (sch5127 only) |
9431996f5 hwmon: New SMSC D... |
77 78 |
* * --------------------------------------------------------------------- */ |
d4b94e1fa hwmon: (dme1737) ... |
79 |
/* Voltages (in) numbered 0-7 (ix) */ |
c8de83624 hwmon: (dme1737) ... |
80 |
#define DME1737_REG_IN(ix) ((ix) < 5 ? 0x20 + (ix) : \ |
d4b94e1fa hwmon: (dme1737) ... |
81 82 |
(ix) < 7 ? 0x94 + (ix) : \ 0x1f) |
c8de83624 hwmon: (dme1737) ... |
83 |
#define DME1737_REG_IN_MIN(ix) ((ix) < 5 ? 0x44 + (ix) * 2 \ |
9431996f5 hwmon: New SMSC D... |
84 |
: 0x91 + (ix) * 2) |
c8de83624 hwmon: (dme1737) ... |
85 |
#define DME1737_REG_IN_MAX(ix) ((ix) < 5 ? 0x45 + (ix) * 2 \ |
9431996f5 hwmon: New SMSC D... |
86 87 88 89 90 91 92 93 |
: 0x92 + (ix) * 2) /* Temperatures (temp) numbered 0-2 (ix) */ #define DME1737_REG_TEMP(ix) (0x25 + (ix)) #define DME1737_REG_TEMP_MIN(ix) (0x4e + (ix) * 2) #define DME1737_REG_TEMP_MAX(ix) (0x4f + (ix) * 2) #define DME1737_REG_TEMP_OFFSET(ix) ((ix) == 0 ? 0x1f \ : 0x1c + (ix)) |
c8de83624 hwmon: (dme1737) ... |
94 95 |
/* * Voltage and temperature LSBs |
9431996f5 hwmon: New SMSC D... |
96 97 98 99 100 |
* The LSBs (4 bits each) are stored in 5 registers with the following layouts: * IN_TEMP_LSB(0) = [in5, in6] * IN_TEMP_LSB(1) = [temp3, temp1] * IN_TEMP_LSB(2) = [in4, temp2] * IN_TEMP_LSB(3) = [in3, in0] |
d4b94e1fa hwmon: (dme1737) ... |
101 |
* IN_TEMP_LSB(4) = [in2, in1] |
c8de83624 hwmon: (dme1737) ... |
102 103 |
* IN_TEMP_LSB(5) = [res, in7] */ |
9431996f5 hwmon: New SMSC D... |
104 |
#define DME1737_REG_IN_TEMP_LSB(ix) (0x84 + (ix)) |
d4b94e1fa hwmon: (dme1737) ... |
105 106 |
static const u8 DME1737_REG_IN_LSB[] = {3, 4, 4, 3, 2, 0, 0, 5}; static const u8 DME1737_REG_IN_LSB_SHL[] = {4, 4, 0, 0, 0, 0, 4, 4}; |
9431996f5 hwmon: New SMSC D... |
107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 |
static const u8 DME1737_REG_TEMP_LSB[] = {1, 2, 1}; static const u8 DME1737_REG_TEMP_LSB_SHL[] = {4, 4, 0}; /* Fans numbered 0-5 (ix) */ #define DME1737_REG_FAN(ix) ((ix) < 4 ? 0x28 + (ix) * 2 \ : 0xa1 + (ix) * 2) #define DME1737_REG_FAN_MIN(ix) ((ix) < 4 ? 0x54 + (ix) * 2 \ : 0xa5 + (ix) * 2) #define DME1737_REG_FAN_OPT(ix) ((ix) < 4 ? 0x90 + (ix) \ : 0xb2 + (ix)) #define DME1737_REG_FAN_MAX(ix) (0xb4 + (ix)) /* only for fan[4-5] */ /* PWMs numbered 0-2, 4-5 (ix) */ #define DME1737_REG_PWM(ix) ((ix) < 3 ? 0x30 + (ix) \ : 0xa1 + (ix)) #define DME1737_REG_PWM_CONFIG(ix) (0x5c + (ix)) /* only for pwm[0-2] */ #define DME1737_REG_PWM_MIN(ix) (0x64 + (ix)) /* only for pwm[0-2] */ #define DME1737_REG_PWM_FREQ(ix) ((ix) < 3 ? 0x5f + (ix) \ : 0xa3 + (ix)) |
c8de83624 hwmon: (dme1737) ... |
126 127 |
/* * The layout of the ramp rate registers is different from the other pwm |
9431996f5 hwmon: New SMSC D... |
128 129 |
* registers. The bits for the 3 PWMs are stored in 2 registers: * PWM_RR(0) = [OFF3, OFF2, OFF1, RES, RR1E, RR1-2, RR1-1, RR1-0] |
c8de83624 hwmon: (dme1737) ... |
130 131 |
* PWM_RR(1) = [RR2E, RR2-2, RR2-1, RR2-0, RR3E, RR3-2, RR3-1, RR3-0] */ |
9431996f5 hwmon: New SMSC D... |
132 133 134 135 136 |
#define DME1737_REG_PWM_RR(ix) (0x62 + (ix)) /* only for pwm[0-2] */ /* Thermal zones 0-2 */ #define DME1737_REG_ZONE_LOW(ix) (0x67 + (ix)) #define DME1737_REG_ZONE_ABS(ix) (0x6a + (ix)) |
c8de83624 hwmon: (dme1737) ... |
137 138 |
/* * The layout of the hysteresis registers is different from the other zone |
9431996f5 hwmon: New SMSC D... |
139 140 |
* registers. The bits for the 3 zones are stored in 2 registers: * ZONE_HYST(0) = [H1-3, H1-2, H1-1, H1-0, H2-3, H2-2, H2-1, H2-0] |
c8de83624 hwmon: (dme1737) ... |
141 142 |
* ZONE_HYST(1) = [H3-3, H3-2, H3-1, H3-0, RES, RES, RES, RES] */ |
9431996f5 hwmon: New SMSC D... |
143 |
#define DME1737_REG_ZONE_HYST(ix) (0x6d + (ix)) |
c8de83624 hwmon: (dme1737) ... |
144 145 |
/* * Alarm registers and bit mapping |
9431996f5 hwmon: New SMSC D... |
146 |
* The 3 8-bit alarm registers will be concatenated to a single 32-bit |
c8de83624 hwmon: (dme1737) ... |
147 148 |
* alarm value [0, ALARM3, ALARM2, ALARM1]. */ |
9431996f5 hwmon: New SMSC D... |
149 150 151 |
#define DME1737_REG_ALARM1 0x41 #define DME1737_REG_ALARM2 0x42 #define DME1737_REG_ALARM3 0x83 |
d4b94e1fa hwmon: (dme1737) ... |
152 |
static const u8 DME1737_BIT_ALARM_IN[] = {0, 1, 2, 3, 8, 16, 17, 18}; |
9431996f5 hwmon: New SMSC D... |
153 154 155 156 |
static const u8 DME1737_BIT_ALARM_TEMP[] = {4, 5, 6}; static const u8 DME1737_BIT_ALARM_FAN[] = {10, 11, 12, 13, 22, 23}; /* Miscellaneous registers */ |
e95c237d7 hwmon: (dme1737) ... |
157 |
#define DME1737_REG_DEVICE 0x3d |
9431996f5 hwmon: New SMSC D... |
158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 |
#define DME1737_REG_COMPANY 0x3e #define DME1737_REG_VERSTEP 0x3f #define DME1737_REG_CONFIG 0x40 #define DME1737_REG_CONFIG2 0x7f #define DME1737_REG_VID 0x43 #define DME1737_REG_TACH_PWM 0x81 /* --------------------------------------------------------------------- * Misc defines * --------------------------------------------------------------------- */ /* Chip identification */ #define DME1737_COMPANY_SMSC 0x5c #define DME1737_VERSTEP 0x88 #define DME1737_VERSTEP_MASK 0xf8 |
e95c237d7 hwmon: (dme1737) ... |
173 |
#define SCH311X_DEVICE 0x8c |
549edb833 hwmon: (dme1737) ... |
174 |
#define SCH5027_VERSTEP 0x69 |
ea694431f hwmon: (dme1737) ... |
175 176 177 178 179 180 181 182 183 184 |
#define SCH5127_DEVICE 0x8e /* Device ID values (global configuration register index 0x20) */ #define DME1737_ID_1 0x77 #define DME1737_ID_2 0x78 #define SCH3112_ID 0x7c #define SCH3114_ID 0x7d #define SCH3116_ID 0x7f #define SCH5027_ID 0x89 #define SCH5127_ID 0x86 |
e95c237d7 hwmon: (dme1737) ... |
185 186 187 |
/* Length of ISA address segment */ #define DME1737_EXTENT 2 |
9431996f5 hwmon: New SMSC D... |
188 |
|
ea694431f hwmon: (dme1737) ... |
189 190 191 192 193 194 195 196 |
/* chip-dependent features */ #define HAS_TEMP_OFFSET (1 << 0) /* bit 0 */ #define HAS_VID (1 << 1) /* bit 1 */ #define HAS_ZONE3 (1 << 2) /* bit 2 */ #define HAS_ZONE_HYST (1 << 3) /* bit 3 */ #define HAS_PWM_MIN (1 << 4) /* bit 4 */ #define HAS_FAN(ix) (1 << ((ix) + 5)) /* bits 5-10 */ #define HAS_PWM(ix) (1 << ((ix) + 11)) /* bits 11-16 */ |
d4b94e1fa hwmon: (dme1737) ... |
197 |
#define HAS_IN7 (1 << 17) /* bit 17 */ |
ea694431f hwmon: (dme1737) ... |
198 |
|
9431996f5 hwmon: New SMSC D... |
199 200 201 202 203 |
/* --------------------------------------------------------------------- * Data structures and manipulation thereof * --------------------------------------------------------------------- */ struct dme1737_data { |
dbc2bc251 hwmon: (dme1737) ... |
204 |
struct i2c_client *client; /* for I2C devices only */ |
1beeffe43 hwmon: Convert fr... |
205 |
struct device *hwmon_dev; |
dbc2bc251 hwmon: (dme1737) ... |
206 207 |
const char *name; unsigned int addr; /* for ISA devices only */ |
9431996f5 hwmon: New SMSC D... |
208 209 210 211 212 |
struct mutex update_lock; int valid; /* !=0 if following fields are valid */ unsigned long last_update; /* in jiffies */ unsigned long last_vbat; /* in jiffies */ |
f994fb23d hwmon: (dme1737) ... |
213 |
enum chips type; |
549edb833 hwmon: (dme1737) ... |
214 |
const int *in_nominal; /* pointer to IN_NOMINAL array */ |
9431996f5 hwmon: New SMSC D... |
215 216 217 |
u8 vid; u8 pwm_rr_en; |
ea694431f hwmon: (dme1737) ... |
218 |
u32 has_features; |
9431996f5 hwmon: New SMSC D... |
219 220 |
/* Register values */ |
d4b94e1fa hwmon: (dme1737) ... |
221 222 223 |
u16 in[8]; u8 in_min[8]; u8 in_max[8]; |
9431996f5 hwmon: New SMSC D... |
224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 |
s16 temp[3]; s8 temp_min[3]; s8 temp_max[3]; s8 temp_offset[3]; u8 config; u8 config2; u8 vrm; u16 fan[6]; u16 fan_min[6]; u8 fan_max[2]; u8 fan_opt[6]; u8 pwm[6]; u8 pwm_min[3]; u8 pwm_config[3]; u8 pwm_acz[3]; u8 pwm_freq[6]; u8 pwm_rr[2]; |
d58e47d78 hwmon: (dme1737) ... |
241 242 |
s8 zone_low[3]; s8 zone_abs[3]; |
9431996f5 hwmon: New SMSC D... |
243 244 245 246 247 |
u8 zone_hyst[2]; u32 alarms; }; /* Nominal voltage values */ |
f994fb23d hwmon: (dme1737) ... |
248 249 250 251 |
static const int IN_NOMINAL_DME1737[] = {5000, 2250, 3300, 5000, 12000, 3300, 3300}; static const int IN_NOMINAL_SCH311x[] = {2500, 1500, 3300, 5000, 12000, 3300, 3300}; |
549edb833 hwmon: (dme1737) ... |
252 253 |
static const int IN_NOMINAL_SCH5027[] = {5000, 2250, 3300, 1125, 1125, 3300, 3300}; |
ea694431f hwmon: (dme1737) ... |
254 |
static const int IN_NOMINAL_SCH5127[] = {2500, 2250, 3300, 1125, 1125, 3300, |
d4b94e1fa hwmon: (dme1737) ... |
255 |
3300, 1500}; |
549edb833 hwmon: (dme1737) ... |
256 257 |
#define IN_NOMINAL(type) ((type) == sch311x ? IN_NOMINAL_SCH311x : \ (type) == sch5027 ? IN_NOMINAL_SCH5027 : \ |
ea694431f hwmon: (dme1737) ... |
258 |
(type) == sch5127 ? IN_NOMINAL_SCH5127 : \ |
549edb833 hwmon: (dme1737) ... |
259 |
IN_NOMINAL_DME1737) |
9431996f5 hwmon: New SMSC D... |
260 |
|
c8de83624 hwmon: (dme1737) ... |
261 262 |
/* * Voltage input |
9431996f5 hwmon: New SMSC D... |
263 |
* Voltage inputs have 16 bits resolution, limit values have 8 bits |
c8de83624 hwmon: (dme1737) ... |
264 265 |
* resolution. */ |
549edb833 hwmon: (dme1737) ... |
266 |
static inline int IN_FROM_REG(int reg, int nominal, int res) |
9431996f5 hwmon: New SMSC D... |
267 |
{ |
549edb833 hwmon: (dme1737) ... |
268 |
return (reg * nominal + (3 << (res - 3))) / (3 << (res - 2)); |
9431996f5 hwmon: New SMSC D... |
269 |
} |
d58e47d78 hwmon: (dme1737) ... |
270 |
static inline int IN_TO_REG(long val, int nominal) |
9431996f5 hwmon: New SMSC D... |
271 |
{ |
2a844c148 hwmon: Replace SE... |
272 |
return clamp_val((val * 192 + nominal / 2) / nominal, 0, 255); |
9431996f5 hwmon: New SMSC D... |
273 |
} |
c8de83624 hwmon: (dme1737) ... |
274 275 |
/* * Temperature input |
9431996f5 hwmon: New SMSC D... |
276 277 |
* The register values represent temperatures in 2's complement notation from * -127 degrees C to +127 degrees C. Temp inputs have 16 bits resolution, limit |
c8de83624 hwmon: (dme1737) ... |
278 279 |
* values have 8 bits resolution. */ |
9431996f5 hwmon: New SMSC D... |
280 281 282 283 |
static inline int TEMP_FROM_REG(int reg, int res) { return (reg * 1000) >> (res - 8); } |
d58e47d78 hwmon: (dme1737) ... |
284 |
static inline int TEMP_TO_REG(long val) |
9431996f5 hwmon: New SMSC D... |
285 |
{ |
2a844c148 hwmon: Replace SE... |
286 |
return clamp_val((val < 0 ? val - 500 : val + 500) / 1000, -128, 127); |
9431996f5 hwmon: New SMSC D... |
287 288 289 290 291 292 293 294 295 296 297 |
} /* Temperature range */ static const int TEMP_RANGE[] = {2000, 2500, 3333, 4000, 5000, 6666, 8000, 10000, 13333, 16000, 20000, 26666, 32000, 40000, 53333, 80000}; static inline int TEMP_RANGE_FROM_REG(int reg) { return TEMP_RANGE[(reg >> 4) & 0x0f]; } |
d58e47d78 hwmon: (dme1737) ... |
298 |
static int TEMP_RANGE_TO_REG(long val, int reg) |
9431996f5 hwmon: New SMSC D... |
299 300 301 302 |
{ int i; for (i = 15; i > 0; i--) { |
c8de83624 hwmon: (dme1737) ... |
303 |
if (val > (TEMP_RANGE[i] + TEMP_RANGE[i - 1] + 1) / 2) |
9431996f5 hwmon: New SMSC D... |
304 |
break; |
9431996f5 hwmon: New SMSC D... |
305 306 307 308 |
} return (reg & 0x0f) | (i << 4); } |
c8de83624 hwmon: (dme1737) ... |
309 310 |
/* * Temperature hysteresis |
9431996f5 hwmon: New SMSC D... |
311 312 |
* Register layout: * reg[0] = [H1-3, H1-2, H1-1, H1-0, H2-3, H2-2, H2-1, H2-0] |
c8de83624 hwmon: (dme1737) ... |
313 314 |
* reg[1] = [H3-3, H3-2, H3-1, H3-0, xxxx, xxxx, xxxx, xxxx] */ |
9431996f5 hwmon: New SMSC D... |
315 316 317 318 |
static inline int TEMP_HYST_FROM_REG(int reg, int ix) { return (((ix == 1) ? reg : reg >> 4) & 0x0f) * 1000; } |
d58e47d78 hwmon: (dme1737) ... |
319 |
static inline int TEMP_HYST_TO_REG(long val, int ix, int reg) |
9431996f5 hwmon: New SMSC D... |
320 |
{ |
2a844c148 hwmon: Replace SE... |
321 |
int hyst = clamp_val((val + 500) / 1000, 0, 15); |
9431996f5 hwmon: New SMSC D... |
322 323 324 325 326 327 328 |
return (ix == 1) ? (reg & 0xf0) | hyst : (reg & 0x0f) | (hyst << 4); } /* Fan input RPM */ static inline int FAN_FROM_REG(int reg, int tpc) { |
c8de83624 hwmon: (dme1737) ... |
329 |
if (tpc) |
ff8421f73 hwmon: (dme1737) ... |
330 |
return tpc * reg; |
c8de83624 hwmon: (dme1737) ... |
331 |
else |
ff8421f73 hwmon: (dme1737) ... |
332 |
return (reg == 0 || reg == 0xffff) ? 0 : 90000 * 60 / reg; |
9431996f5 hwmon: New SMSC D... |
333 |
} |
d58e47d78 hwmon: (dme1737) ... |
334 |
static inline int FAN_TO_REG(long val, int tpc) |
9431996f5 hwmon: New SMSC D... |
335 |
{ |
ff8421f73 hwmon: (dme1737) ... |
336 |
if (tpc) { |
2a844c148 hwmon: Replace SE... |
337 |
return clamp_val(val / tpc, 0, 0xffff); |
ff8421f73 hwmon: (dme1737) ... |
338 339 |
} else { return (val <= 0) ? 0xffff : |
2a844c148 hwmon: Replace SE... |
340 |
clamp_val(90000 * 60 / val, 0, 0xfffe); |
ff8421f73 hwmon: (dme1737) ... |
341 |
} |
9431996f5 hwmon: New SMSC D... |
342 |
} |
c8de83624 hwmon: (dme1737) ... |
343 344 |
/* * Fan TPC (tach pulse count) |
9431996f5 hwmon: New SMSC D... |
345 |
* Converts a register value to a TPC multiplier or returns 0 if the tachometer |
c8de83624 hwmon: (dme1737) ... |
346 347 |
* is configured in legacy (non-tpc) mode */ |
9431996f5 hwmon: New SMSC D... |
348 349 350 351 |
static inline int FAN_TPC_FROM_REG(int reg) { return (reg & 0x20) ? 0 : 60 >> (reg & 0x03); } |
c8de83624 hwmon: (dme1737) ... |
352 353 |
/* * Fan type |
9431996f5 hwmon: New SMSC D... |
354 |
* The type of a fan is expressed in number of pulses-per-revolution that it |
c8de83624 hwmon: (dme1737) ... |
355 356 |
* emits */ |
9431996f5 hwmon: New SMSC D... |
357 358 359 360 361 362 |
static inline int FAN_TYPE_FROM_REG(int reg) { int edge = (reg >> 1) & 0x03; return (edge > 0) ? 1 << (edge - 1) : 0; } |
d58e47d78 hwmon: (dme1737) ... |
363 |
static inline int FAN_TYPE_TO_REG(long val, int reg) |
9431996f5 hwmon: New SMSC D... |
364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 |
{ int edge = (val == 4) ? 3 : val; return (reg & 0xf9) | (edge << 1); } /* Fan max RPM */ static const int FAN_MAX[] = {0x54, 0x38, 0x2a, 0x21, 0x1c, 0x18, 0x15, 0x12, 0x11, 0x0f, 0x0e}; static int FAN_MAX_FROM_REG(int reg) { int i; for (i = 10; i > 0; i--) { |
c8de83624 hwmon: (dme1737) ... |
379 |
if (reg == FAN_MAX[i]) |
9431996f5 hwmon: New SMSC D... |
380 |
break; |
9431996f5 hwmon: New SMSC D... |
381 382 383 384 |
} return 1000 + i * 500; } |
d58e47d78 hwmon: (dme1737) ... |
385 |
static int FAN_MAX_TO_REG(long val) |
9431996f5 hwmon: New SMSC D... |
386 387 388 389 |
{ int i; for (i = 10; i > 0; i--) { |
c8de83624 hwmon: (dme1737) ... |
390 |
if (val > (1000 + (i - 1) * 500)) |
9431996f5 hwmon: New SMSC D... |
391 |
break; |
9431996f5 hwmon: New SMSC D... |
392 393 394 395 |
} return FAN_MAX[i]; } |
c8de83624 hwmon: (dme1737) ... |
396 397 |
/* * PWM enable |
9431996f5 hwmon: New SMSC D... |
398 399 400 401 402 403 404 405 |
* Register to enable mapping: * 000: 2 fan on zone 1 auto * 001: 2 fan on zone 2 auto * 010: 2 fan on zone 3 auto * 011: 0 fan full on * 100: -1 fan disabled * 101: 2 fan on hottest of zones 2,3 auto * 110: 2 fan on hottest of zones 1,2,3 auto |
c8de83624 hwmon: (dme1737) ... |
406 407 |
* 111: 1 fan in manual mode */ |
9431996f5 hwmon: New SMSC D... |
408 409 410 411 412 413 414 415 416 417 418 419 420 |
static inline int PWM_EN_FROM_REG(int reg) { static const int en[] = {2, 2, 2, 0, -1, 2, 2, 1}; return en[(reg >> 5) & 0x07]; } static inline int PWM_EN_TO_REG(int val, int reg) { int en = (val == 1) ? 7 : 3; return (reg & 0x1f) | ((en & 0x07) << 5); } |
c8de83624 hwmon: (dme1737) ... |
421 422 |
/* * PWM auto channels zone |
9431996f5 hwmon: New SMSC D... |
423 424 425 426 427 428 429 430 431 |
* Register to auto channels zone mapping (ACZ is a bitfield with bit x * corresponding to zone x+1): * 000: 001 fan on zone 1 auto * 001: 010 fan on zone 2 auto * 010: 100 fan on zone 3 auto * 011: 000 fan full on * 100: 000 fan disabled * 101: 110 fan on hottest of zones 2,3 auto * 110: 111 fan on hottest of zones 1,2,3 auto |
c8de83624 hwmon: (dme1737) ... |
432 433 |
* 111: 000 fan in manual mode */ |
9431996f5 hwmon: New SMSC D... |
434 435 436 437 438 439 |
static inline int PWM_ACZ_FROM_REG(int reg) { static const int acz[] = {1, 2, 4, 0, 0, 6, 7, 0}; return acz[(reg >> 5) & 0x07]; } |
d58e47d78 hwmon: (dme1737) ... |
440 |
static inline int PWM_ACZ_TO_REG(long val, int reg) |
9431996f5 hwmon: New SMSC D... |
441 442 443 444 445 446 447 448 449 450 451 452 453 454 |
{ int acz = (val == 4) ? 2 : val - 1; return (reg & 0x1f) | ((acz & 0x07) << 5); } /* PWM frequency */ static const int PWM_FREQ[] = {11, 15, 22, 29, 35, 44, 59, 88, 15000, 20000, 30000, 25000, 0, 0, 0, 0}; static inline int PWM_FREQ_FROM_REG(int reg) { return PWM_FREQ[reg & 0x0f]; } |
d58e47d78 hwmon: (dme1737) ... |
455 |
static int PWM_FREQ_TO_REG(long val, int reg) |
9431996f5 hwmon: New SMSC D... |
456 457 458 459 460 461 462 463 464 465 |
{ int i; /* the first two cases are special - stupid chip design! */ if (val > 27500) { i = 10; } else if (val > 22500) { i = 11; } else { for (i = 9; i > 0; i--) { |
c8de83624 hwmon: (dme1737) ... |
466 |
if (val > (PWM_FREQ[i] + PWM_FREQ[i - 1] + 1) / 2) |
9431996f5 hwmon: New SMSC D... |
467 |
break; |
9431996f5 hwmon: New SMSC D... |
468 469 470 471 472 |
} } return (reg & 0xf0) | i; } |
c8de83624 hwmon: (dme1737) ... |
473 474 |
/* * PWM ramp rate |
9431996f5 hwmon: New SMSC D... |
475 476 |
* Register layout: * reg[0] = [OFF3, OFF2, OFF1, RES, RR1-E, RR1-2, RR1-1, RR1-0] |
c8de83624 hwmon: (dme1737) ... |
477 478 |
* reg[1] = [RR2-E, RR2-2, RR2-1, RR2-0, RR3-E, RR3-2, RR3-1, RR3-0] */ |
9431996f5 hwmon: New SMSC D... |
479 480 481 482 483 484 485 486 |
static const u8 PWM_RR[] = {206, 104, 69, 41, 26, 18, 10, 5}; static inline int PWM_RR_FROM_REG(int reg, int ix) { int rr = (ix == 1) ? reg >> 4 : reg; return (rr & 0x08) ? PWM_RR[rr & 0x07] : 0; } |
d58e47d78 hwmon: (dme1737) ... |
487 |
static int PWM_RR_TO_REG(long val, int ix, int reg) |
9431996f5 hwmon: New SMSC D... |
488 489 490 491 |
{ int i; for (i = 0; i < 7; i++) { |
c8de83624 hwmon: (dme1737) ... |
492 |
if (val > (PWM_RR[i] + PWM_RR[i + 1] + 1) / 2) |
9431996f5 hwmon: New SMSC D... |
493 |
break; |
9431996f5 hwmon: New SMSC D... |
494 495 496 497 498 499 500 501 502 503 |
} return (ix == 1) ? (reg & 0x8f) | (i << 4) : (reg & 0xf8) | i; } /* PWM ramp rate enable */ static inline int PWM_RR_EN_FROM_REG(int reg, int ix) { return PWM_RR_FROM_REG(reg, ix) ? 1 : 0; } |
d58e47d78 hwmon: (dme1737) ... |
504 |
static inline int PWM_RR_EN_TO_REG(long val, int ix, int reg) |
9431996f5 hwmon: New SMSC D... |
505 506 507 508 509 |
{ int en = (ix == 1) ? 0x80 : 0x08; return val ? reg | en : reg & ~en; } |
c8de83624 hwmon: (dme1737) ... |
510 511 |
/* * PWM min/off |
9431996f5 hwmon: New SMSC D... |
512 |
* The PWM min/off bits are part of the PMW ramp rate register 0 (see above for |
c8de83624 hwmon: (dme1737) ... |
513 514 |
* the register layout). */ |
9431996f5 hwmon: New SMSC D... |
515 516 517 518 519 520 521 522 523 524 525 526 |
static inline int PWM_OFF_FROM_REG(int reg, int ix) { return (reg >> (ix + 5)) & 0x01; } static inline int PWM_OFF_TO_REG(int val, int ix, int reg) { return (reg & ~(1 << (ix + 5))) | ((val & 0x01) << (ix + 5)); } /* --------------------------------------------------------------------- * Device I/O access |
e95c237d7 hwmon: (dme1737) ... |
527 528 529 530 531 |
* * ISA access is performed through an index/data register pair and needs to * be protected by a mutex during runtime (not required for initialization). * We use data->update_lock for this and need to ensure that we acquire it * before calling dme1737_read or dme1737_write. |
9431996f5 hwmon: New SMSC D... |
532 |
* --------------------------------------------------------------------- */ |
dbc2bc251 hwmon: (dme1737) ... |
533 |
static u8 dme1737_read(const struct dme1737_data *data, u8 reg) |
9431996f5 hwmon: New SMSC D... |
534 |
{ |
dbc2bc251 hwmon: (dme1737) ... |
535 |
struct i2c_client *client = data->client; |
e95c237d7 hwmon: (dme1737) ... |
536 |
s32 val; |
9431996f5 hwmon: New SMSC D... |
537 |
|
dbc2bc251 hwmon: (dme1737) ... |
538 |
if (client) { /* I2C device */ |
e95c237d7 hwmon: (dme1737) ... |
539 540 541 |
val = i2c_smbus_read_byte_data(client, reg); if (val < 0) { |
b55f37572 hwmon: Fix checkp... |
542 543 544 545 |
dev_warn(&client->dev, "Read from register 0x%02x failed! %s ", reg, DO_REPORT); |
e95c237d7 hwmon: (dme1737) ... |
546 547 |
} } else { /* ISA device */ |
dbc2bc251 hwmon: (dme1737) ... |
548 549 |
outb(reg, data->addr); val = inb(data->addr + 1); |
9431996f5 hwmon: New SMSC D... |
550 551 552 553 |
} return val; } |
dbc2bc251 hwmon: (dme1737) ... |
554 |
static s32 dme1737_write(const struct dme1737_data *data, u8 reg, u8 val) |
9431996f5 hwmon: New SMSC D... |
555 |
{ |
dbc2bc251 hwmon: (dme1737) ... |
556 |
struct i2c_client *client = data->client; |
e95c237d7 hwmon: (dme1737) ... |
557 |
s32 res = 0; |
dbc2bc251 hwmon: (dme1737) ... |
558 |
if (client) { /* I2C device */ |
e95c237d7 hwmon: (dme1737) ... |
559 |
res = i2c_smbus_write_byte_data(client, reg, val); |
9431996f5 hwmon: New SMSC D... |
560 |
|
e95c237d7 hwmon: (dme1737) ... |
561 |
if (res < 0) { |
b55f37572 hwmon: Fix checkp... |
562 563 564 565 |
dev_warn(&client->dev, "Write to register 0x%02x failed! %s ", reg, DO_REPORT); |
e95c237d7 hwmon: (dme1737) ... |
566 567 |
} } else { /* ISA device */ |
dbc2bc251 hwmon: (dme1737) ... |
568 569 |
outb(reg, data->addr); outb(val, data->addr + 1); |
9431996f5 hwmon: New SMSC D... |
570 571 572 573 574 575 576 |
} return res; } static struct dme1737_data *dme1737_update_device(struct device *dev) { |
b237eb25d hwmon: (dme1737) ... |
577 |
struct dme1737_data *data = dev_get_drvdata(dev); |
9431996f5 hwmon: New SMSC D... |
578 |
int ix; |
d4b94e1fa hwmon: (dme1737) ... |
579 |
u8 lsb[6]; |
9431996f5 hwmon: New SMSC D... |
580 581 582 583 584 |
mutex_lock(&data->update_lock); /* Enable a Vbat monitoring cycle every 10 mins */ if (time_after(jiffies, data->last_vbat + 600 * HZ) || !data->valid) { |
dbc2bc251 hwmon: (dme1737) ... |
585 |
dme1737_write(data, DME1737_REG_CONFIG, dme1737_read(data, |
9431996f5 hwmon: New SMSC D... |
586 587 588 589 590 591 |
DME1737_REG_CONFIG) | 0x10); data->last_vbat = jiffies; } /* Sample register contents every 1 sec */ if (time_after(jiffies, data->last_update + HZ) || !data->valid) { |
ea694431f hwmon: (dme1737) ... |
592 |
if (data->has_features & HAS_VID) { |
dbc2bc251 hwmon: (dme1737) ... |
593 |
data->vid = dme1737_read(data, DME1737_REG_VID) & |
549edb833 hwmon: (dme1737) ... |
594 595 |
0x3f; } |
9431996f5 hwmon: New SMSC D... |
596 597 598 |
/* In (voltage) registers */ for (ix = 0; ix < ARRAY_SIZE(data->in); ix++) { |
c8de83624 hwmon: (dme1737) ... |
599 600 |
/* * Voltage inputs are stored as 16 bit values even |
9431996f5 hwmon: New SMSC D... |
601 |
* though they have only 12 bits resolution. This is |
c8de83624 hwmon: (dme1737) ... |
602 603 604 |
* to make it consistent with the temp inputs. */ if (ix == 7 && !(data->has_features & HAS_IN7)) |
d4b94e1fa hwmon: (dme1737) ... |
605 |
continue; |
dbc2bc251 hwmon: (dme1737) ... |
606 |
data->in[ix] = dme1737_read(data, |
9431996f5 hwmon: New SMSC D... |
607 |
DME1737_REG_IN(ix)) << 8; |
dbc2bc251 hwmon: (dme1737) ... |
608 |
data->in_min[ix] = dme1737_read(data, |
9431996f5 hwmon: New SMSC D... |
609 |
DME1737_REG_IN_MIN(ix)); |
dbc2bc251 hwmon: (dme1737) ... |
610 |
data->in_max[ix] = dme1737_read(data, |
9431996f5 hwmon: New SMSC D... |
611 612 613 614 615 |
DME1737_REG_IN_MAX(ix)); } /* Temp registers */ for (ix = 0; ix < ARRAY_SIZE(data->temp); ix++) { |
c8de83624 hwmon: (dme1737) ... |
616 617 |
/* * Temp inputs are stored as 16 bit values even |
9431996f5 hwmon: New SMSC D... |
618 619 620 |
* though they have only 12 bits resolution. This is * to take advantage of implicit conversions between * register values (2's complement) and temp values |
c8de83624 hwmon: (dme1737) ... |
621 622 |
* (signed decimal). */ |
dbc2bc251 hwmon: (dme1737) ... |
623 |
data->temp[ix] = dme1737_read(data, |
9431996f5 hwmon: New SMSC D... |
624 |
DME1737_REG_TEMP(ix)) << 8; |
dbc2bc251 hwmon: (dme1737) ... |
625 |
data->temp_min[ix] = dme1737_read(data, |
9431996f5 hwmon: New SMSC D... |
626 |
DME1737_REG_TEMP_MIN(ix)); |
dbc2bc251 hwmon: (dme1737) ... |
627 |
data->temp_max[ix] = dme1737_read(data, |
9431996f5 hwmon: New SMSC D... |
628 |
DME1737_REG_TEMP_MAX(ix)); |
ea694431f hwmon: (dme1737) ... |
629 |
if (data->has_features & HAS_TEMP_OFFSET) { |
dbc2bc251 hwmon: (dme1737) ... |
630 |
data->temp_offset[ix] = dme1737_read(data, |
549edb833 hwmon: (dme1737) ... |
631 632 |
DME1737_REG_TEMP_OFFSET(ix)); } |
9431996f5 hwmon: New SMSC D... |
633 |
} |
c8de83624 hwmon: (dme1737) ... |
634 635 |
/* * In and temp LSB registers |
9431996f5 hwmon: New SMSC D... |
636 637 |
* The LSBs are latched when the MSBs are read, so the order in * which the registers are read (MSB first, then LSB) is |
c8de83624 hwmon: (dme1737) ... |
638 639 |
* important! */ |
9431996f5 hwmon: New SMSC D... |
640 |
for (ix = 0; ix < ARRAY_SIZE(lsb); ix++) { |
c8de83624 hwmon: (dme1737) ... |
641 |
if (ix == 5 && !(data->has_features & HAS_IN7)) |
d4b94e1fa hwmon: (dme1737) ... |
642 |
continue; |
dbc2bc251 hwmon: (dme1737) ... |
643 |
lsb[ix] = dme1737_read(data, |
9431996f5 hwmon: New SMSC D... |
644 645 646 |
DME1737_REG_IN_TEMP_LSB(ix)); } for (ix = 0; ix < ARRAY_SIZE(data->in); ix++) { |
c8de83624 hwmon: (dme1737) ... |
647 |
if (ix == 7 && !(data->has_features & HAS_IN7)) |
d4b94e1fa hwmon: (dme1737) ... |
648 |
continue; |
9431996f5 hwmon: New SMSC D... |
649 650 651 652 653 654 655 656 657 658 |
data->in[ix] |= (lsb[DME1737_REG_IN_LSB[ix]] << DME1737_REG_IN_LSB_SHL[ix]) & 0xf0; } for (ix = 0; ix < ARRAY_SIZE(data->temp); ix++) { data->temp[ix] |= (lsb[DME1737_REG_TEMP_LSB[ix]] << DME1737_REG_TEMP_LSB_SHL[ix]) & 0xf0; } /* Fan registers */ for (ix = 0; ix < ARRAY_SIZE(data->fan); ix++) { |
c8de83624 hwmon: (dme1737) ... |
659 660 661 662 663 |
/* * Skip reading registers if optional fans are not * present */ if (!(data->has_features & HAS_FAN(ix))) |
9431996f5 hwmon: New SMSC D... |
664 |
continue; |
dbc2bc251 hwmon: (dme1737) ... |
665 |
data->fan[ix] = dme1737_read(data, |
9431996f5 hwmon: New SMSC D... |
666 |
DME1737_REG_FAN(ix)); |
dbc2bc251 hwmon: (dme1737) ... |
667 |
data->fan[ix] |= dme1737_read(data, |
9431996f5 hwmon: New SMSC D... |
668 |
DME1737_REG_FAN(ix) + 1) << 8; |
dbc2bc251 hwmon: (dme1737) ... |
669 |
data->fan_min[ix] = dme1737_read(data, |
9431996f5 hwmon: New SMSC D... |
670 |
DME1737_REG_FAN_MIN(ix)); |
dbc2bc251 hwmon: (dme1737) ... |
671 |
data->fan_min[ix] |= dme1737_read(data, |
9431996f5 hwmon: New SMSC D... |
672 |
DME1737_REG_FAN_MIN(ix) + 1) << 8; |
dbc2bc251 hwmon: (dme1737) ... |
673 |
data->fan_opt[ix] = dme1737_read(data, |
9431996f5 hwmon: New SMSC D... |
674 675 676 |
DME1737_REG_FAN_OPT(ix)); /* fan_max exists only for fan[5-6] */ if (ix > 3) { |
dbc2bc251 hwmon: (dme1737) ... |
677 |
data->fan_max[ix - 4] = dme1737_read(data, |
9431996f5 hwmon: New SMSC D... |
678 679 680 681 682 683 |
DME1737_REG_FAN_MAX(ix)); } } /* PWM registers */ for (ix = 0; ix < ARRAY_SIZE(data->pwm); ix++) { |
c8de83624 hwmon: (dme1737) ... |
684 685 686 687 688 |
/* * Skip reading registers if optional PWMs are not * present */ if (!(data->has_features & HAS_PWM(ix))) |
9431996f5 hwmon: New SMSC D... |
689 |
continue; |
dbc2bc251 hwmon: (dme1737) ... |
690 |
data->pwm[ix] = dme1737_read(data, |
9431996f5 hwmon: New SMSC D... |
691 |
DME1737_REG_PWM(ix)); |
dbc2bc251 hwmon: (dme1737) ... |
692 |
data->pwm_freq[ix] = dme1737_read(data, |
9431996f5 hwmon: New SMSC D... |
693 694 695 |
DME1737_REG_PWM_FREQ(ix)); /* pwm_config and pwm_min exist only for pwm[1-3] */ if (ix < 3) { |
dbc2bc251 hwmon: (dme1737) ... |
696 |
data->pwm_config[ix] = dme1737_read(data, |
9431996f5 hwmon: New SMSC D... |
697 |
DME1737_REG_PWM_CONFIG(ix)); |
dbc2bc251 hwmon: (dme1737) ... |
698 |
data->pwm_min[ix] = dme1737_read(data, |
9431996f5 hwmon: New SMSC D... |
699 700 701 702 |
DME1737_REG_PWM_MIN(ix)); } } for (ix = 0; ix < ARRAY_SIZE(data->pwm_rr); ix++) { |
dbc2bc251 hwmon: (dme1737) ... |
703 |
data->pwm_rr[ix] = dme1737_read(data, |
9431996f5 hwmon: New SMSC D... |
704 705 706 707 708 |
DME1737_REG_PWM_RR(ix)); } /* Thermal zone registers */ for (ix = 0; ix < ARRAY_SIZE(data->zone_low); ix++) { |
ea694431f hwmon: (dme1737) ... |
709 |
/* Skip reading registers if zone3 is not present */ |
c8de83624 hwmon: (dme1737) ... |
710 |
if ((ix == 2) && !(data->has_features & HAS_ZONE3)) |
ea694431f hwmon: (dme1737) ... |
711 |
continue; |
ea694431f hwmon: (dme1737) ... |
712 713 714 715 716 717 718 719 720 721 722 723 |
/* sch5127 zone2 registers are special */ if ((ix == 1) && (data->type == sch5127)) { data->zone_low[1] = dme1737_read(data, DME1737_REG_ZONE_LOW(2)); data->zone_abs[1] = dme1737_read(data, DME1737_REG_ZONE_ABS(2)); } else { data->zone_low[ix] = dme1737_read(data, DME1737_REG_ZONE_LOW(ix)); data->zone_abs[ix] = dme1737_read(data, DME1737_REG_ZONE_ABS(ix)); } |
9431996f5 hwmon: New SMSC D... |
724 |
} |
ea694431f hwmon: (dme1737) ... |
725 |
if (data->has_features & HAS_ZONE_HYST) { |
549edb833 hwmon: (dme1737) ... |
726 |
for (ix = 0; ix < ARRAY_SIZE(data->zone_hyst); ix++) { |
dbc2bc251 hwmon: (dme1737) ... |
727 |
data->zone_hyst[ix] = dme1737_read(data, |
9431996f5 hwmon: New SMSC D... |
728 |
DME1737_REG_ZONE_HYST(ix)); |
549edb833 hwmon: (dme1737) ... |
729 |
} |
9431996f5 hwmon: New SMSC D... |
730 731 732 |
} /* Alarm registers */ |
dbc2bc251 hwmon: (dme1737) ... |
733 |
data->alarms = dme1737_read(data, |
9431996f5 hwmon: New SMSC D... |
734 |
DME1737_REG_ALARM1); |
c8de83624 hwmon: (dme1737) ... |
735 736 737 738 |
/* * Bit 7 tells us if the other alarm registers are non-zero and * therefore also need to be read */ |
9431996f5 hwmon: New SMSC D... |
739 |
if (data->alarms & 0x80) { |
dbc2bc251 hwmon: (dme1737) ... |
740 |
data->alarms |= dme1737_read(data, |
9431996f5 hwmon: New SMSC D... |
741 |
DME1737_REG_ALARM2) << 8; |
dbc2bc251 hwmon: (dme1737) ... |
742 |
data->alarms |= dme1737_read(data, |
9431996f5 hwmon: New SMSC D... |
743 744 |
DME1737_REG_ALARM3) << 16; } |
c8de83624 hwmon: (dme1737) ... |
745 746 |
/* * The ISA chips require explicit clearing of alarm bits. |
e95c237d7 hwmon: (dme1737) ... |
747 |
* Don't worry, an alarm will come back if the condition |
c8de83624 hwmon: (dme1737) ... |
748 749 |
* that causes it still exists */ |
dbc2bc251 hwmon: (dme1737) ... |
750 |
if (!data->client) { |
c8de83624 hwmon: (dme1737) ... |
751 752 753 754 755 756 |
if (data->alarms & 0xff0000) dme1737_write(data, DME1737_REG_ALARM3, 0xff); if (data->alarms & 0xff00) dme1737_write(data, DME1737_REG_ALARM2, 0xff); if (data->alarms & 0xff) dme1737_write(data, DME1737_REG_ALARM1, 0xff); |
e95c237d7 hwmon: (dme1737) ... |
757 |
} |
9431996f5 hwmon: New SMSC D... |
758 759 760 761 762 763 764 765 766 767 768 |
data->last_update = jiffies; data->valid = 1; } mutex_unlock(&data->update_lock); return data; } /* --------------------------------------------------------------------- * Voltage sysfs attributes |
d4b94e1fa hwmon: (dme1737) ... |
769 |
* ix = [0-7] |
9431996f5 hwmon: New SMSC D... |
770 771 772 773 774 775 776 777 778 779 780 781 782 783 784 785 786 787 788 |
* --------------------------------------------------------------------- */ #define SYS_IN_INPUT 0 #define SYS_IN_MIN 1 #define SYS_IN_MAX 2 #define SYS_IN_ALARM 3 static ssize_t show_in(struct device *dev, struct device_attribute *attr, char *buf) { struct dme1737_data *data = dme1737_update_device(dev); struct sensor_device_attribute_2 *sensor_attr_2 = to_sensor_dev_attr_2(attr); int ix = sensor_attr_2->index; int fn = sensor_attr_2->nr; int res; switch (fn) { case SYS_IN_INPUT: |
549edb833 hwmon: (dme1737) ... |
789 |
res = IN_FROM_REG(data->in[ix], data->in_nominal[ix], 16); |
9431996f5 hwmon: New SMSC D... |
790 791 |
break; case SYS_IN_MIN: |
549edb833 hwmon: (dme1737) ... |
792 |
res = IN_FROM_REG(data->in_min[ix], data->in_nominal[ix], 8); |
9431996f5 hwmon: New SMSC D... |
793 794 |
break; case SYS_IN_MAX: |
549edb833 hwmon: (dme1737) ... |
795 |
res = IN_FROM_REG(data->in_max[ix], data->in_nominal[ix], 8); |
9431996f5 hwmon: New SMSC D... |
796 797 798 799 800 801 |
break; case SYS_IN_ALARM: res = (data->alarms >> DME1737_BIT_ALARM_IN[ix]) & 0x01; break; default: res = 0; |
b237eb25d hwmon: (dme1737) ... |
802 803 |
dev_dbg(dev, "Unknown function %d. ", fn); |
9431996f5 hwmon: New SMSC D... |
804 805 806 807 808 809 810 811 812 |
} return sprintf(buf, "%d ", res); } static ssize_t set_in(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { |
b237eb25d hwmon: (dme1737) ... |
813 |
struct dme1737_data *data = dev_get_drvdata(dev); |
9431996f5 hwmon: New SMSC D... |
814 815 816 817 |
struct sensor_device_attribute_2 *sensor_attr_2 = to_sensor_dev_attr_2(attr); int ix = sensor_attr_2->index; int fn = sensor_attr_2->nr; |
c8de83624 hwmon: (dme1737) ... |
818 819 820 821 822 823 |
long val; int err; err = kstrtol(buf, 10, &val); if (err) return err; |
9431996f5 hwmon: New SMSC D... |
824 825 826 827 |
mutex_lock(&data->update_lock); switch (fn) { case SYS_IN_MIN: |
549edb833 hwmon: (dme1737) ... |
828 |
data->in_min[ix] = IN_TO_REG(val, data->in_nominal[ix]); |
dbc2bc251 hwmon: (dme1737) ... |
829 |
dme1737_write(data, DME1737_REG_IN_MIN(ix), |
9431996f5 hwmon: New SMSC D... |
830 831 832 |
data->in_min[ix]); break; case SYS_IN_MAX: |
549edb833 hwmon: (dme1737) ... |
833 |
data->in_max[ix] = IN_TO_REG(val, data->in_nominal[ix]); |
dbc2bc251 hwmon: (dme1737) ... |
834 |
dme1737_write(data, DME1737_REG_IN_MAX(ix), |
9431996f5 hwmon: New SMSC D... |
835 836 837 |
data->in_max[ix]); break; default: |
b237eb25d hwmon: (dme1737) ... |
838 839 |
dev_dbg(dev, "Unknown function %d. ", fn); |
9431996f5 hwmon: New SMSC D... |
840 841 842 843 844 845 846 847 848 849 850 851 852 853 854 855 856 857 858 859 860 861 862 863 864 865 866 867 868 869 870 871 872 873 874 875 876 877 878 879 880 881 882 883 884 |
} mutex_unlock(&data->update_lock); return count; } /* --------------------------------------------------------------------- * Temperature sysfs attributes * ix = [0-2] * --------------------------------------------------------------------- */ #define SYS_TEMP_INPUT 0 #define SYS_TEMP_MIN 1 #define SYS_TEMP_MAX 2 #define SYS_TEMP_OFFSET 3 #define SYS_TEMP_ALARM 4 #define SYS_TEMP_FAULT 5 static ssize_t show_temp(struct device *dev, struct device_attribute *attr, char *buf) { struct dme1737_data *data = dme1737_update_device(dev); struct sensor_device_attribute_2 *sensor_attr_2 = to_sensor_dev_attr_2(attr); int ix = sensor_attr_2->index; int fn = sensor_attr_2->nr; int res; switch (fn) { case SYS_TEMP_INPUT: res = TEMP_FROM_REG(data->temp[ix], 16); break; case SYS_TEMP_MIN: res = TEMP_FROM_REG(data->temp_min[ix], 8); break; case SYS_TEMP_MAX: res = TEMP_FROM_REG(data->temp_max[ix], 8); break; case SYS_TEMP_OFFSET: res = TEMP_FROM_REG(data->temp_offset[ix], 8); break; case SYS_TEMP_ALARM: res = (data->alarms >> DME1737_BIT_ALARM_TEMP[ix]) & 0x01; break; case SYS_TEMP_FAULT: |
c0f31403f hwmon: fix dme173... |
885 |
res = (((u16)data->temp[ix] & 0xff00) == 0x8000); |
9431996f5 hwmon: New SMSC D... |
886 887 888 |
break; default: res = 0; |
b237eb25d hwmon: (dme1737) ... |
889 890 |
dev_dbg(dev, "Unknown function %d. ", fn); |
9431996f5 hwmon: New SMSC D... |
891 892 893 894 895 896 897 898 899 |
} return sprintf(buf, "%d ", res); } static ssize_t set_temp(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { |
b237eb25d hwmon: (dme1737) ... |
900 |
struct dme1737_data *data = dev_get_drvdata(dev); |
9431996f5 hwmon: New SMSC D... |
901 902 903 904 |
struct sensor_device_attribute_2 *sensor_attr_2 = to_sensor_dev_attr_2(attr); int ix = sensor_attr_2->index; int fn = sensor_attr_2->nr; |
c8de83624 hwmon: (dme1737) ... |
905 906 907 908 909 910 |
long val; int err; err = kstrtol(buf, 10, &val); if (err) return err; |
9431996f5 hwmon: New SMSC D... |
911 912 913 914 915 |
mutex_lock(&data->update_lock); switch (fn) { case SYS_TEMP_MIN: data->temp_min[ix] = TEMP_TO_REG(val); |
dbc2bc251 hwmon: (dme1737) ... |
916 |
dme1737_write(data, DME1737_REG_TEMP_MIN(ix), |
9431996f5 hwmon: New SMSC D... |
917 918 919 920 |
data->temp_min[ix]); break; case SYS_TEMP_MAX: data->temp_max[ix] = TEMP_TO_REG(val); |
dbc2bc251 hwmon: (dme1737) ... |
921 |
dme1737_write(data, DME1737_REG_TEMP_MAX(ix), |
9431996f5 hwmon: New SMSC D... |
922 923 924 925 |
data->temp_max[ix]); break; case SYS_TEMP_OFFSET: data->temp_offset[ix] = TEMP_TO_REG(val); |
dbc2bc251 hwmon: (dme1737) ... |
926 |
dme1737_write(data, DME1737_REG_TEMP_OFFSET(ix), |
9431996f5 hwmon: New SMSC D... |
927 928 929 |
data->temp_offset[ix]); break; default: |
b237eb25d hwmon: (dme1737) ... |
930 931 |
dev_dbg(dev, "Unknown function %d. ", fn); |
9431996f5 hwmon: New SMSC D... |
932 933 934 935 936 937 938 939 940 941 942 943 944 945 946 947 948 949 950 951 952 953 954 955 956 957 958 959 960 961 |
} mutex_unlock(&data->update_lock); return count; } /* --------------------------------------------------------------------- * Zone sysfs attributes * ix = [0-2] * --------------------------------------------------------------------- */ #define SYS_ZONE_AUTO_CHANNELS_TEMP 0 #define SYS_ZONE_AUTO_POINT1_TEMP_HYST 1 #define SYS_ZONE_AUTO_POINT1_TEMP 2 #define SYS_ZONE_AUTO_POINT2_TEMP 3 #define SYS_ZONE_AUTO_POINT3_TEMP 4 static ssize_t show_zone(struct device *dev, struct device_attribute *attr, char *buf) { struct dme1737_data *data = dme1737_update_device(dev); struct sensor_device_attribute_2 *sensor_attr_2 = to_sensor_dev_attr_2(attr); int ix = sensor_attr_2->index; int fn = sensor_attr_2->nr; int res; switch (fn) { case SYS_ZONE_AUTO_CHANNELS_TEMP: /* check config2 for non-standard temp-to-zone mapping */ |
c8de83624 hwmon: (dme1737) ... |
962 |
if ((ix == 1) && (data->config2 & 0x02)) |
9431996f5 hwmon: New SMSC D... |
963 |
res = 4; |
c8de83624 hwmon: (dme1737) ... |
964 |
else |
9431996f5 hwmon: New SMSC D... |
965 |
res = 1 << ix; |
9431996f5 hwmon: New SMSC D... |
966 967 968 969 970 971 972 973 974 975 976 977 978 979 980 981 982 983 |
break; case SYS_ZONE_AUTO_POINT1_TEMP_HYST: res = TEMP_FROM_REG(data->zone_low[ix], 8) - TEMP_HYST_FROM_REG(data->zone_hyst[ix == 2], ix); break; case SYS_ZONE_AUTO_POINT1_TEMP: res = TEMP_FROM_REG(data->zone_low[ix], 8); break; case SYS_ZONE_AUTO_POINT2_TEMP: /* pwm_freq holds the temp range bits in the upper nibble */ res = TEMP_FROM_REG(data->zone_low[ix], 8) + TEMP_RANGE_FROM_REG(data->pwm_freq[ix]); break; case SYS_ZONE_AUTO_POINT3_TEMP: res = TEMP_FROM_REG(data->zone_abs[ix], 8); break; default: res = 0; |
b237eb25d hwmon: (dme1737) ... |
984 985 |
dev_dbg(dev, "Unknown function %d. ", fn); |
9431996f5 hwmon: New SMSC D... |
986 987 988 989 990 991 992 993 994 |
} return sprintf(buf, "%d ", res); } static ssize_t set_zone(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { |
b237eb25d hwmon: (dme1737) ... |
995 |
struct dme1737_data *data = dev_get_drvdata(dev); |
9431996f5 hwmon: New SMSC D... |
996 997 998 999 |
struct sensor_device_attribute_2 *sensor_attr_2 = to_sensor_dev_attr_2(attr); int ix = sensor_attr_2->index; int fn = sensor_attr_2->nr; |
c8de83624 hwmon: (dme1737) ... |
1000 1001 1002 1003 1004 1005 |
long val; int err; err = kstrtol(buf, 10, &val); if (err) return err; |
9431996f5 hwmon: New SMSC D... |
1006 1007 1008 1009 1010 |
mutex_lock(&data->update_lock); switch (fn) { case SYS_ZONE_AUTO_POINT1_TEMP_HYST: /* Refresh the cache */ |
dbc2bc251 hwmon: (dme1737) ... |
1011 |
data->zone_low[ix] = dme1737_read(data, |
9431996f5 hwmon: New SMSC D... |
1012 1013 1014 1015 |
DME1737_REG_ZONE_LOW(ix)); /* Modify the temp hyst value */ data->zone_hyst[ix == 2] = TEMP_HYST_TO_REG( TEMP_FROM_REG(data->zone_low[ix], 8) - |
dbc2bc251 hwmon: (dme1737) ... |
1016 |
val, ix, dme1737_read(data, |
9431996f5 hwmon: New SMSC D... |
1017 |
DME1737_REG_ZONE_HYST(ix == 2))); |
dbc2bc251 hwmon: (dme1737) ... |
1018 |
dme1737_write(data, DME1737_REG_ZONE_HYST(ix == 2), |
9431996f5 hwmon: New SMSC D... |
1019 1020 1021 1022 |
data->zone_hyst[ix == 2]); break; case SYS_ZONE_AUTO_POINT1_TEMP: data->zone_low[ix] = TEMP_TO_REG(val); |
dbc2bc251 hwmon: (dme1737) ... |
1023 |
dme1737_write(data, DME1737_REG_ZONE_LOW(ix), |
9431996f5 hwmon: New SMSC D... |
1024 1025 1026 1027 |
data->zone_low[ix]); break; case SYS_ZONE_AUTO_POINT2_TEMP: /* Refresh the cache */ |
dbc2bc251 hwmon: (dme1737) ... |
1028 |
data->zone_low[ix] = dme1737_read(data, |
9431996f5 hwmon: New SMSC D... |
1029 |
DME1737_REG_ZONE_LOW(ix)); |
c8de83624 hwmon: (dme1737) ... |
1030 1031 1032 1033 |
/* * Modify the temp range value (which is stored in the upper * nibble of the pwm_freq register) */ |
9431996f5 hwmon: New SMSC D... |
1034 1035 |
data->pwm_freq[ix] = TEMP_RANGE_TO_REG(val - TEMP_FROM_REG(data->zone_low[ix], 8), |
dbc2bc251 hwmon: (dme1737) ... |
1036 |
dme1737_read(data, |
9431996f5 hwmon: New SMSC D... |
1037 |
DME1737_REG_PWM_FREQ(ix))); |
dbc2bc251 hwmon: (dme1737) ... |
1038 |
dme1737_write(data, DME1737_REG_PWM_FREQ(ix), |
9431996f5 hwmon: New SMSC D... |
1039 1040 1041 1042 |
data->pwm_freq[ix]); break; case SYS_ZONE_AUTO_POINT3_TEMP: data->zone_abs[ix] = TEMP_TO_REG(val); |
dbc2bc251 hwmon: (dme1737) ... |
1043 |
dme1737_write(data, DME1737_REG_ZONE_ABS(ix), |
9431996f5 hwmon: New SMSC D... |
1044 1045 1046 |
data->zone_abs[ix]); break; default: |
b237eb25d hwmon: (dme1737) ... |
1047 1048 |
dev_dbg(dev, "Unknown function %d. ", fn); |
9431996f5 hwmon: New SMSC D... |
1049 1050 1051 1052 1053 1054 1055 1056 1057 1058 1059 1060 1061 1062 1063 1064 1065 1066 1067 1068 1069 1070 1071 1072 1073 1074 1075 1076 1077 1078 1079 1080 1081 1082 1083 1084 1085 1086 1087 1088 1089 1090 1091 1092 1093 1094 1095 1096 1097 1098 1099 |
} mutex_unlock(&data->update_lock); return count; } /* --------------------------------------------------------------------- * Fan sysfs attributes * ix = [0-5] * --------------------------------------------------------------------- */ #define SYS_FAN_INPUT 0 #define SYS_FAN_MIN 1 #define SYS_FAN_MAX 2 #define SYS_FAN_ALARM 3 #define SYS_FAN_TYPE 4 static ssize_t show_fan(struct device *dev, struct device_attribute *attr, char *buf) { struct dme1737_data *data = dme1737_update_device(dev); struct sensor_device_attribute_2 *sensor_attr_2 = to_sensor_dev_attr_2(attr); int ix = sensor_attr_2->index; int fn = sensor_attr_2->nr; int res; switch (fn) { case SYS_FAN_INPUT: res = FAN_FROM_REG(data->fan[ix], ix < 4 ? 0 : FAN_TPC_FROM_REG(data->fan_opt[ix])); break; case SYS_FAN_MIN: res = FAN_FROM_REG(data->fan_min[ix], ix < 4 ? 0 : FAN_TPC_FROM_REG(data->fan_opt[ix])); break; case SYS_FAN_MAX: /* only valid for fan[5-6] */ res = FAN_MAX_FROM_REG(data->fan_max[ix - 4]); break; case SYS_FAN_ALARM: res = (data->alarms >> DME1737_BIT_ALARM_FAN[ix]) & 0x01; break; case SYS_FAN_TYPE: /* only valid for fan[1-4] */ res = FAN_TYPE_FROM_REG(data->fan_opt[ix]); break; default: res = 0; |
b237eb25d hwmon: (dme1737) ... |
1100 1101 |
dev_dbg(dev, "Unknown function %d. ", fn); |
9431996f5 hwmon: New SMSC D... |
1102 1103 1104 1105 1106 1107 1108 1109 1110 |
} return sprintf(buf, "%d ", res); } static ssize_t set_fan(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { |
b237eb25d hwmon: (dme1737) ... |
1111 |
struct dme1737_data *data = dev_get_drvdata(dev); |
9431996f5 hwmon: New SMSC D... |
1112 1113 1114 1115 |
struct sensor_device_attribute_2 *sensor_attr_2 = to_sensor_dev_attr_2(attr); int ix = sensor_attr_2->index; int fn = sensor_attr_2->nr; |
c8de83624 hwmon: (dme1737) ... |
1116 1117 1118 1119 1120 1121 |
long val; int err; err = kstrtol(buf, 10, &val); if (err) return err; |
9431996f5 hwmon: New SMSC D... |
1122 1123 1124 1125 1126 1127 1128 1129 |
mutex_lock(&data->update_lock); switch (fn) { case SYS_FAN_MIN: if (ix < 4) { data->fan_min[ix] = FAN_TO_REG(val, 0); } else { /* Refresh the cache */ |
dbc2bc251 hwmon: (dme1737) ... |
1130 |
data->fan_opt[ix] = dme1737_read(data, |
9431996f5 hwmon: New SMSC D... |
1131 1132 1133 1134 1135 |
DME1737_REG_FAN_OPT(ix)); /* Modify the fan min value */ data->fan_min[ix] = FAN_TO_REG(val, FAN_TPC_FROM_REG(data->fan_opt[ix])); } |
dbc2bc251 hwmon: (dme1737) ... |
1136 |
dme1737_write(data, DME1737_REG_FAN_MIN(ix), |
9431996f5 hwmon: New SMSC D... |
1137 |
data->fan_min[ix] & 0xff); |
dbc2bc251 hwmon: (dme1737) ... |
1138 |
dme1737_write(data, DME1737_REG_FAN_MIN(ix) + 1, |
9431996f5 hwmon: New SMSC D... |
1139 1140 1141 1142 1143 |
data->fan_min[ix] >> 8); break; case SYS_FAN_MAX: /* Only valid for fan[5-6] */ data->fan_max[ix - 4] = FAN_MAX_TO_REG(val); |
dbc2bc251 hwmon: (dme1737) ... |
1144 |
dme1737_write(data, DME1737_REG_FAN_MAX(ix), |
9431996f5 hwmon: New SMSC D... |
1145 1146 1147 1148 1149 1150 |
data->fan_max[ix - 4]); break; case SYS_FAN_TYPE: /* Only valid for fan[1-4] */ if (!(val == 1 || val == 2 || val == 4)) { count = -EINVAL; |
b55f37572 hwmon: Fix checkp... |
1151 1152 1153 |
dev_warn(dev, "Fan type value %ld not supported. Choose one of 1, 2, or 4. ", |
9431996f5 hwmon: New SMSC D... |
1154 1155 1156 |
val); goto exit; } |
dbc2bc251 hwmon: (dme1737) ... |
1157 |
data->fan_opt[ix] = FAN_TYPE_TO_REG(val, dme1737_read(data, |
9431996f5 hwmon: New SMSC D... |
1158 |
DME1737_REG_FAN_OPT(ix))); |
dbc2bc251 hwmon: (dme1737) ... |
1159 |
dme1737_write(data, DME1737_REG_FAN_OPT(ix), |
9431996f5 hwmon: New SMSC D... |
1160 1161 1162 |
data->fan_opt[ix]); break; default: |
b237eb25d hwmon: (dme1737) ... |
1163 1164 |
dev_dbg(dev, "Unknown function %d. ", fn); |
9431996f5 hwmon: New SMSC D... |
1165 1166 1167 1168 1169 1170 1171 1172 1173 1174 1175 1176 1177 1178 1179 1180 1181 1182 1183 1184 1185 1186 1187 1188 1189 1190 1191 1192 1193 1194 1195 1196 1197 |
} exit: mutex_unlock(&data->update_lock); return count; } /* --------------------------------------------------------------------- * PWM sysfs attributes * ix = [0-4] * --------------------------------------------------------------------- */ #define SYS_PWM 0 #define SYS_PWM_FREQ 1 #define SYS_PWM_ENABLE 2 #define SYS_PWM_RAMP_RATE 3 #define SYS_PWM_AUTO_CHANNELS_ZONE 4 #define SYS_PWM_AUTO_PWM_MIN 5 #define SYS_PWM_AUTO_POINT1_PWM 6 #define SYS_PWM_AUTO_POINT2_PWM 7 static ssize_t show_pwm(struct device *dev, struct device_attribute *attr, char *buf) { struct dme1737_data *data = dme1737_update_device(dev); struct sensor_device_attribute_2 *sensor_attr_2 = to_sensor_dev_attr_2(attr); int ix = sensor_attr_2->index; int fn = sensor_attr_2->nr; int res; switch (fn) { case SYS_PWM: |
c8de83624 hwmon: (dme1737) ... |
1198 |
if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 0) |
9431996f5 hwmon: New SMSC D... |
1199 |
res = 255; |
c8de83624 hwmon: (dme1737) ... |
1200 |
else |
9431996f5 hwmon: New SMSC D... |
1201 |
res = data->pwm[ix]; |
9431996f5 hwmon: New SMSC D... |
1202 1203 1204 1205 1206 |
break; case SYS_PWM_FREQ: res = PWM_FREQ_FROM_REG(data->pwm_freq[ix]); break; case SYS_PWM_ENABLE: |
c8de83624 hwmon: (dme1737) ... |
1207 |
if (ix >= 3) |
9431996f5 hwmon: New SMSC D... |
1208 |
res = 1; /* pwm[5-6] hard-wired to manual mode */ |
c8de83624 hwmon: (dme1737) ... |
1209 |
else |
9431996f5 hwmon: New SMSC D... |
1210 |
res = PWM_EN_FROM_REG(data->pwm_config[ix]); |
9431996f5 hwmon: New SMSC D... |
1211 1212 1213 1214 1215 1216 1217 |
break; case SYS_PWM_RAMP_RATE: /* Only valid for pwm[1-3] */ res = PWM_RR_FROM_REG(data->pwm_rr[ix > 0], ix); break; case SYS_PWM_AUTO_CHANNELS_ZONE: /* Only valid for pwm[1-3] */ |
c8de83624 hwmon: (dme1737) ... |
1218 |
if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) |
9431996f5 hwmon: New SMSC D... |
1219 |
res = PWM_ACZ_FROM_REG(data->pwm_config[ix]); |
c8de83624 hwmon: (dme1737) ... |
1220 |
else |
9431996f5 hwmon: New SMSC D... |
1221 |
res = data->pwm_acz[ix]; |
9431996f5 hwmon: New SMSC D... |
1222 1223 1224 |
break; case SYS_PWM_AUTO_PWM_MIN: /* Only valid for pwm[1-3] */ |
c8de83624 hwmon: (dme1737) ... |
1225 |
if (PWM_OFF_FROM_REG(data->pwm_rr[0], ix)) |
9431996f5 hwmon: New SMSC D... |
1226 |
res = data->pwm_min[ix]; |
c8de83624 hwmon: (dme1737) ... |
1227 |
else |
9431996f5 hwmon: New SMSC D... |
1228 |
res = 0; |
9431996f5 hwmon: New SMSC D... |
1229 1230 1231 1232 1233 1234 1235 1236 1237 1238 1239 |
break; case SYS_PWM_AUTO_POINT1_PWM: /* Only valid for pwm[1-3] */ res = data->pwm_min[ix]; break; case SYS_PWM_AUTO_POINT2_PWM: /* Only valid for pwm[1-3] */ res = 255; /* hard-wired */ break; default: res = 0; |
b237eb25d hwmon: (dme1737) ... |
1240 1241 |
dev_dbg(dev, "Unknown function %d. ", fn); |
9431996f5 hwmon: New SMSC D... |
1242 1243 1244 1245 1246 |
} return sprintf(buf, "%d ", res); } |
73ce48f6c hwmon: (dme1737) ... |
1247 |
static struct attribute *dme1737_pwm_chmod_attr[]; |
48176a973 switch sysfs_chmo... |
1248 |
static void dme1737_chmod_file(struct device*, struct attribute*, umode_t); |
9431996f5 hwmon: New SMSC D... |
1249 1250 1251 1252 |
static ssize_t set_pwm(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { |
b237eb25d hwmon: (dme1737) ... |
1253 |
struct dme1737_data *data = dev_get_drvdata(dev); |
9431996f5 hwmon: New SMSC D... |
1254 1255 1256 1257 |
struct sensor_device_attribute_2 *sensor_attr_2 = to_sensor_dev_attr_2(attr); int ix = sensor_attr_2->index; int fn = sensor_attr_2->nr; |
c8de83624 hwmon: (dme1737) ... |
1258 1259 1260 1261 1262 1263 |
long val; int err; err = kstrtol(buf, 10, &val); if (err) return err; |
9431996f5 hwmon: New SMSC D... |
1264 1265 1266 1267 |
mutex_lock(&data->update_lock); switch (fn) { case SYS_PWM: |
2a844c148 hwmon: Replace SE... |
1268 |
data->pwm[ix] = clamp_val(val, 0, 255); |
dbc2bc251 hwmon: (dme1737) ... |
1269 |
dme1737_write(data, DME1737_REG_PWM(ix), data->pwm[ix]); |
9431996f5 hwmon: New SMSC D... |
1270 1271 |
break; case SYS_PWM_FREQ: |
dbc2bc251 hwmon: (dme1737) ... |
1272 |
data->pwm_freq[ix] = PWM_FREQ_TO_REG(val, dme1737_read(data, |
9431996f5 hwmon: New SMSC D... |
1273 |
DME1737_REG_PWM_FREQ(ix))); |
dbc2bc251 hwmon: (dme1737) ... |
1274 |
dme1737_write(data, DME1737_REG_PWM_FREQ(ix), |
9431996f5 hwmon: New SMSC D... |
1275 1276 1277 1278 1279 1280 |
data->pwm_freq[ix]); break; case SYS_PWM_ENABLE: /* Only valid for pwm[1-3] */ if (val < 0 || val > 2) { count = -EINVAL; |
b55f37572 hwmon: Fix checkp... |
1281 1282 1283 |
dev_warn(dev, "PWM enable %ld not supported. Choose one of 0, 1, or 2. ", |
9431996f5 hwmon: New SMSC D... |
1284 1285 1286 1287 |
val); goto exit; } /* Refresh the cache */ |
dbc2bc251 hwmon: (dme1737) ... |
1288 |
data->pwm_config[ix] = dme1737_read(data, |
9431996f5 hwmon: New SMSC D... |
1289 1290 1291 1292 1293 1294 1295 1296 1297 1298 1299 |
DME1737_REG_PWM_CONFIG(ix)); if (val == PWM_EN_FROM_REG(data->pwm_config[ix])) { /* Bail out if no change */ goto exit; } /* Do some housekeeping if we are currently in auto mode */ if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) { /* Save the current zone channel assignment */ data->pwm_acz[ix] = PWM_ACZ_FROM_REG( data->pwm_config[ix]); /* Save the current ramp rate state and disable it */ |
dbc2bc251 hwmon: (dme1737) ... |
1300 |
data->pwm_rr[ix > 0] = dme1737_read(data, |
9431996f5 hwmon: New SMSC D... |
1301 1302 1303 1304 1305 1306 |
DME1737_REG_PWM_RR(ix > 0)); data->pwm_rr_en &= ~(1 << ix); if (PWM_RR_EN_FROM_REG(data->pwm_rr[ix > 0], ix)) { data->pwm_rr_en |= (1 << ix); data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(0, ix, data->pwm_rr[ix > 0]); |
dbc2bc251 hwmon: (dme1737) ... |
1307 |
dme1737_write(data, |
9431996f5 hwmon: New SMSC D... |
1308 1309 1310 1311 1312 1313 1314 1315 |
DME1737_REG_PWM_RR(ix > 0), data->pwm_rr[ix > 0]); } } /* Set the new PWM mode */ switch (val) { case 0: /* Change permissions of pwm[ix] to read-only */ |
73ce48f6c hwmon: (dme1737) ... |
1316 |
dme1737_chmod_file(dev, dme1737_pwm_chmod_attr[ix], |
9431996f5 hwmon: New SMSC D... |
1317 1318 1319 1320 |
S_IRUGO); /* Turn fan fully on */ data->pwm_config[ix] = PWM_EN_TO_REG(0, data->pwm_config[ix]); |
dbc2bc251 hwmon: (dme1737) ... |
1321 |
dme1737_write(data, DME1737_REG_PWM_CONFIG(ix), |
9431996f5 hwmon: New SMSC D... |
1322 1323 1324 1325 1326 1327 |
data->pwm_config[ix]); break; case 1: /* Turn on manual mode */ data->pwm_config[ix] = PWM_EN_TO_REG(1, data->pwm_config[ix]); |
dbc2bc251 hwmon: (dme1737) ... |
1328 |
dme1737_write(data, DME1737_REG_PWM_CONFIG(ix), |
9431996f5 hwmon: New SMSC D... |
1329 1330 |
data->pwm_config[ix]); /* Change permissions of pwm[ix] to read-writeable */ |
73ce48f6c hwmon: (dme1737) ... |
1331 |
dme1737_chmod_file(dev, dme1737_pwm_chmod_attr[ix], |
9431996f5 hwmon: New SMSC D... |
1332 1333 1334 1335 |
S_IRUGO | S_IWUSR); break; case 2: /* Change permissions of pwm[ix] to read-only */ |
73ce48f6c hwmon: (dme1737) ... |
1336 |
dme1737_chmod_file(dev, dme1737_pwm_chmod_attr[ix], |
9431996f5 hwmon: New SMSC D... |
1337 |
S_IRUGO); |
c8de83624 hwmon: (dme1737) ... |
1338 1339 1340 1341 |
/* * Turn on auto mode using the saved zone channel * assignment */ |
9431996f5 hwmon: New SMSC D... |
1342 1343 1344 |
data->pwm_config[ix] = PWM_ACZ_TO_REG( data->pwm_acz[ix], data->pwm_config[ix]); |
dbc2bc251 hwmon: (dme1737) ... |
1345 |
dme1737_write(data, DME1737_REG_PWM_CONFIG(ix), |
9431996f5 hwmon: New SMSC D... |
1346 1347 1348 1349 |
data->pwm_config[ix]); /* Enable PWM ramp rate if previously enabled */ if (data->pwm_rr_en & (1 << ix)) { data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(1, ix, |
dbc2bc251 hwmon: (dme1737) ... |
1350 |
dme1737_read(data, |
9431996f5 hwmon: New SMSC D... |
1351 |
DME1737_REG_PWM_RR(ix > 0))); |
dbc2bc251 hwmon: (dme1737) ... |
1352 |
dme1737_write(data, |
9431996f5 hwmon: New SMSC D... |
1353 1354 1355 1356 1357 1358 1359 1360 1361 |
DME1737_REG_PWM_RR(ix > 0), data->pwm_rr[ix > 0]); } break; } break; case SYS_PWM_RAMP_RATE: /* Only valid for pwm[1-3] */ /* Refresh the cache */ |
dbc2bc251 hwmon: (dme1737) ... |
1362 |
data->pwm_config[ix] = dme1737_read(data, |
9431996f5 hwmon: New SMSC D... |
1363 |
DME1737_REG_PWM_CONFIG(ix)); |
dbc2bc251 hwmon: (dme1737) ... |
1364 |
data->pwm_rr[ix > 0] = dme1737_read(data, |
9431996f5 hwmon: New SMSC D... |
1365 1366 1367 1368 1369 1370 |
DME1737_REG_PWM_RR(ix > 0)); /* Set the ramp rate value */ if (val > 0) { data->pwm_rr[ix > 0] = PWM_RR_TO_REG(val, ix, data->pwm_rr[ix > 0]); } |
c8de83624 hwmon: (dme1737) ... |
1371 1372 1373 1374 |
/* * Enable/disable the feature only if the associated PWM * output is in automatic mode. */ |
9431996f5 hwmon: New SMSC D... |
1375 1376 1377 1378 |
if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) { data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(val > 0, ix, data->pwm_rr[ix > 0]); } |
dbc2bc251 hwmon: (dme1737) ... |
1379 |
dme1737_write(data, DME1737_REG_PWM_RR(ix > 0), |
9431996f5 hwmon: New SMSC D... |
1380 1381 1382 1383 1384 1385 1386 |
data->pwm_rr[ix > 0]); break; case SYS_PWM_AUTO_CHANNELS_ZONE: /* Only valid for pwm[1-3] */ if (!(val == 1 || val == 2 || val == 4 || val == 6 || val == 7)) { count = -EINVAL; |
b55f37572 hwmon: Fix checkp... |
1387 1388 |
dev_warn(dev, "PWM auto channels zone %ld not supported. Choose one of 1, 2, 4, 6, " |
9431996f5 hwmon: New SMSC D... |
1389 1390 1391 1392 1393 |
"or 7. ", val); goto exit; } /* Refresh the cache */ |
dbc2bc251 hwmon: (dme1737) ... |
1394 |
data->pwm_config[ix] = dme1737_read(data, |
9431996f5 hwmon: New SMSC D... |
1395 1396 |
DME1737_REG_PWM_CONFIG(ix)); if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) { |
c8de83624 hwmon: (dme1737) ... |
1397 1398 1399 1400 |
/* * PWM is already in auto mode so update the temp * channel assignment */ |
9431996f5 hwmon: New SMSC D... |
1401 1402 |
data->pwm_config[ix] = PWM_ACZ_TO_REG(val, data->pwm_config[ix]); |
dbc2bc251 hwmon: (dme1737) ... |
1403 |
dme1737_write(data, DME1737_REG_PWM_CONFIG(ix), |
9431996f5 hwmon: New SMSC D... |
1404 1405 |
data->pwm_config[ix]); } else { |
c8de83624 hwmon: (dme1737) ... |
1406 1407 1408 1409 |
/* * PWM is not in auto mode so we save the temp * channel assignment for later use */ |
9431996f5 hwmon: New SMSC D... |
1410 1411 1412 1413 1414 1415 |
data->pwm_acz[ix] = val; } break; case SYS_PWM_AUTO_PWM_MIN: /* Only valid for pwm[1-3] */ /* Refresh the cache */ |
dbc2bc251 hwmon: (dme1737) ... |
1416 |
data->pwm_min[ix] = dme1737_read(data, |
9431996f5 hwmon: New SMSC D... |
1417 |
DME1737_REG_PWM_MIN(ix)); |
c8de83624 hwmon: (dme1737) ... |
1418 1419 |
/* * There are only 2 values supported for the auto_pwm_min |
9431996f5 hwmon: New SMSC D... |
1420 1421 |
* value: 0 or auto_point1_pwm. So if the temperature drops * below the auto_point1_temp_hyst value, the fan either turns |
c8de83624 hwmon: (dme1737) ... |
1422 1423 |
* off or runs at auto_point1_pwm duty-cycle. */ |
9431996f5 hwmon: New SMSC D... |
1424 1425 |
if (val > ((data->pwm_min[ix] + 1) / 2)) { data->pwm_rr[0] = PWM_OFF_TO_REG(1, ix, |
dbc2bc251 hwmon: (dme1737) ... |
1426 |
dme1737_read(data, |
9431996f5 hwmon: New SMSC D... |
1427 |
DME1737_REG_PWM_RR(0))); |
9431996f5 hwmon: New SMSC D... |
1428 1429 |
} else { data->pwm_rr[0] = PWM_OFF_TO_REG(0, ix, |
dbc2bc251 hwmon: (dme1737) ... |
1430 |
dme1737_read(data, |
9431996f5 hwmon: New SMSC D... |
1431 |
DME1737_REG_PWM_RR(0))); |
9431996f5 hwmon: New SMSC D... |
1432 |
} |
dbc2bc251 hwmon: (dme1737) ... |
1433 |
dme1737_write(data, DME1737_REG_PWM_RR(0), |
9431996f5 hwmon: New SMSC D... |
1434 1435 1436 1437 |
data->pwm_rr[0]); break; case SYS_PWM_AUTO_POINT1_PWM: /* Only valid for pwm[1-3] */ |
2a844c148 hwmon: Replace SE... |
1438 |
data->pwm_min[ix] = clamp_val(val, 0, 255); |
dbc2bc251 hwmon: (dme1737) ... |
1439 |
dme1737_write(data, DME1737_REG_PWM_MIN(ix), |
9431996f5 hwmon: New SMSC D... |
1440 1441 1442 |
data->pwm_min[ix]); break; default: |
b237eb25d hwmon: (dme1737) ... |
1443 1444 |
dev_dbg(dev, "Unknown function %d. ", fn); |
9431996f5 hwmon: New SMSC D... |
1445 1446 1447 1448 1449 1450 1451 1452 1453 1454 1455 1456 1457 1458 1459 1460 1461 1462 1463 1464 1465 1466 1467 1468 |
} exit: mutex_unlock(&data->update_lock); return count; } /* --------------------------------------------------------------------- * Miscellaneous sysfs attributes * --------------------------------------------------------------------- */ static ssize_t show_vrm(struct device *dev, struct device_attribute *attr, char *buf) { struct i2c_client *client = to_i2c_client(dev); struct dme1737_data *data = i2c_get_clientdata(client); return sprintf(buf, "%d ", data->vrm); } static ssize_t set_vrm(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { |
b237eb25d hwmon: (dme1737) ... |
1469 |
struct dme1737_data *data = dev_get_drvdata(dev); |
d58e47d78 hwmon: (dme1737) ... |
1470 |
unsigned long val; |
c8de83624 hwmon: (dme1737) ... |
1471 |
int err; |
d58e47d78 hwmon: (dme1737) ... |
1472 |
err = kstrtoul(buf, 10, &val); |
c8de83624 hwmon: (dme1737) ... |
1473 1474 |
if (err) return err; |
9431996f5 hwmon: New SMSC D... |
1475 |
|
d58e47d78 hwmon: (dme1737) ... |
1476 1477 |
if (val > 255) return -EINVAL; |
9431996f5 hwmon: New SMSC D... |
1478 1479 1480 1481 1482 1483 1484 1485 1486 1487 1488 1489 |
data->vrm = val; return count; } static ssize_t show_vid(struct device *dev, struct device_attribute *attr, char *buf) { struct dme1737_data *data = dme1737_update_device(dev); return sprintf(buf, "%d ", vid_from_reg(data->vid, data->vrm)); } |
e95c237d7 hwmon: (dme1737) ... |
1490 1491 1492 1493 |
static ssize_t show_name(struct device *dev, struct device_attribute *attr, char *buf) { struct dme1737_data *data = dev_get_drvdata(dev); |
dbc2bc251 hwmon: (dme1737) ... |
1494 1495 |
return sprintf(buf, "%s ", data->name); |
e95c237d7 hwmon: (dme1737) ... |
1496 |
} |
9431996f5 hwmon: New SMSC D... |
1497 1498 1499 |
/* --------------------------------------------------------------------- * Sysfs device attribute defines and structs * --------------------------------------------------------------------- */ |
d4b94e1fa hwmon: (dme1737) ... |
1500 |
/* Voltages 0-7 */ |
9431996f5 hwmon: New SMSC D... |
1501 1502 1503 |
#define SENSOR_DEVICE_ATTR_IN(ix) \ static SENSOR_DEVICE_ATTR_2(in##ix##_input, S_IRUGO, \ |
b237eb25d hwmon: (dme1737) ... |
1504 |
show_in, NULL, SYS_IN_INPUT, ix); \ |
9431996f5 hwmon: New SMSC D... |
1505 |
static SENSOR_DEVICE_ATTR_2(in##ix##_min, S_IRUGO | S_IWUSR, \ |
b237eb25d hwmon: (dme1737) ... |
1506 |
show_in, set_in, SYS_IN_MIN, ix); \ |
9431996f5 hwmon: New SMSC D... |
1507 |
static SENSOR_DEVICE_ATTR_2(in##ix##_max, S_IRUGO | S_IWUSR, \ |
b237eb25d hwmon: (dme1737) ... |
1508 |
show_in, set_in, SYS_IN_MAX, ix); \ |
9431996f5 hwmon: New SMSC D... |
1509 |
static SENSOR_DEVICE_ATTR_2(in##ix##_alarm, S_IRUGO, \ |
b237eb25d hwmon: (dme1737) ... |
1510 |
show_in, NULL, SYS_IN_ALARM, ix) |
9431996f5 hwmon: New SMSC D... |
1511 1512 1513 1514 1515 1516 1517 1518 |
SENSOR_DEVICE_ATTR_IN(0); SENSOR_DEVICE_ATTR_IN(1); SENSOR_DEVICE_ATTR_IN(2); SENSOR_DEVICE_ATTR_IN(3); SENSOR_DEVICE_ATTR_IN(4); SENSOR_DEVICE_ATTR_IN(5); SENSOR_DEVICE_ATTR_IN(6); |
d4b94e1fa hwmon: (dme1737) ... |
1519 |
SENSOR_DEVICE_ATTR_IN(7); |
9431996f5 hwmon: New SMSC D... |
1520 1521 1522 1523 1524 |
/* Temperatures 1-3 */ #define SENSOR_DEVICE_ATTR_TEMP(ix) \ static SENSOR_DEVICE_ATTR_2(temp##ix##_input, S_IRUGO, \ |
b237eb25d hwmon: (dme1737) ... |
1525 |
show_temp, NULL, SYS_TEMP_INPUT, ix-1); \ |
9431996f5 hwmon: New SMSC D... |
1526 |
static SENSOR_DEVICE_ATTR_2(temp##ix##_min, S_IRUGO | S_IWUSR, \ |
b237eb25d hwmon: (dme1737) ... |
1527 |
show_temp, set_temp, SYS_TEMP_MIN, ix-1); \ |
9431996f5 hwmon: New SMSC D... |
1528 |
static SENSOR_DEVICE_ATTR_2(temp##ix##_max, S_IRUGO | S_IWUSR, \ |
b237eb25d hwmon: (dme1737) ... |
1529 |
show_temp, set_temp, SYS_TEMP_MAX, ix-1); \ |
9431996f5 hwmon: New SMSC D... |
1530 |
static SENSOR_DEVICE_ATTR_2(temp##ix##_offset, S_IRUGO, \ |
b237eb25d hwmon: (dme1737) ... |
1531 |
show_temp, set_temp, SYS_TEMP_OFFSET, ix-1); \ |
9431996f5 hwmon: New SMSC D... |
1532 |
static SENSOR_DEVICE_ATTR_2(temp##ix##_alarm, S_IRUGO, \ |
b237eb25d hwmon: (dme1737) ... |
1533 |
show_temp, NULL, SYS_TEMP_ALARM, ix-1); \ |
9431996f5 hwmon: New SMSC D... |
1534 |
static SENSOR_DEVICE_ATTR_2(temp##ix##_fault, S_IRUGO, \ |
b237eb25d hwmon: (dme1737) ... |
1535 |
show_temp, NULL, SYS_TEMP_FAULT, ix-1) |
9431996f5 hwmon: New SMSC D... |
1536 1537 1538 1539 1540 1541 1542 1543 1544 |
SENSOR_DEVICE_ATTR_TEMP(1); SENSOR_DEVICE_ATTR_TEMP(2); SENSOR_DEVICE_ATTR_TEMP(3); /* Zones 1-3 */ #define SENSOR_DEVICE_ATTR_ZONE(ix) \ static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_channels_temp, S_IRUGO, \ |
b237eb25d hwmon: (dme1737) ... |
1545 |
show_zone, NULL, SYS_ZONE_AUTO_CHANNELS_TEMP, ix-1); \ |
9431996f5 hwmon: New SMSC D... |
1546 |
static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point1_temp_hyst, S_IRUGO, \ |
b237eb25d hwmon: (dme1737) ... |
1547 |
show_zone, set_zone, SYS_ZONE_AUTO_POINT1_TEMP_HYST, ix-1); \ |
9431996f5 hwmon: New SMSC D... |
1548 |
static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point1_temp, S_IRUGO, \ |
b237eb25d hwmon: (dme1737) ... |
1549 |
show_zone, set_zone, SYS_ZONE_AUTO_POINT1_TEMP, ix-1); \ |
9431996f5 hwmon: New SMSC D... |
1550 |
static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point2_temp, S_IRUGO, \ |
b237eb25d hwmon: (dme1737) ... |
1551 |
show_zone, set_zone, SYS_ZONE_AUTO_POINT2_TEMP, ix-1); \ |
9431996f5 hwmon: New SMSC D... |
1552 |
static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point3_temp, S_IRUGO, \ |
b237eb25d hwmon: (dme1737) ... |
1553 |
show_zone, set_zone, SYS_ZONE_AUTO_POINT3_TEMP, ix-1) |
9431996f5 hwmon: New SMSC D... |
1554 1555 1556 1557 1558 1559 1560 1561 1562 |
SENSOR_DEVICE_ATTR_ZONE(1); SENSOR_DEVICE_ATTR_ZONE(2); SENSOR_DEVICE_ATTR_ZONE(3); /* Fans 1-4 */ #define SENSOR_DEVICE_ATTR_FAN_1TO4(ix) \ static SENSOR_DEVICE_ATTR_2(fan##ix##_input, S_IRUGO, \ |
b237eb25d hwmon: (dme1737) ... |
1563 |
show_fan, NULL, SYS_FAN_INPUT, ix-1); \ |
9431996f5 hwmon: New SMSC D... |
1564 |
static SENSOR_DEVICE_ATTR_2(fan##ix##_min, S_IRUGO | S_IWUSR, \ |
b237eb25d hwmon: (dme1737) ... |
1565 |
show_fan, set_fan, SYS_FAN_MIN, ix-1); \ |
9431996f5 hwmon: New SMSC D... |
1566 |
static SENSOR_DEVICE_ATTR_2(fan##ix##_alarm, S_IRUGO, \ |
b237eb25d hwmon: (dme1737) ... |
1567 |
show_fan, NULL, SYS_FAN_ALARM, ix-1); \ |
9431996f5 hwmon: New SMSC D... |
1568 |
static SENSOR_DEVICE_ATTR_2(fan##ix##_type, S_IRUGO | S_IWUSR, \ |
b237eb25d hwmon: (dme1737) ... |
1569 |
show_fan, set_fan, SYS_FAN_TYPE, ix-1) |
9431996f5 hwmon: New SMSC D... |
1570 1571 1572 1573 1574 1575 1576 1577 1578 1579 |
SENSOR_DEVICE_ATTR_FAN_1TO4(1); SENSOR_DEVICE_ATTR_FAN_1TO4(2); SENSOR_DEVICE_ATTR_FAN_1TO4(3); SENSOR_DEVICE_ATTR_FAN_1TO4(4); /* Fans 5-6 */ #define SENSOR_DEVICE_ATTR_FAN_5TO6(ix) \ static SENSOR_DEVICE_ATTR_2(fan##ix##_input, S_IRUGO, \ |
b237eb25d hwmon: (dme1737) ... |
1580 |
show_fan, NULL, SYS_FAN_INPUT, ix-1); \ |
9431996f5 hwmon: New SMSC D... |
1581 |
static SENSOR_DEVICE_ATTR_2(fan##ix##_min, S_IRUGO | S_IWUSR, \ |
b237eb25d hwmon: (dme1737) ... |
1582 |
show_fan, set_fan, SYS_FAN_MIN, ix-1); \ |
9431996f5 hwmon: New SMSC D... |
1583 |
static SENSOR_DEVICE_ATTR_2(fan##ix##_alarm, S_IRUGO, \ |
b237eb25d hwmon: (dme1737) ... |
1584 |
show_fan, NULL, SYS_FAN_ALARM, ix-1); \ |
9431996f5 hwmon: New SMSC D... |
1585 |
static SENSOR_DEVICE_ATTR_2(fan##ix##_max, S_IRUGO | S_IWUSR, \ |
b237eb25d hwmon: (dme1737) ... |
1586 |
show_fan, set_fan, SYS_FAN_MAX, ix-1) |
9431996f5 hwmon: New SMSC D... |
1587 1588 1589 1590 1591 1592 1593 1594 |
SENSOR_DEVICE_ATTR_FAN_5TO6(5); SENSOR_DEVICE_ATTR_FAN_5TO6(6); /* PWMs 1-3 */ #define SENSOR_DEVICE_ATTR_PWM_1TO3(ix) \ static SENSOR_DEVICE_ATTR_2(pwm##ix, S_IRUGO, \ |
b237eb25d hwmon: (dme1737) ... |
1595 |
show_pwm, set_pwm, SYS_PWM, ix-1); \ |
9431996f5 hwmon: New SMSC D... |
1596 |
static SENSOR_DEVICE_ATTR_2(pwm##ix##_freq, S_IRUGO, \ |
b237eb25d hwmon: (dme1737) ... |
1597 |
show_pwm, set_pwm, SYS_PWM_FREQ, ix-1); \ |
9431996f5 hwmon: New SMSC D... |
1598 |
static SENSOR_DEVICE_ATTR_2(pwm##ix##_enable, S_IRUGO, \ |
b237eb25d hwmon: (dme1737) ... |
1599 |
show_pwm, set_pwm, SYS_PWM_ENABLE, ix-1); \ |
9431996f5 hwmon: New SMSC D... |
1600 |
static SENSOR_DEVICE_ATTR_2(pwm##ix##_ramp_rate, S_IRUGO, \ |
b237eb25d hwmon: (dme1737) ... |
1601 |
show_pwm, set_pwm, SYS_PWM_RAMP_RATE, ix-1); \ |
9431996f5 hwmon: New SMSC D... |
1602 |
static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_channels_zone, S_IRUGO, \ |
b237eb25d hwmon: (dme1737) ... |
1603 |
show_pwm, set_pwm, SYS_PWM_AUTO_CHANNELS_ZONE, ix-1); \ |
9431996f5 hwmon: New SMSC D... |
1604 |
static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_pwm_min, S_IRUGO, \ |
b237eb25d hwmon: (dme1737) ... |
1605 |
show_pwm, set_pwm, SYS_PWM_AUTO_PWM_MIN, ix-1); \ |
9431996f5 hwmon: New SMSC D... |
1606 |
static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_point1_pwm, S_IRUGO, \ |
b237eb25d hwmon: (dme1737) ... |
1607 |
show_pwm, set_pwm, SYS_PWM_AUTO_POINT1_PWM, ix-1); \ |
9431996f5 hwmon: New SMSC D... |
1608 |
static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_point2_pwm, S_IRUGO, \ |
b237eb25d hwmon: (dme1737) ... |
1609 |
show_pwm, NULL, SYS_PWM_AUTO_POINT2_PWM, ix-1) |
9431996f5 hwmon: New SMSC D... |
1610 1611 1612 1613 1614 1615 1616 1617 |
SENSOR_DEVICE_ATTR_PWM_1TO3(1); SENSOR_DEVICE_ATTR_PWM_1TO3(2); SENSOR_DEVICE_ATTR_PWM_1TO3(3); /* PWMs 5-6 */ #define SENSOR_DEVICE_ATTR_PWM_5TO6(ix) \ |
9b257714a hwmon: (dme1737) ... |
1618 |
static SENSOR_DEVICE_ATTR_2(pwm##ix, S_IRUGO, \ |
b237eb25d hwmon: (dme1737) ... |
1619 |
show_pwm, set_pwm, SYS_PWM, ix-1); \ |
9b257714a hwmon: (dme1737) ... |
1620 |
static SENSOR_DEVICE_ATTR_2(pwm##ix##_freq, S_IRUGO, \ |
b237eb25d hwmon: (dme1737) ... |
1621 |
show_pwm, set_pwm, SYS_PWM_FREQ, ix-1); \ |
9431996f5 hwmon: New SMSC D... |
1622 |
static SENSOR_DEVICE_ATTR_2(pwm##ix##_enable, S_IRUGO, \ |
b237eb25d hwmon: (dme1737) ... |
1623 |
show_pwm, NULL, SYS_PWM_ENABLE, ix-1) |
9431996f5 hwmon: New SMSC D... |
1624 1625 1626 1627 1628 1629 1630 1631 |
SENSOR_DEVICE_ATTR_PWM_5TO6(5); SENSOR_DEVICE_ATTR_PWM_5TO6(6); /* Misc */ static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm, set_vrm); static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL); |
e95c237d7 hwmon: (dme1737) ... |
1632 |
static DEVICE_ATTR(name, S_IRUGO, show_name, NULL); /* for ISA devices */ |
9431996f5 hwmon: New SMSC D... |
1633 |
|
c8de83624 hwmon: (dme1737) ... |
1634 1635 |
/* * This struct holds all the attributes that are always present and need to be |
9431996f5 hwmon: New SMSC D... |
1636 1637 |
* created unconditionally. The attributes that need modification of their * permissions are created read-only and write permissions are added or removed |
c8de83624 hwmon: (dme1737) ... |
1638 1639 |
* on the fly when required */ |
06f3d9fb4 hwmon: (dme1737) ... |
1640 |
static struct attribute *dme1737_attr[] = { |
b237eb25d hwmon: (dme1737) ... |
1641 |
/* Voltages */ |
9b257714a hwmon: (dme1737) ... |
1642 1643 1644 1645 1646 1647 1648 1649 1650 1651 1652 1653 1654 1655 1656 1657 1658 1659 1660 1661 1662 1663 1664 1665 1666 1667 1668 1669 |
&sensor_dev_attr_in0_input.dev_attr.attr, &sensor_dev_attr_in0_min.dev_attr.attr, &sensor_dev_attr_in0_max.dev_attr.attr, &sensor_dev_attr_in0_alarm.dev_attr.attr, &sensor_dev_attr_in1_input.dev_attr.attr, &sensor_dev_attr_in1_min.dev_attr.attr, &sensor_dev_attr_in1_max.dev_attr.attr, &sensor_dev_attr_in1_alarm.dev_attr.attr, &sensor_dev_attr_in2_input.dev_attr.attr, &sensor_dev_attr_in2_min.dev_attr.attr, &sensor_dev_attr_in2_max.dev_attr.attr, &sensor_dev_attr_in2_alarm.dev_attr.attr, &sensor_dev_attr_in3_input.dev_attr.attr, &sensor_dev_attr_in3_min.dev_attr.attr, &sensor_dev_attr_in3_max.dev_attr.attr, &sensor_dev_attr_in3_alarm.dev_attr.attr, &sensor_dev_attr_in4_input.dev_attr.attr, &sensor_dev_attr_in4_min.dev_attr.attr, &sensor_dev_attr_in4_max.dev_attr.attr, &sensor_dev_attr_in4_alarm.dev_attr.attr, &sensor_dev_attr_in5_input.dev_attr.attr, &sensor_dev_attr_in5_min.dev_attr.attr, &sensor_dev_attr_in5_max.dev_attr.attr, &sensor_dev_attr_in5_alarm.dev_attr.attr, &sensor_dev_attr_in6_input.dev_attr.attr, &sensor_dev_attr_in6_min.dev_attr.attr, &sensor_dev_attr_in6_max.dev_attr.attr, &sensor_dev_attr_in6_alarm.dev_attr.attr, |
b237eb25d hwmon: (dme1737) ... |
1670 |
/* Temperatures */ |
9b257714a hwmon: (dme1737) ... |
1671 1672 1673 1674 1675 |
&sensor_dev_attr_temp1_input.dev_attr.attr, &sensor_dev_attr_temp1_min.dev_attr.attr, &sensor_dev_attr_temp1_max.dev_attr.attr, &sensor_dev_attr_temp1_alarm.dev_attr.attr, &sensor_dev_attr_temp1_fault.dev_attr.attr, |
9b257714a hwmon: (dme1737) ... |
1676 1677 1678 1679 1680 |
&sensor_dev_attr_temp2_input.dev_attr.attr, &sensor_dev_attr_temp2_min.dev_attr.attr, &sensor_dev_attr_temp2_max.dev_attr.attr, &sensor_dev_attr_temp2_alarm.dev_attr.attr, &sensor_dev_attr_temp2_fault.dev_attr.attr, |
9b257714a hwmon: (dme1737) ... |
1681 1682 1683 1684 1685 |
&sensor_dev_attr_temp3_input.dev_attr.attr, &sensor_dev_attr_temp3_min.dev_attr.attr, &sensor_dev_attr_temp3_max.dev_attr.attr, &sensor_dev_attr_temp3_alarm.dev_attr.attr, &sensor_dev_attr_temp3_fault.dev_attr.attr, |
b237eb25d hwmon: (dme1737) ... |
1686 |
/* Zones */ |
9b257714a hwmon: (dme1737) ... |
1687 1688 1689 1690 |
&sensor_dev_attr_zone1_auto_point1_temp.dev_attr.attr, &sensor_dev_attr_zone1_auto_point2_temp.dev_attr.attr, &sensor_dev_attr_zone1_auto_point3_temp.dev_attr.attr, &sensor_dev_attr_zone1_auto_channels_temp.dev_attr.attr, |
9b257714a hwmon: (dme1737) ... |
1691 1692 1693 1694 |
&sensor_dev_attr_zone2_auto_point1_temp.dev_attr.attr, &sensor_dev_attr_zone2_auto_point2_temp.dev_attr.attr, &sensor_dev_attr_zone2_auto_point3_temp.dev_attr.attr, &sensor_dev_attr_zone2_auto_channels_temp.dev_attr.attr, |
549edb833 hwmon: (dme1737) ... |
1695 1696 1697 1698 1699 1700 |
NULL }; static const struct attribute_group dme1737_group = { .attrs = dme1737_attr, }; |
c8de83624 hwmon: (dme1737) ... |
1701 1702 |
/* * The following struct holds temp offset attributes, which are not available |
ea694431f hwmon: (dme1737) ... |
1703 |
* in all chips. The following chips support them: |
c8de83624 hwmon: (dme1737) ... |
1704 1705 |
* DME1737, SCH311x */ |
ea694431f hwmon: (dme1737) ... |
1706 |
static struct attribute *dme1737_temp_offset_attr[] = { |
549edb833 hwmon: (dme1737) ... |
1707 1708 1709 |
&sensor_dev_attr_temp1_offset.dev_attr.attr, &sensor_dev_attr_temp2_offset.dev_attr.attr, &sensor_dev_attr_temp3_offset.dev_attr.attr, |
9431996f5 hwmon: New SMSC D... |
1710 1711 |
NULL }; |
ea694431f hwmon: (dme1737) ... |
1712 1713 |
static const struct attribute_group dme1737_temp_offset_group = { .attrs = dme1737_temp_offset_attr, |
9431996f5 hwmon: New SMSC D... |
1714 |
}; |
c8de83624 hwmon: (dme1737) ... |
1715 1716 |
/* * The following struct holds VID related attributes, which are not available |
ea694431f hwmon: (dme1737) ... |
1717 |
* in all chips. The following chips support them: |
c8de83624 hwmon: (dme1737) ... |
1718 1719 |
* DME1737 */ |
9d0914468 hwmon: (dme1737) ... |
1720 1721 1722 1723 1724 1725 1726 1727 1728 |
static struct attribute *dme1737_vid_attr[] = { &dev_attr_vrm.attr, &dev_attr_cpu0_vid.attr, NULL }; static const struct attribute_group dme1737_vid_group = { .attrs = dme1737_vid_attr, }; |
c8de83624 hwmon: (dme1737) ... |
1729 1730 |
/* * The following struct holds temp zone 3 related attributes, which are not |
ea694431f hwmon: (dme1737) ... |
1731 |
* available in all chips. The following chips support them: |
c8de83624 hwmon: (dme1737) ... |
1732 1733 |
* DME1737, SCH311x, SCH5027 */ |
ea694431f hwmon: (dme1737) ... |
1734 1735 1736 1737 1738 1739 1740 1741 1742 1743 1744 |
static struct attribute *dme1737_zone3_attr[] = { &sensor_dev_attr_zone3_auto_point1_temp.dev_attr.attr, &sensor_dev_attr_zone3_auto_point2_temp.dev_attr.attr, &sensor_dev_attr_zone3_auto_point3_temp.dev_attr.attr, &sensor_dev_attr_zone3_auto_channels_temp.dev_attr.attr, NULL }; static const struct attribute_group dme1737_zone3_group = { .attrs = dme1737_zone3_attr, }; |
c8de83624 hwmon: (dme1737) ... |
1745 1746 |
/* * The following struct holds temp zone hysteresis related attributes, which |
ea694431f hwmon: (dme1737) ... |
1747 |
* are not available in all chips. The following chips support them: |
c8de83624 hwmon: (dme1737) ... |
1748 1749 |
* DME1737, SCH311x */ |
ea694431f hwmon: (dme1737) ... |
1750 1751 1752 1753 1754 1755 1756 1757 1758 1759 |
static struct attribute *dme1737_zone_hyst_attr[] = { &sensor_dev_attr_zone1_auto_point1_temp_hyst.dev_attr.attr, &sensor_dev_attr_zone2_auto_point1_temp_hyst.dev_attr.attr, &sensor_dev_attr_zone3_auto_point1_temp_hyst.dev_attr.attr, NULL }; static const struct attribute_group dme1737_zone_hyst_group = { .attrs = dme1737_zone_hyst_attr, }; |
c8de83624 hwmon: (dme1737) ... |
1760 1761 |
/* * The following struct holds voltage in7 related attributes, which |
d4b94e1fa hwmon: (dme1737) ... |
1762 |
* are not available in all chips. The following chips support them: |
c8de83624 hwmon: (dme1737) ... |
1763 1764 |
* SCH5127 */ |
d4b94e1fa hwmon: (dme1737) ... |
1765 1766 1767 1768 1769 1770 1771 1772 1773 1774 1775 |
static struct attribute *dme1737_in7_attr[] = { &sensor_dev_attr_in7_input.dev_attr.attr, &sensor_dev_attr_in7_min.dev_attr.attr, &sensor_dev_attr_in7_max.dev_attr.attr, &sensor_dev_attr_in7_alarm.dev_attr.attr, NULL }; static const struct attribute_group dme1737_in7_group = { .attrs = dme1737_in7_attr, }; |
c8de83624 hwmon: (dme1737) ... |
1776 1777 |
/* * The following structs hold the PWM attributes, some of which are optional. |
9431996f5 hwmon: New SMSC D... |
1778 |
* Their creation depends on the chip configuration which is determined during |
c8de83624 hwmon: (dme1737) ... |
1779 1780 |
* module load. */ |
73ce48f6c hwmon: (dme1737) ... |
1781 |
static struct attribute *dme1737_pwm1_attr[] = { |
9b257714a hwmon: (dme1737) ... |
1782 1783 1784 1785 1786 |
&sensor_dev_attr_pwm1.dev_attr.attr, &sensor_dev_attr_pwm1_freq.dev_attr.attr, &sensor_dev_attr_pwm1_enable.dev_attr.attr, &sensor_dev_attr_pwm1_ramp_rate.dev_attr.attr, &sensor_dev_attr_pwm1_auto_channels_zone.dev_attr.attr, |
9b257714a hwmon: (dme1737) ... |
1787 1788 |
&sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr, &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr, |
9431996f5 hwmon: New SMSC D... |
1789 1790 |
NULL }; |
73ce48f6c hwmon: (dme1737) ... |
1791 |
static struct attribute *dme1737_pwm2_attr[] = { |
9b257714a hwmon: (dme1737) ... |
1792 1793 1794 1795 1796 |
&sensor_dev_attr_pwm2.dev_attr.attr, &sensor_dev_attr_pwm2_freq.dev_attr.attr, &sensor_dev_attr_pwm2_enable.dev_attr.attr, &sensor_dev_attr_pwm2_ramp_rate.dev_attr.attr, &sensor_dev_attr_pwm2_auto_channels_zone.dev_attr.attr, |
9b257714a hwmon: (dme1737) ... |
1797 1798 |
&sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr, &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr, |
9431996f5 hwmon: New SMSC D... |
1799 1800 |
NULL }; |
73ce48f6c hwmon: (dme1737) ... |
1801 |
static struct attribute *dme1737_pwm3_attr[] = { |
9b257714a hwmon: (dme1737) ... |
1802 1803 1804 1805 1806 |
&sensor_dev_attr_pwm3.dev_attr.attr, &sensor_dev_attr_pwm3_freq.dev_attr.attr, &sensor_dev_attr_pwm3_enable.dev_attr.attr, &sensor_dev_attr_pwm3_ramp_rate.dev_attr.attr, &sensor_dev_attr_pwm3_auto_channels_zone.dev_attr.attr, |
9b257714a hwmon: (dme1737) ... |
1807 1808 |
&sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr, &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr, |
9431996f5 hwmon: New SMSC D... |
1809 1810 |
NULL }; |
73ce48f6c hwmon: (dme1737) ... |
1811 |
static struct attribute *dme1737_pwm5_attr[] = { |
9b257714a hwmon: (dme1737) ... |
1812 1813 1814 |
&sensor_dev_attr_pwm5.dev_attr.attr, &sensor_dev_attr_pwm5_freq.dev_attr.attr, &sensor_dev_attr_pwm5_enable.dev_attr.attr, |
9431996f5 hwmon: New SMSC D... |
1815 1816 |
NULL }; |
73ce48f6c hwmon: (dme1737) ... |
1817 |
static struct attribute *dme1737_pwm6_attr[] = { |
9b257714a hwmon: (dme1737) ... |
1818 1819 1820 |
&sensor_dev_attr_pwm6.dev_attr.attr, &sensor_dev_attr_pwm6_freq.dev_attr.attr, &sensor_dev_attr_pwm6_enable.dev_attr.attr, |
9431996f5 hwmon: New SMSC D... |
1821 1822 1823 1824 |
NULL }; static const struct attribute_group dme1737_pwm_group[] = { |
73ce48f6c hwmon: (dme1737) ... |
1825 1826 1827 |
{ .attrs = dme1737_pwm1_attr }, { .attrs = dme1737_pwm2_attr }, { .attrs = dme1737_pwm3_attr }, |
9431996f5 hwmon: New SMSC D... |
1828 |
{ .attrs = NULL }, |
73ce48f6c hwmon: (dme1737) ... |
1829 1830 |
{ .attrs = dme1737_pwm5_attr }, { .attrs = dme1737_pwm6_attr }, |
9431996f5 hwmon: New SMSC D... |
1831 |
}; |
c8de83624 hwmon: (dme1737) ... |
1832 1833 |
/* * The following struct holds auto PWM min attributes, which are not available |
ea694431f hwmon: (dme1737) ... |
1834 |
* in all chips. Their creation depends on the chip type which is determined |
c8de83624 hwmon: (dme1737) ... |
1835 1836 |
* during module load. */ |
ea694431f hwmon: (dme1737) ... |
1837 |
static struct attribute *dme1737_auto_pwm_min_attr[] = { |
549edb833 hwmon: (dme1737) ... |
1838 1839 1840 1841 |
&sensor_dev_attr_pwm1_auto_pwm_min.dev_attr.attr, &sensor_dev_attr_pwm2_auto_pwm_min.dev_attr.attr, &sensor_dev_attr_pwm3_auto_pwm_min.dev_attr.attr, }; |
c8de83624 hwmon: (dme1737) ... |
1842 1843 |
/* * The following structs hold the fan attributes, some of which are optional. |
9431996f5 hwmon: New SMSC D... |
1844 |
* Their creation depends on the chip configuration which is determined during |
c8de83624 hwmon: (dme1737) ... |
1845 1846 |
* module load. */ |
73ce48f6c hwmon: (dme1737) ... |
1847 |
static struct attribute *dme1737_fan1_attr[] = { |
9b257714a hwmon: (dme1737) ... |
1848 1849 1850 1851 |
&sensor_dev_attr_fan1_input.dev_attr.attr, &sensor_dev_attr_fan1_min.dev_attr.attr, &sensor_dev_attr_fan1_alarm.dev_attr.attr, &sensor_dev_attr_fan1_type.dev_attr.attr, |
9431996f5 hwmon: New SMSC D... |
1852 1853 |
NULL }; |
73ce48f6c hwmon: (dme1737) ... |
1854 |
static struct attribute *dme1737_fan2_attr[] = { |
9b257714a hwmon: (dme1737) ... |
1855 1856 1857 1858 |
&sensor_dev_attr_fan2_input.dev_attr.attr, &sensor_dev_attr_fan2_min.dev_attr.attr, &sensor_dev_attr_fan2_alarm.dev_attr.attr, &sensor_dev_attr_fan2_type.dev_attr.attr, |
9431996f5 hwmon: New SMSC D... |
1859 1860 |
NULL }; |
73ce48f6c hwmon: (dme1737) ... |
1861 |
static struct attribute *dme1737_fan3_attr[] = { |
9b257714a hwmon: (dme1737) ... |
1862 1863 1864 1865 |
&sensor_dev_attr_fan3_input.dev_attr.attr, &sensor_dev_attr_fan3_min.dev_attr.attr, &sensor_dev_attr_fan3_alarm.dev_attr.attr, &sensor_dev_attr_fan3_type.dev_attr.attr, |
9431996f5 hwmon: New SMSC D... |
1866 1867 |
NULL }; |
73ce48f6c hwmon: (dme1737) ... |
1868 |
static struct attribute *dme1737_fan4_attr[] = { |
9b257714a hwmon: (dme1737) ... |
1869 1870 1871 1872 |
&sensor_dev_attr_fan4_input.dev_attr.attr, &sensor_dev_attr_fan4_min.dev_attr.attr, &sensor_dev_attr_fan4_alarm.dev_attr.attr, &sensor_dev_attr_fan4_type.dev_attr.attr, |
9431996f5 hwmon: New SMSC D... |
1873 1874 |
NULL }; |
73ce48f6c hwmon: (dme1737) ... |
1875 |
static struct attribute *dme1737_fan5_attr[] = { |
9b257714a hwmon: (dme1737) ... |
1876 1877 1878 1879 |
&sensor_dev_attr_fan5_input.dev_attr.attr, &sensor_dev_attr_fan5_min.dev_attr.attr, &sensor_dev_attr_fan5_alarm.dev_attr.attr, &sensor_dev_attr_fan5_max.dev_attr.attr, |
9431996f5 hwmon: New SMSC D... |
1880 1881 |
NULL }; |
73ce48f6c hwmon: (dme1737) ... |
1882 |
static struct attribute *dme1737_fan6_attr[] = { |
9b257714a hwmon: (dme1737) ... |
1883 1884 1885 1886 |
&sensor_dev_attr_fan6_input.dev_attr.attr, &sensor_dev_attr_fan6_min.dev_attr.attr, &sensor_dev_attr_fan6_alarm.dev_attr.attr, &sensor_dev_attr_fan6_max.dev_attr.attr, |
9431996f5 hwmon: New SMSC D... |
1887 1888 1889 1890 |
NULL }; static const struct attribute_group dme1737_fan_group[] = { |
73ce48f6c hwmon: (dme1737) ... |
1891 1892 1893 1894 1895 1896 |
{ .attrs = dme1737_fan1_attr }, { .attrs = dme1737_fan2_attr }, { .attrs = dme1737_fan3_attr }, { .attrs = dme1737_fan4_attr }, { .attrs = dme1737_fan5_attr }, { .attrs = dme1737_fan6_attr }, |
9431996f5 hwmon: New SMSC D... |
1897 |
}; |
c8de83624 hwmon: (dme1737) ... |
1898 1899 1900 1901 |
/* * The permissions of the following zone attributes are changed to read- * writeable if the chip is *not* locked. Otherwise they stay read-only. */ |
549edb833 hwmon: (dme1737) ... |
1902 |
static struct attribute *dme1737_zone_chmod_attr[] = { |
9b257714a hwmon: (dme1737) ... |
1903 1904 1905 |
&sensor_dev_attr_zone1_auto_point1_temp.dev_attr.attr, &sensor_dev_attr_zone1_auto_point2_temp.dev_attr.attr, &sensor_dev_attr_zone1_auto_point3_temp.dev_attr.attr, |
9b257714a hwmon: (dme1737) ... |
1906 1907 1908 |
&sensor_dev_attr_zone2_auto_point1_temp.dev_attr.attr, &sensor_dev_attr_zone2_auto_point2_temp.dev_attr.attr, &sensor_dev_attr_zone2_auto_point3_temp.dev_attr.attr, |
ea694431f hwmon: (dme1737) ... |
1909 1910 1911 1912 1913 1914 |
NULL }; static const struct attribute_group dme1737_zone_chmod_group = { .attrs = dme1737_zone_chmod_attr, }; |
c8de83624 hwmon: (dme1737) ... |
1915 1916 1917 1918 |
/* * The permissions of the following zone 3 attributes are changed to read- * writeable if the chip is *not* locked. Otherwise they stay read-only. */ |
ea694431f hwmon: (dme1737) ... |
1919 |
static struct attribute *dme1737_zone3_chmod_attr[] = { |
9b257714a hwmon: (dme1737) ... |
1920 1921 1922 |
&sensor_dev_attr_zone3_auto_point1_temp.dev_attr.attr, &sensor_dev_attr_zone3_auto_point2_temp.dev_attr.attr, &sensor_dev_attr_zone3_auto_point3_temp.dev_attr.attr, |
9431996f5 hwmon: New SMSC D... |
1923 1924 |
NULL }; |
ea694431f hwmon: (dme1737) ... |
1925 1926 |
static const struct attribute_group dme1737_zone3_chmod_group = { .attrs = dme1737_zone3_chmod_attr, |
9431996f5 hwmon: New SMSC D... |
1927 |
}; |
c8de83624 hwmon: (dme1737) ... |
1928 1929 |
/* * The permissions of the following PWM attributes are changed to read- |
9431996f5 hwmon: New SMSC D... |
1930 |
* writeable if the chip is *not* locked and the respective PWM is available. |
c8de83624 hwmon: (dme1737) ... |
1931 1932 |
* Otherwise they stay read-only. */ |
73ce48f6c hwmon: (dme1737) ... |
1933 |
static struct attribute *dme1737_pwm1_chmod_attr[] = { |
9b257714a hwmon: (dme1737) ... |
1934 1935 1936 1937 |
&sensor_dev_attr_pwm1_freq.dev_attr.attr, &sensor_dev_attr_pwm1_enable.dev_attr.attr, &sensor_dev_attr_pwm1_ramp_rate.dev_attr.attr, &sensor_dev_attr_pwm1_auto_channels_zone.dev_attr.attr, |
9b257714a hwmon: (dme1737) ... |
1938 |
&sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr, |
9431996f5 hwmon: New SMSC D... |
1939 1940 |
NULL }; |
73ce48f6c hwmon: (dme1737) ... |
1941 |
static struct attribute *dme1737_pwm2_chmod_attr[] = { |
9b257714a hwmon: (dme1737) ... |
1942 1943 1944 1945 |
&sensor_dev_attr_pwm2_freq.dev_attr.attr, &sensor_dev_attr_pwm2_enable.dev_attr.attr, &sensor_dev_attr_pwm2_ramp_rate.dev_attr.attr, &sensor_dev_attr_pwm2_auto_channels_zone.dev_attr.attr, |
9b257714a hwmon: (dme1737) ... |
1946 |
&sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr, |
9431996f5 hwmon: New SMSC D... |
1947 1948 |
NULL }; |
73ce48f6c hwmon: (dme1737) ... |
1949 |
static struct attribute *dme1737_pwm3_chmod_attr[] = { |
9b257714a hwmon: (dme1737) ... |
1950 1951 1952 1953 |
&sensor_dev_attr_pwm3_freq.dev_attr.attr, &sensor_dev_attr_pwm3_enable.dev_attr.attr, &sensor_dev_attr_pwm3_ramp_rate.dev_attr.attr, &sensor_dev_attr_pwm3_auto_channels_zone.dev_attr.attr, |
9b257714a hwmon: (dme1737) ... |
1954 |
&sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr, |
9431996f5 hwmon: New SMSC D... |
1955 1956 |
NULL }; |
73ce48f6c hwmon: (dme1737) ... |
1957 |
static struct attribute *dme1737_pwm5_chmod_attr[] = { |
9b257714a hwmon: (dme1737) ... |
1958 1959 |
&sensor_dev_attr_pwm5.dev_attr.attr, &sensor_dev_attr_pwm5_freq.dev_attr.attr, |
9431996f5 hwmon: New SMSC D... |
1960 1961 |
NULL }; |
73ce48f6c hwmon: (dme1737) ... |
1962 |
static struct attribute *dme1737_pwm6_chmod_attr[] = { |
9b257714a hwmon: (dme1737) ... |
1963 1964 |
&sensor_dev_attr_pwm6.dev_attr.attr, &sensor_dev_attr_pwm6_freq.dev_attr.attr, |
9431996f5 hwmon: New SMSC D... |
1965 1966 |
NULL }; |
73ce48f6c hwmon: (dme1737) ... |
1967 1968 1969 1970 |
static const struct attribute_group dme1737_pwm_chmod_group[] = { { .attrs = dme1737_pwm1_chmod_attr }, { .attrs = dme1737_pwm2_chmod_attr }, { .attrs = dme1737_pwm3_chmod_attr }, |
9431996f5 hwmon: New SMSC D... |
1971 |
{ .attrs = NULL }, |
73ce48f6c hwmon: (dme1737) ... |
1972 1973 |
{ .attrs = dme1737_pwm5_chmod_attr }, { .attrs = dme1737_pwm6_chmod_attr }, |
9431996f5 hwmon: New SMSC D... |
1974 |
}; |
c8de83624 hwmon: (dme1737) ... |
1975 1976 1977 1978 |
/* * Pwm[1-3] are read-writeable if the associated pwm is in manual mode and the * chip is not locked. Otherwise they are read-only. */ |
73ce48f6c hwmon: (dme1737) ... |
1979 |
static struct attribute *dme1737_pwm_chmod_attr[] = { |
9431996f5 hwmon: New SMSC D... |
1980 1981 1982 1983 1984 1985 1986 1987 |
&sensor_dev_attr_pwm1.dev_attr.attr, &sensor_dev_attr_pwm2.dev_attr.attr, &sensor_dev_attr_pwm3.dev_attr.attr, }; /* --------------------------------------------------------------------- * Super-IO functions * --------------------------------------------------------------------- */ |
b237eb25d hwmon: (dme1737) ... |
1988 1989 1990 1991 1992 1993 1994 1995 1996 |
static inline void dme1737_sio_enter(int sio_cip) { outb(0x55, sio_cip); } static inline void dme1737_sio_exit(int sio_cip) { outb(0xaa, sio_cip); } |
9431996f5 hwmon: New SMSC D... |
1997 1998 1999 2000 2001 2002 2003 2004 2005 2006 2007 |
static inline int dme1737_sio_inb(int sio_cip, int reg) { outb(reg, sio_cip); return inb(sio_cip + 1); } static inline void dme1737_sio_outb(int sio_cip, int reg, int val) { outb(reg, sio_cip); outb(val, sio_cip + 1); } |
9431996f5 hwmon: New SMSC D... |
2008 |
/* --------------------------------------------------------------------- |
e95c237d7 hwmon: (dme1737) ... |
2009 |
* Device initialization |
9431996f5 hwmon: New SMSC D... |
2010 |
* --------------------------------------------------------------------- */ |
67e2f3285 hwmon: (dme1737) ... |
2011 |
static int dme1737_i2c_get_features(int, struct dme1737_data*); |
9431996f5 hwmon: New SMSC D... |
2012 |
|
b237eb25d hwmon: (dme1737) ... |
2013 |
static void dme1737_chmod_file(struct device *dev, |
48176a973 switch sysfs_chmo... |
2014 |
struct attribute *attr, umode_t mode) |
9431996f5 hwmon: New SMSC D... |
2015 |
{ |
b237eb25d hwmon: (dme1737) ... |
2016 2017 2018 |
if (sysfs_chmod_file(&dev->kobj, attr, mode)) { dev_warn(dev, "Failed to change permissions of %s. ", |
9431996f5 hwmon: New SMSC D... |
2019 2020 2021 |
attr->name); } } |
b237eb25d hwmon: (dme1737) ... |
2022 |
static void dme1737_chmod_group(struct device *dev, |
9431996f5 hwmon: New SMSC D... |
2023 |
const struct attribute_group *group, |
48176a973 switch sysfs_chmo... |
2024 |
umode_t mode) |
9431996f5 hwmon: New SMSC D... |
2025 2026 |
{ struct attribute **attr; |
c8de83624 hwmon: (dme1737) ... |
2027 |
for (attr = group->attrs; *attr; attr++) |
b237eb25d hwmon: (dme1737) ... |
2028 |
dme1737_chmod_file(dev, *attr, mode); |
9431996f5 hwmon: New SMSC D... |
2029 |
} |
b237eb25d hwmon: (dme1737) ... |
2030 |
static void dme1737_remove_files(struct device *dev) |
9431996f5 hwmon: New SMSC D... |
2031 |
{ |
b237eb25d hwmon: (dme1737) ... |
2032 2033 2034 2035 |
struct dme1737_data *data = dev_get_drvdata(dev); int ix; for (ix = 0; ix < ARRAY_SIZE(dme1737_fan_group); ix++) { |
ea694431f hwmon: (dme1737) ... |
2036 |
if (data->has_features & HAS_FAN(ix)) { |
b237eb25d hwmon: (dme1737) ... |
2037 2038 2039 2040 2041 2042 |
sysfs_remove_group(&dev->kobj, &dme1737_fan_group[ix]); } } for (ix = 0; ix < ARRAY_SIZE(dme1737_pwm_group); ix++) { |
ea694431f hwmon: (dme1737) ... |
2043 |
if (data->has_features & HAS_PWM(ix)) { |
b237eb25d hwmon: (dme1737) ... |
2044 2045 |
sysfs_remove_group(&dev->kobj, &dme1737_pwm_group[ix]); |
ea694431f hwmon: (dme1737) ... |
2046 |
if ((data->has_features & HAS_PWM_MIN) && ix < 3) { |
549edb833 hwmon: (dme1737) ... |
2047 |
sysfs_remove_file(&dev->kobj, |
ea694431f hwmon: (dme1737) ... |
2048 |
dme1737_auto_pwm_min_attr[ix]); |
549edb833 hwmon: (dme1737) ... |
2049 |
} |
b237eb25d hwmon: (dme1737) ... |
2050 2051 |
} } |
c8de83624 hwmon: (dme1737) ... |
2052 |
if (data->has_features & HAS_TEMP_OFFSET) |
ea694431f hwmon: (dme1737) ... |
2053 |
sysfs_remove_group(&dev->kobj, &dme1737_temp_offset_group); |
c8de83624 hwmon: (dme1737) ... |
2054 |
if (data->has_features & HAS_VID) |
9d0914468 hwmon: (dme1737) ... |
2055 |
sysfs_remove_group(&dev->kobj, &dme1737_vid_group); |
c8de83624 hwmon: (dme1737) ... |
2056 |
if (data->has_features & HAS_ZONE3) |
ea694431f hwmon: (dme1737) ... |
2057 |
sysfs_remove_group(&dev->kobj, &dme1737_zone3_group); |
c8de83624 hwmon: (dme1737) ... |
2058 |
if (data->has_features & HAS_ZONE_HYST) |
ea694431f hwmon: (dme1737) ... |
2059 |
sysfs_remove_group(&dev->kobj, &dme1737_zone_hyst_group); |
c8de83624 hwmon: (dme1737) ... |
2060 |
if (data->has_features & HAS_IN7) |
d4b94e1fa hwmon: (dme1737) ... |
2061 |
sysfs_remove_group(&dev->kobj, &dme1737_in7_group); |
b237eb25d hwmon: (dme1737) ... |
2062 |
sysfs_remove_group(&dev->kobj, &dme1737_group); |
e95c237d7 hwmon: (dme1737) ... |
2063 |
|
c8de83624 hwmon: (dme1737) ... |
2064 |
if (!data->client) |
e95c237d7 hwmon: (dme1737) ... |
2065 |
sysfs_remove_file(&dev->kobj, &dev_attr_name.attr); |
b237eb25d hwmon: (dme1737) ... |
2066 2067 2068 2069 2070 2071 |
} static int dme1737_create_files(struct device *dev) { struct dme1737_data *data = dev_get_drvdata(dev); int err, ix; |
e95c237d7 hwmon: (dme1737) ... |
2072 |
/* Create a name attribute for ISA devices */ |
06f3d9fb4 hwmon: (dme1737) ... |
2073 2074 |
if (!data->client) { err = sysfs_create_file(&dev->kobj, &dev_attr_name.attr); |
c8de83624 hwmon: (dme1737) ... |
2075 |
if (err) |
06f3d9fb4 hwmon: (dme1737) ... |
2076 |
goto exit; |
e95c237d7 hwmon: (dme1737) ... |
2077 |
} |
b237eb25d hwmon: (dme1737) ... |
2078 |
/* Create standard sysfs attributes */ |
06f3d9fb4 hwmon: (dme1737) ... |
2079 |
err = sysfs_create_group(&dev->kobj, &dme1737_group); |
c8de83624 hwmon: (dme1737) ... |
2080 |
if (err) |
e95c237d7 hwmon: (dme1737) ... |
2081 |
goto exit_remove; |
b237eb25d hwmon: (dme1737) ... |
2082 |
|
ea694431f hwmon: (dme1737) ... |
2083 |
/* Create chip-dependent sysfs attributes */ |
06f3d9fb4 hwmon: (dme1737) ... |
2084 2085 2086 |
if (data->has_features & HAS_TEMP_OFFSET) { err = sysfs_create_group(&dev->kobj, &dme1737_temp_offset_group); |
c8de83624 hwmon: (dme1737) ... |
2087 |
if (err) |
06f3d9fb4 hwmon: (dme1737) ... |
2088 |
goto exit_remove; |
549edb833 hwmon: (dme1737) ... |
2089 |
} |
06f3d9fb4 hwmon: (dme1737) ... |
2090 2091 |
if (data->has_features & HAS_VID) { err = sysfs_create_group(&dev->kobj, &dme1737_vid_group); |
c8de83624 hwmon: (dme1737) ... |
2092 |
if (err) |
06f3d9fb4 hwmon: (dme1737) ... |
2093 |
goto exit_remove; |
9d0914468 hwmon: (dme1737) ... |
2094 |
} |
06f3d9fb4 hwmon: (dme1737) ... |
2095 2096 |
if (data->has_features & HAS_ZONE3) { err = sysfs_create_group(&dev->kobj, &dme1737_zone3_group); |
c8de83624 hwmon: (dme1737) ... |
2097 |
if (err) |
06f3d9fb4 hwmon: (dme1737) ... |
2098 |
goto exit_remove; |
ea694431f hwmon: (dme1737) ... |
2099 |
} |
06f3d9fb4 hwmon: (dme1737) ... |
2100 2101 |
if (data->has_features & HAS_ZONE_HYST) { err = sysfs_create_group(&dev->kobj, &dme1737_zone_hyst_group); |
c8de83624 hwmon: (dme1737) ... |
2102 |
if (err) |
06f3d9fb4 hwmon: (dme1737) ... |
2103 |
goto exit_remove; |
ea694431f hwmon: (dme1737) ... |
2104 |
} |
d4b94e1fa hwmon: (dme1737) ... |
2105 2106 |
if (data->has_features & HAS_IN7) { err = sysfs_create_group(&dev->kobj, &dme1737_in7_group); |
c8de83624 hwmon: (dme1737) ... |
2107 |
if (err) |
d4b94e1fa hwmon: (dme1737) ... |
2108 |
goto exit_remove; |
d4b94e1fa hwmon: (dme1737) ... |
2109 |
} |
9d0914468 hwmon: (dme1737) ... |
2110 |
|
b237eb25d hwmon: (dme1737) ... |
2111 2112 |
/* Create fan sysfs attributes */ for (ix = 0; ix < ARRAY_SIZE(dme1737_fan_group); ix++) { |
ea694431f hwmon: (dme1737) ... |
2113 |
if (data->has_features & HAS_FAN(ix)) { |
06f3d9fb4 hwmon: (dme1737) ... |
2114 2115 |
err = sysfs_create_group(&dev->kobj, &dme1737_fan_group[ix]); |
c8de83624 hwmon: (dme1737) ... |
2116 |
if (err) |
b237eb25d hwmon: (dme1737) ... |
2117 |
goto exit_remove; |
b237eb25d hwmon: (dme1737) ... |
2118 2119 2120 2121 2122 |
} } /* Create PWM sysfs attributes */ for (ix = 0; ix < ARRAY_SIZE(dme1737_pwm_group); ix++) { |
ea694431f hwmon: (dme1737) ... |
2123 |
if (data->has_features & HAS_PWM(ix)) { |
06f3d9fb4 hwmon: (dme1737) ... |
2124 2125 |
err = sysfs_create_group(&dev->kobj, &dme1737_pwm_group[ix]); |
c8de83624 hwmon: (dme1737) ... |
2126 |
if (err) |
b237eb25d hwmon: (dme1737) ... |
2127 |
goto exit_remove; |
06f3d9fb4 hwmon: (dme1737) ... |
2128 2129 2130 |
if ((data->has_features & HAS_PWM_MIN) && (ix < 3)) { err = sysfs_create_file(&dev->kobj, dme1737_auto_pwm_min_attr[ix]); |
c8de83624 hwmon: (dme1737) ... |
2131 |
if (err) |
06f3d9fb4 hwmon: (dme1737) ... |
2132 |
goto exit_remove; |
549edb833 hwmon: (dme1737) ... |
2133 |
} |
b237eb25d hwmon: (dme1737) ... |
2134 2135 |
} } |
c8de83624 hwmon: (dme1737) ... |
2136 2137 2138 2139 |
/* * Inform if the device is locked. Otherwise change the permissions of * selected attributes from read-only to read-writeable. */ |
b237eb25d hwmon: (dme1737) ... |
2140 |
if (data->config & 0x02) { |
b55f37572 hwmon: Fix checkp... |
2141 2142 2143 |
dev_info(dev, "Device is locked. Some attributes will be read-only. "); |
b237eb25d hwmon: (dme1737) ... |
2144 |
} else { |
549edb833 hwmon: (dme1737) ... |
2145 2146 |
/* Change permissions of zone sysfs attributes */ dme1737_chmod_group(dev, &dme1737_zone_chmod_group, |
b237eb25d hwmon: (dme1737) ... |
2147 |
S_IRUGO | S_IWUSR); |
ea694431f hwmon: (dme1737) ... |
2148 2149 2150 2151 2152 2153 2154 2155 2156 2157 2158 |
/* Change permissions of chip-dependent sysfs attributes */ if (data->has_features & HAS_TEMP_OFFSET) { dme1737_chmod_group(dev, &dme1737_temp_offset_group, S_IRUGO | S_IWUSR); } if (data->has_features & HAS_ZONE3) { dme1737_chmod_group(dev, &dme1737_zone3_chmod_group, S_IRUGO | S_IWUSR); } if (data->has_features & HAS_ZONE_HYST) { dme1737_chmod_group(dev, &dme1737_zone_hyst_group, |
549edb833 hwmon: (dme1737) ... |
2159 2160 |
S_IRUGO | S_IWUSR); } |
73ce48f6c hwmon: (dme1737) ... |
2161 2162 |
/* Change permissions of PWM sysfs attributes */ for (ix = 0; ix < ARRAY_SIZE(dme1737_pwm_chmod_group); ix++) { |
ea694431f hwmon: (dme1737) ... |
2163 |
if (data->has_features & HAS_PWM(ix)) { |
b237eb25d hwmon: (dme1737) ... |
2164 |
dme1737_chmod_group(dev, |
73ce48f6c hwmon: (dme1737) ... |
2165 |
&dme1737_pwm_chmod_group[ix], |
b237eb25d hwmon: (dme1737) ... |
2166 |
S_IRUGO | S_IWUSR); |
ea694431f hwmon: (dme1737) ... |
2167 2168 |
if ((data->has_features & HAS_PWM_MIN) && ix < 3) { |
549edb833 hwmon: (dme1737) ... |
2169 |
dme1737_chmod_file(dev, |
ea694431f hwmon: (dme1737) ... |
2170 |
dme1737_auto_pwm_min_attr[ix], |
549edb833 hwmon: (dme1737) ... |
2171 2172 |
S_IRUGO | S_IWUSR); } |
b237eb25d hwmon: (dme1737) ... |
2173 2174 2175 2176 2177 |
} } /* Change permissions of pwm[1-3] if in manual mode */ for (ix = 0; ix < 3; ix++) { |
ea694431f hwmon: (dme1737) ... |
2178 |
if ((data->has_features & HAS_PWM(ix)) && |
b237eb25d hwmon: (dme1737) ... |
2179 2180 |
(PWM_EN_FROM_REG(data->pwm_config[ix]) == 1)) { dme1737_chmod_file(dev, |
73ce48f6c hwmon: (dme1737) ... |
2181 |
dme1737_pwm_chmod_attr[ix], |
b237eb25d hwmon: (dme1737) ... |
2182 2183 2184 2185 2186 2187 2188 2189 2190 2191 2192 2193 2194 2195 2196 2197 |
S_IRUGO | S_IWUSR); } } } return 0; exit_remove: dme1737_remove_files(dev); exit: return err; } static int dme1737_init_device(struct device *dev) { struct dme1737_data *data = dev_get_drvdata(dev); |
dbc2bc251 hwmon: (dme1737) ... |
2198 |
struct i2c_client *client = data->client; |
9431996f5 hwmon: New SMSC D... |
2199 2200 |
int ix; u8 reg; |
549edb833 hwmon: (dme1737) ... |
2201 2202 |
/* Point to the right nominal voltages array */ data->in_nominal = IN_NOMINAL(data->type); |
dbc2bc251 hwmon: (dme1737) ... |
2203 |
data->config = dme1737_read(data, DME1737_REG_CONFIG); |
b237eb25d hwmon: (dme1737) ... |
2204 2205 2206 |
/* Inform if part is not monitoring/started */ if (!(data->config & 0x01)) { if (!force_start) { |
b55f37572 hwmon: Fix checkp... |
2207 2208 2209 |
dev_err(dev, "Device is not monitoring. Use the force_start load parameter to override. "); |
b237eb25d hwmon: (dme1737) ... |
2210 2211 2212 2213 2214 |
return -EFAULT; } /* Force monitoring */ data->config |= 0x01; |
dbc2bc251 hwmon: (dme1737) ... |
2215 |
dme1737_write(data, DME1737_REG_CONFIG, data->config); |
b237eb25d hwmon: (dme1737) ... |
2216 |
} |
9431996f5 hwmon: New SMSC D... |
2217 2218 |
/* Inform if part is not ready */ if (!(data->config & 0x04)) { |
b237eb25d hwmon: (dme1737) ... |
2219 2220 |
dev_err(dev, "Device is not ready. "); |
9431996f5 hwmon: New SMSC D... |
2221 2222 |
return -EFAULT; } |
c8de83624 hwmon: (dme1737) ... |
2223 2224 2225 2226 |
/* * Determine which optional fan and pwm features are enabled (only * valid for I2C devices) */ |
dbc2bc251 hwmon: (dme1737) ... |
2227 2228 |
if (client) { /* I2C chip */ data->config2 = dme1737_read(data, DME1737_REG_CONFIG2); |
e95c237d7 hwmon: (dme1737) ... |
2229 |
/* Check if optional fan3 input is enabled */ |
c8de83624 hwmon: (dme1737) ... |
2230 |
if (data->config2 & 0x04) |
ea694431f hwmon: (dme1737) ... |
2231 |
data->has_features |= HAS_FAN(2); |
9431996f5 hwmon: New SMSC D... |
2232 |
|
c8de83624 hwmon: (dme1737) ... |
2233 2234 |
/* * Fan4 and pwm3 are only available if the client's I2C address |
e95c237d7 hwmon: (dme1737) ... |
2235 |
* is the default 0x2e. Otherwise the I/Os associated with |
c8de83624 hwmon: (dme1737) ... |
2236 2237 2238 |
* these functions are used for addr enable/select. */ if (client->addr == 0x2e) |
ea694431f hwmon: (dme1737) ... |
2239 |
data->has_features |= HAS_FAN(3) | HAS_PWM(2); |
9431996f5 hwmon: New SMSC D... |
2240 |
|
c8de83624 hwmon: (dme1737) ... |
2241 2242 |
/* * Determine which of the optional fan[5-6] and pwm[5-6] |
e95c237d7 hwmon: (dme1737) ... |
2243 2244 |
* features are enabled. For this, we need to query the runtime * registers through the Super-IO LPC interface. Try both |
c8de83624 hwmon: (dme1737) ... |
2245 2246 |
* config ports 0x2e and 0x4e. */ |
e95c237d7 hwmon: (dme1737) ... |
2247 2248 |
if (dme1737_i2c_get_features(0x2e, data) && dme1737_i2c_get_features(0x4e, data)) { |
b55f37572 hwmon: Fix checkp... |
2249 2250 2251 |
dev_warn(dev, "Failed to query Super-IO for optional features. "); |
e95c237d7 hwmon: (dme1737) ... |
2252 |
} |
9431996f5 hwmon: New SMSC D... |
2253 |
} |
ea694431f hwmon: (dme1737) ... |
2254 2255 2256 2257 2258 2259 2260 2261 2262 2263 2264 2265 2266 2267 2268 2269 2270 |
/* Fan[1-2] and pwm[1-2] are present in all chips */ data->has_features |= HAS_FAN(0) | HAS_FAN(1) | HAS_PWM(0) | HAS_PWM(1); /* Chip-dependent features */ switch (data->type) { case dme1737: data->has_features |= HAS_TEMP_OFFSET | HAS_VID | HAS_ZONE3 | HAS_ZONE_HYST | HAS_PWM_MIN; break; case sch311x: data->has_features |= HAS_TEMP_OFFSET | HAS_ZONE3 | HAS_ZONE_HYST | HAS_PWM_MIN | HAS_FAN(2) | HAS_PWM(2); break; case sch5027: data->has_features |= HAS_ZONE3; break; case sch5127: |
d4b94e1fa hwmon: (dme1737) ... |
2271 |
data->has_features |= HAS_FAN(2) | HAS_PWM(2) | HAS_IN7; |
ea694431f hwmon: (dme1737) ... |
2272 2273 2274 2275 |
break; default: break; } |
9431996f5 hwmon: New SMSC D... |
2276 |
|
b55f37572 hwmon: Fix checkp... |
2277 2278 2279 |
dev_info(dev, "Optional features: pwm3=%s, pwm5=%s, pwm6=%s, fan3=%s, fan4=%s, fan5=%s, fan6=%s. ", |
ea694431f hwmon: (dme1737) ... |
2280 2281 2282 2283 2284 2285 2286 |
(data->has_features & HAS_PWM(2)) ? "yes" : "no", (data->has_features & HAS_PWM(4)) ? "yes" : "no", (data->has_features & HAS_PWM(5)) ? "yes" : "no", (data->has_features & HAS_FAN(2)) ? "yes" : "no", (data->has_features & HAS_FAN(3)) ? "yes" : "no", (data->has_features & HAS_FAN(4)) ? "yes" : "no", (data->has_features & HAS_FAN(5)) ? "yes" : "no"); |
9431996f5 hwmon: New SMSC D... |
2287 |
|
dbc2bc251 hwmon: (dme1737) ... |
2288 |
reg = dme1737_read(data, DME1737_REG_TACH_PWM); |
9431996f5 hwmon: New SMSC D... |
2289 |
/* Inform if fan-to-pwm mapping differs from the default */ |
dbc2bc251 hwmon: (dme1737) ... |
2290 |
if (client && reg != 0xa4) { /* I2C chip */ |
b55f37572 hwmon: Fix checkp... |
2291 2292 2293 |
dev_warn(dev, "Non-standard fan to pwm mapping: fan1->pwm%d, fan2->pwm%d, fan3->pwm%d, fan4->pwm%d. %s ", |
9431996f5 hwmon: New SMSC D... |
2294 |
(reg & 0x03) + 1, ((reg >> 2) & 0x03) + 1, |
b55f37572 hwmon: Fix checkp... |
2295 2296 |
((reg >> 4) & 0x03) + 1, ((reg >> 6) & 0x03) + 1, DO_REPORT); |
dbc2bc251 hwmon: (dme1737) ... |
2297 |
} else if (!client && reg != 0x24) { /* ISA chip */ |
b55f37572 hwmon: Fix checkp... |
2298 2299 2300 |
dev_warn(dev, "Non-standard fan to pwm mapping: fan1->pwm%d, fan2->pwm%d, fan3->pwm%d. %s ", |
e95c237d7 hwmon: (dme1737) ... |
2301 |
(reg & 0x03) + 1, ((reg >> 2) & 0x03) + 1, |
b55f37572 hwmon: Fix checkp... |
2302 |
((reg >> 4) & 0x03) + 1, DO_REPORT); |
9431996f5 hwmon: New SMSC D... |
2303 |
} |
c8de83624 hwmon: (dme1737) ... |
2304 2305 |
/* * Switch pwm[1-3] to manual mode if they are currently disabled and |
9431996f5 hwmon: New SMSC D... |
2306 |
* set the duty-cycles to 0% (which is identical to the PWMs being |
c8de83624 hwmon: (dme1737) ... |
2307 2308 |
* disabled). */ |
9431996f5 hwmon: New SMSC D... |
2309 2310 |
if (!(data->config & 0x02)) { for (ix = 0; ix < 3; ix++) { |
dbc2bc251 hwmon: (dme1737) ... |
2311 |
data->pwm_config[ix] = dme1737_read(data, |
9431996f5 hwmon: New SMSC D... |
2312 |
DME1737_REG_PWM_CONFIG(ix)); |
ea694431f hwmon: (dme1737) ... |
2313 |
if ((data->has_features & HAS_PWM(ix)) && |
9431996f5 hwmon: New SMSC D... |
2314 |
(PWM_EN_FROM_REG(data->pwm_config[ix]) == -1)) { |
b55f37572 hwmon: Fix checkp... |
2315 2316 2317 2318 |
dev_info(dev, "Switching pwm%d to manual mode. ", ix + 1); |
9431996f5 hwmon: New SMSC D... |
2319 2320 |
data->pwm_config[ix] = PWM_EN_TO_REG(1, data->pwm_config[ix]); |
dbc2bc251 hwmon: (dme1737) ... |
2321 2322 |
dme1737_write(data, DME1737_REG_PWM(ix), 0); dme1737_write(data, |
9431996f5 hwmon: New SMSC D... |
2323 2324 2325 2326 2327 2328 2329 2330 2331 2332 2333 2334 |
DME1737_REG_PWM_CONFIG(ix), data->pwm_config[ix]); } } } /* Initialize the default PWM auto channels zone (acz) assignments */ data->pwm_acz[0] = 1; /* pwm1 -> zone1 */ data->pwm_acz[1] = 2; /* pwm2 -> zone2 */ data->pwm_acz[2] = 4; /* pwm3 -> zone3 */ /* Set VRM */ |
c8de83624 hwmon: (dme1737) ... |
2335 |
if (data->has_features & HAS_VID) |
549edb833 hwmon: (dme1737) ... |
2336 |
data->vrm = vid_which_vrm(); |
9431996f5 hwmon: New SMSC D... |
2337 2338 2339 |
return 0; } |
67e2f3285 hwmon: (dme1737) ... |
2340 2341 2342 2343 2344 2345 2346 2347 2348 2349 2350 2351 |
/* --------------------------------------------------------------------- * I2C device detection and registration * --------------------------------------------------------------------- */ static struct i2c_driver dme1737_i2c_driver; static int dme1737_i2c_get_features(int sio_cip, struct dme1737_data *data) { int err = 0, reg; u16 addr; dme1737_sio_enter(sio_cip); |
c8de83624 hwmon: (dme1737) ... |
2352 2353 2354 2355 |
/* * Check device ID * We currently know about two kinds of DME1737 and SCH5027. */ |
345a22245 hwmon: (dme1737) ... |
2356 |
reg = force_id ? force_id : dme1737_sio_inb(sio_cip, 0x20); |
ea694431f hwmon: (dme1737) ... |
2357 2358 |
if (!(reg == DME1737_ID_1 || reg == DME1737_ID_2 || reg == SCH5027_ID)) { |
67e2f3285 hwmon: (dme1737) ... |
2359 2360 2361 2362 2363 2364 2365 2366 |
err = -ENODEV; goto exit; } /* Select logical device A (runtime registers) */ dme1737_sio_outb(sio_cip, 0x07, 0x0a); /* Get the base address of the runtime registers */ |
06f3d9fb4 hwmon: (dme1737) ... |
2367 2368 2369 |
addr = (dme1737_sio_inb(sio_cip, 0x60) << 8) | dme1737_sio_inb(sio_cip, 0x61); if (!addr) { |
67e2f3285 hwmon: (dme1737) ... |
2370 2371 2372 |
err = -ENODEV; goto exit; } |
c8de83624 hwmon: (dme1737) ... |
2373 2374 |
/* * Read the runtime registers to determine which optional features |
67e2f3285 hwmon: (dme1737) ... |
2375 |
* are enabled and available. Bits [3:2] of registers 0x43-0x46 are set |
c8de83624 hwmon: (dme1737) ... |
2376 2377 2378 |
* to '10' if the respective feature is enabled. */ if ((inb(addr + 0x43) & 0x0c) == 0x08) /* fan6 */ |
ea694431f hwmon: (dme1737) ... |
2379 |
data->has_features |= HAS_FAN(5); |
c8de83624 hwmon: (dme1737) ... |
2380 |
if ((inb(addr + 0x44) & 0x0c) == 0x08) /* pwm6 */ |
ea694431f hwmon: (dme1737) ... |
2381 |
data->has_features |= HAS_PWM(5); |
c8de83624 hwmon: (dme1737) ... |
2382 |
if ((inb(addr + 0x45) & 0x0c) == 0x08) /* fan5 */ |
ea694431f hwmon: (dme1737) ... |
2383 |
data->has_features |= HAS_FAN(4); |
c8de83624 hwmon: (dme1737) ... |
2384 |
if ((inb(addr + 0x46) & 0x0c) == 0x08) /* pwm5 */ |
ea694431f hwmon: (dme1737) ... |
2385 |
data->has_features |= HAS_PWM(4); |
67e2f3285 hwmon: (dme1737) ... |
2386 2387 2388 2389 2390 2391 |
exit: dme1737_sio_exit(sio_cip); return err; } |
67a37308a hwmon: (dme1737) ... |
2392 |
/* Return 0 if detection is successful, -ENODEV otherwise */ |
310ec7921 i2c: Drop the kin... |
2393 |
static int dme1737_i2c_detect(struct i2c_client *client, |
67a37308a hwmon: (dme1737) ... |
2394 |
struct i2c_board_info *info) |
9431996f5 hwmon: New SMSC D... |
2395 |
{ |
67a37308a hwmon: (dme1737) ... |
2396 2397 |
struct i2c_adapter *adapter = client->adapter; struct device *dev = &adapter->dev; |
9431996f5 hwmon: New SMSC D... |
2398 |
u8 company, verstep = 0; |
9431996f5 hwmon: New SMSC D... |
2399 |
const char *name; |
c8de83624 hwmon: (dme1737) ... |
2400 |
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) |
67a37308a hwmon: (dme1737) ... |
2401 |
return -ENODEV; |
9431996f5 hwmon: New SMSC D... |
2402 |
|
52df6440a hwmon: Clean up d... |
2403 2404 |
company = i2c_smbus_read_byte_data(client, DME1737_REG_COMPANY); verstep = i2c_smbus_read_byte_data(client, DME1737_REG_VERSTEP); |
9431996f5 hwmon: New SMSC D... |
2405 |
|
52df6440a hwmon: Clean up d... |
2406 2407 |
if (company == DME1737_COMPANY_SMSC && verstep == SCH5027_VERSTEP) { |
549edb833 hwmon: (dme1737) ... |
2408 |
name = "sch5027"; |
52df6440a hwmon: Clean up d... |
2409 2410 |
} else if (company == DME1737_COMPANY_SMSC && (verstep & DME1737_VERSTEP_MASK) == DME1737_VERSTEP) { |
549edb833 hwmon: (dme1737) ... |
2411 |
name = "dme1737"; |
52df6440a hwmon: Clean up d... |
2412 2413 |
} else { return -ENODEV; |
549edb833 hwmon: (dme1737) ... |
2414 |
} |
9431996f5 hwmon: New SMSC D... |
2415 |
|
549edb833 hwmon: (dme1737) ... |
2416 2417 |
dev_info(dev, "Found a %s chip at 0x%02x (rev 0x%02x). ", |
52df6440a hwmon: Clean up d... |
2418 2419 |
verstep == SCH5027_VERSTEP ? "SCH5027" : "DME1737", client->addr, verstep); |
67a37308a hwmon: (dme1737) ... |
2420 2421 2422 2423 2424 2425 2426 2427 2428 2429 2430 |
strlcpy(info->type, name, I2C_NAME_SIZE); return 0; } static int dme1737_i2c_probe(struct i2c_client *client, const struct i2c_device_id *id) { struct dme1737_data *data; struct device *dev = &client->dev; int err; |
805fd8c5b hwmon: (dme1737) ... |
2431 2432 2433 |
data = devm_kzalloc(dev, sizeof(struct dme1737_data), GFP_KERNEL); if (!data) return -ENOMEM; |
67a37308a hwmon: (dme1737) ... |
2434 2435 2436 2437 2438 2439 |
i2c_set_clientdata(client, data); data->type = id->driver_data; data->client = client; data->name = client->name; mutex_init(&data->update_lock); |
b237eb25d hwmon: (dme1737) ... |
2440 |
|
9431996f5 hwmon: New SMSC D... |
2441 |
/* Initialize the DME1737 chip */ |
06f3d9fb4 hwmon: (dme1737) ... |
2442 2443 |
err = dme1737_init_device(dev); if (err) { |
b237eb25d hwmon: (dme1737) ... |
2444 2445 |
dev_err(dev, "Failed to initialize device. "); |
805fd8c5b hwmon: (dme1737) ... |
2446 |
return err; |
9431996f5 hwmon: New SMSC D... |
2447 |
} |
b237eb25d hwmon: (dme1737) ... |
2448 |
/* Create sysfs files */ |
06f3d9fb4 hwmon: (dme1737) ... |
2449 2450 |
err = dme1737_create_files(dev); if (err) { |
b237eb25d hwmon: (dme1737) ... |
2451 2452 |
dev_err(dev, "Failed to create sysfs files. "); |
805fd8c5b hwmon: (dme1737) ... |
2453 |
return err; |
9431996f5 hwmon: New SMSC D... |
2454 2455 2456 |
} /* Register device */ |
62ee3e10d hwmon: (dme1737) ... |
2457 |
data->hwmon_dev = hwmon_device_register(dev); |
1beeffe43 hwmon: Convert fr... |
2458 |
if (IS_ERR(data->hwmon_dev)) { |
b237eb25d hwmon: (dme1737) ... |
2459 2460 |
dev_err(dev, "Failed to register device. "); |
1beeffe43 hwmon: Convert fr... |
2461 |
err = PTR_ERR(data->hwmon_dev); |
9431996f5 hwmon: New SMSC D... |
2462 2463 |
goto exit_remove; } |
9431996f5 hwmon: New SMSC D... |
2464 2465 2466 |
return 0; exit_remove: |
b237eb25d hwmon: (dme1737) ... |
2467 |
dme1737_remove_files(dev); |
9431996f5 hwmon: New SMSC D... |
2468 2469 |
return err; } |
67a37308a hwmon: (dme1737) ... |
2470 |
static int dme1737_i2c_remove(struct i2c_client *client) |
9431996f5 hwmon: New SMSC D... |
2471 2472 |
{ struct dme1737_data *data = i2c_get_clientdata(client); |
9431996f5 hwmon: New SMSC D... |
2473 |
|
1beeffe43 hwmon: Convert fr... |
2474 |
hwmon_device_unregister(data->hwmon_dev); |
b237eb25d hwmon: (dme1737) ... |
2475 |
dme1737_remove_files(&client->dev); |
9431996f5 hwmon: New SMSC D... |
2476 |
|
9431996f5 hwmon: New SMSC D... |
2477 2478 |
return 0; } |
67a37308a hwmon: (dme1737) ... |
2479 2480 2481 2482 2483 2484 |
static const struct i2c_device_id dme1737_id[] = { { "dme1737", dme1737 }, { "sch5027", sch5027 }, { } }; MODULE_DEVICE_TABLE(i2c, dme1737_id); |
b237eb25d hwmon: (dme1737) ... |
2485 |
static struct i2c_driver dme1737_i2c_driver = { |
67a37308a hwmon: (dme1737) ... |
2486 |
.class = I2C_CLASS_HWMON, |
9431996f5 hwmon: New SMSC D... |
2487 2488 2489 |
.driver = { .name = "dme1737", }, |
67a37308a hwmon: (dme1737) ... |
2490 2491 2492 2493 |
.probe = dme1737_i2c_probe, .remove = dme1737_i2c_remove, .id_table = dme1737_id, .detect = dme1737_i2c_detect, |
c3813d6af i2c: Get rid of s... |
2494 |
.address_list = normal_i2c, |
9431996f5 hwmon: New SMSC D... |
2495 |
}; |
67e2f3285 hwmon: (dme1737) ... |
2496 |
/* --------------------------------------------------------------------- |
e95c237d7 hwmon: (dme1737) ... |
2497 2498 2499 2500 2501 2502 2503 2504 2505 |
* ISA device detection and registration * --------------------------------------------------------------------- */ static int __init dme1737_isa_detect(int sio_cip, unsigned short *addr) { int err = 0, reg; unsigned short base_addr; dme1737_sio_enter(sio_cip); |
c8de83624 hwmon: (dme1737) ... |
2506 2507 2508 2509 |
/* * Check device ID * We currently know about SCH3112, SCH3114, SCH3116, and SCH5127 */ |
67b671bce hwmon: Let the us... |
2510 |
reg = force_id ? force_id : dme1737_sio_inb(sio_cip, 0x20); |
ea694431f hwmon: (dme1737) ... |
2511 2512 |
if (!(reg == SCH3112_ID || reg == SCH3114_ID || reg == SCH3116_ID || reg == SCH5127_ID)) { |
e95c237d7 hwmon: (dme1737) ... |
2513 2514 2515 2516 2517 2518 2519 2520 |
err = -ENODEV; goto exit; } /* Select logical device A (runtime registers) */ dme1737_sio_outb(sio_cip, 0x07, 0x0a); /* Get the base address of the runtime registers */ |
06f3d9fb4 hwmon: (dme1737) ... |
2521 2522 2523 |
base_addr = (dme1737_sio_inb(sio_cip, 0x60) << 8) | dme1737_sio_inb(sio_cip, 0x61); if (!base_addr) { |
9c6e13b41 hwmon: (dme1737) ... |
2524 2525 |
pr_err("Base address not set "); |
e95c237d7 hwmon: (dme1737) ... |
2526 2527 2528 |
err = -ENODEV; goto exit; } |
c8de83624 hwmon: (dme1737) ... |
2529 2530 2531 2532 |
/* * Access to the hwmon registers is through an index/data register * pair located at offset 0x70/0x71. */ |
e95c237d7 hwmon: (dme1737) ... |
2533 2534 2535 2536 2537 2538 2539 2540 2541 2542 2543 2544 2545 2546 2547 2548 |
*addr = base_addr + 0x70; exit: dme1737_sio_exit(sio_cip); return err; } static int __init dme1737_isa_device_add(unsigned short addr) { struct resource res = { .start = addr, .end = addr + DME1737_EXTENT - 1, .name = "dme1737", .flags = IORESOURCE_IO, }; int err; |
b9acb64a3 hwmon: Check for ... |
2549 2550 2551 |
err = acpi_check_resource_conflict(&res); if (err) goto exit; |
06f3d9fb4 hwmon: (dme1737) ... |
2552 2553 |
pdev = platform_device_alloc("dme1737", addr); if (!pdev) { |
9c6e13b41 hwmon: (dme1737) ... |
2554 2555 |
pr_err("Failed to allocate device "); |
e95c237d7 hwmon: (dme1737) ... |
2556 2557 2558 |
err = -ENOMEM; goto exit; } |
06f3d9fb4 hwmon: (dme1737) ... |
2559 2560 |
err = platform_device_add_resources(pdev, &res, 1); if (err) { |
9c6e13b41 hwmon: (dme1737) ... |
2561 2562 |
pr_err("Failed to add device resource (err = %d) ", err); |
e95c237d7 hwmon: (dme1737) ... |
2563 2564 |
goto exit_device_put; } |
06f3d9fb4 hwmon: (dme1737) ... |
2565 2566 |
err = platform_device_add(pdev); if (err) { |
9c6e13b41 hwmon: (dme1737) ... |
2567 2568 |
pr_err("Failed to add device (err = %d) ", err); |
e95c237d7 hwmon: (dme1737) ... |
2569 2570 2571 2572 2573 2574 2575 2576 2577 2578 2579 |
goto exit_device_put; } return 0; exit_device_put: platform_device_put(pdev); pdev = NULL; exit: return err; } |
6c931ae1c hwmon: remove use... |
2580 |
static int dme1737_isa_probe(struct platform_device *pdev) |
e95c237d7 hwmon: (dme1737) ... |
2581 2582 2583 |
{ u8 company, device; struct resource *res; |
e95c237d7 hwmon: (dme1737) ... |
2584 2585 2586 2587 2588 |
struct dme1737_data *data; struct device *dev = &pdev->dev; int err; res = platform_get_resource(pdev, IORESOURCE_IO, 0); |
805fd8c5b hwmon: (dme1737) ... |
2589 |
if (!devm_request_region(dev, res->start, DME1737_EXTENT, "dme1737")) { |
e95c237d7 hwmon: (dme1737) ... |
2590 2591 2592 2593 |
dev_err(dev, "Failed to request region 0x%04x-0x%04x. ", (unsigned short)res->start, (unsigned short)res->start + DME1737_EXTENT - 1); |
805fd8c5b hwmon: (dme1737) ... |
2594 |
return -EBUSY; |
06f3d9fb4 hwmon: (dme1737) ... |
2595 |
} |
e95c237d7 hwmon: (dme1737) ... |
2596 |
|
805fd8c5b hwmon: (dme1737) ... |
2597 2598 2599 |
data = devm_kzalloc(dev, sizeof(struct dme1737_data), GFP_KERNEL); if (!data) return -ENOMEM; |
e95c237d7 hwmon: (dme1737) ... |
2600 |
|
dbc2bc251 hwmon: (dme1737) ... |
2601 |
data->addr = res->start; |
e95c237d7 hwmon: (dme1737) ... |
2602 |
platform_set_drvdata(pdev, data); |
55d68d75a hwmon: (dme1737) ... |
2603 |
/* Skip chip detection if module is loaded with force_id parameter */ |
ea694431f hwmon: (dme1737) ... |
2604 2605 2606 2607 2608 2609 2610 2611 2612 2613 |
switch (force_id) { case SCH3112_ID: case SCH3114_ID: case SCH3116_ID: data->type = sch311x; break; case SCH5127_ID: data->type = sch5127; break; default: |
dbc2bc251 hwmon: (dme1737) ... |
2614 2615 |
company = dme1737_read(data, DME1737_REG_COMPANY); device = dme1737_read(data, DME1737_REG_DEVICE); |
e95c237d7 hwmon: (dme1737) ... |
2616 |
|
ea694431f hwmon: (dme1737) ... |
2617 2618 2619 2620 2621 2622 2623 |
if ((company == DME1737_COMPANY_SMSC) && (device == SCH311X_DEVICE)) { data->type = sch311x; } else if ((company == DME1737_COMPANY_SMSC) && (device == SCH5127_DEVICE)) { data->type = sch5127; } else { |
805fd8c5b hwmon: (dme1737) ... |
2624 |
return -ENODEV; |
55d68d75a hwmon: (dme1737) ... |
2625 |
} |
e95c237d7 hwmon: (dme1737) ... |
2626 |
} |
c8de83624 hwmon: (dme1737) ... |
2627 |
if (data->type == sch5127) |
ea694431f hwmon: (dme1737) ... |
2628 |
data->name = "sch5127"; |
c8de83624 hwmon: (dme1737) ... |
2629 |
else |
ea694431f hwmon: (dme1737) ... |
2630 |
data->name = "sch311x"; |
ea694431f hwmon: (dme1737) ... |
2631 2632 |
/* Initialize the mutex */ |
e95c237d7 hwmon: (dme1737) ... |
2633 |
mutex_init(&data->update_lock); |
ea694431f hwmon: (dme1737) ... |
2634 2635 2636 |
dev_info(dev, "Found a %s chip at 0x%04x ", data->type == sch5127 ? "SCH5127" : "SCH311x", data->addr); |
e95c237d7 hwmon: (dme1737) ... |
2637 2638 |
/* Initialize the chip */ |
06f3d9fb4 hwmon: (dme1737) ... |
2639 2640 |
err = dme1737_init_device(dev); if (err) { |
e95c237d7 hwmon: (dme1737) ... |
2641 2642 |
dev_err(dev, "Failed to initialize device. "); |
805fd8c5b hwmon: (dme1737) ... |
2643 |
return err; |
e95c237d7 hwmon: (dme1737) ... |
2644 2645 2646 |
} /* Create sysfs files */ |
06f3d9fb4 hwmon: (dme1737) ... |
2647 2648 |
err = dme1737_create_files(dev); if (err) { |
e95c237d7 hwmon: (dme1737) ... |
2649 2650 |
dev_err(dev, "Failed to create sysfs files. "); |
805fd8c5b hwmon: (dme1737) ... |
2651 |
return err; |
e95c237d7 hwmon: (dme1737) ... |
2652 2653 2654 2655 2656 2657 2658 2659 2660 2661 2662 2663 2664 2665 2666 |
} /* Register device */ data->hwmon_dev = hwmon_device_register(dev); if (IS_ERR(data->hwmon_dev)) { dev_err(dev, "Failed to register device. "); err = PTR_ERR(data->hwmon_dev); goto exit_remove_files; } return 0; exit_remove_files: dme1737_remove_files(dev); |
e95c237d7 hwmon: (dme1737) ... |
2667 2668 |
return err; } |
281dfd0b6 hwmon: remove use... |
2669 |
static int dme1737_isa_remove(struct platform_device *pdev) |
e95c237d7 hwmon: (dme1737) ... |
2670 2671 2672 2673 2674 |
{ struct dme1737_data *data = platform_get_drvdata(pdev); hwmon_device_unregister(data->hwmon_dev); dme1737_remove_files(&pdev->dev); |
e95c237d7 hwmon: (dme1737) ... |
2675 2676 2677 2678 2679 2680 |
return 0; } static struct platform_driver dme1737_isa_driver = { .driver = { |
e95c237d7 hwmon: (dme1737) ... |
2681 2682 2683 |
.name = "dme1737", }, .probe = dme1737_isa_probe, |
9e5e9b7a9 hwmon: remove use... |
2684 |
.remove = dme1737_isa_remove, |
e95c237d7 hwmon: (dme1737) ... |
2685 2686 2687 |
}; /* --------------------------------------------------------------------- |
67e2f3285 hwmon: (dme1737) ... |
2688 2689 |
* Module initialization and cleanup * --------------------------------------------------------------------- */ |
9431996f5 hwmon: New SMSC D... |
2690 2691 |
static int __init dme1737_init(void) { |
e95c237d7 hwmon: (dme1737) ... |
2692 2693 |
int err; unsigned short addr; |
06f3d9fb4 hwmon: (dme1737) ... |
2694 |
err = i2c_add_driver(&dme1737_i2c_driver); |
c8de83624 hwmon: (dme1737) ... |
2695 |
if (err) |
e95c237d7 hwmon: (dme1737) ... |
2696 |
goto exit; |
e95c237d7 hwmon: (dme1737) ... |
2697 2698 |
if (dme1737_isa_detect(0x2e, &addr) && |
92430b6fe hwmon: (dme1737) ... |
2699 2700 2701 2702 |
dme1737_isa_detect(0x4e, &addr) && (!probe_all_addr || (dme1737_isa_detect(0x162e, &addr) && dme1737_isa_detect(0x164e, &addr)))) { |
e95c237d7 hwmon: (dme1737) ... |
2703 2704 2705 |
/* Return 0 if we didn't find an ISA device */ return 0; } |
06f3d9fb4 hwmon: (dme1737) ... |
2706 |
err = platform_driver_register(&dme1737_isa_driver); |
c8de83624 hwmon: (dme1737) ... |
2707 |
if (err) |
e95c237d7 hwmon: (dme1737) ... |
2708 |
goto exit_del_i2c_driver; |
e95c237d7 hwmon: (dme1737) ... |
2709 2710 |
/* Sets global pdev as a side effect */ |
06f3d9fb4 hwmon: (dme1737) ... |
2711 |
err = dme1737_isa_device_add(addr); |
c8de83624 hwmon: (dme1737) ... |
2712 |
if (err) |
e95c237d7 hwmon: (dme1737) ... |
2713 |
goto exit_del_isa_driver; |
e95c237d7 hwmon: (dme1737) ... |
2714 2715 2716 2717 2718 2719 2720 2721 2722 |
return 0; exit_del_isa_driver: platform_driver_unregister(&dme1737_isa_driver); exit_del_i2c_driver: i2c_del_driver(&dme1737_i2c_driver); exit: return err; |
9431996f5 hwmon: New SMSC D... |
2723 2724 2725 2726 |
} static void __exit dme1737_exit(void) { |
e95c237d7 hwmon: (dme1737) ... |
2727 2728 2729 2730 |
if (pdev) { platform_device_unregister(pdev); platform_driver_unregister(&dme1737_isa_driver); } |
b237eb25d hwmon: (dme1737) ... |
2731 |
i2c_del_driver(&dme1737_i2c_driver); |
9431996f5 hwmon: New SMSC D... |
2732 2733 2734 2735 2736 2737 2738 2739 |
} MODULE_AUTHOR("Juerg Haefliger <juergh@gmail.com>"); MODULE_DESCRIPTION("DME1737 sensors"); MODULE_LICENSE("GPL"); module_init(dme1737_init); module_exit(dme1737_exit); |