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drivers/staging/goldfish/goldfish_nand.c
11.5 KB
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/* * drivers/mtd/devices/goldfish_nand.c * * Copyright (C) 2007 Google, Inc. * Copyright (C) 2012 Intel, Inc. * Copyright (C) 2013 Intel, Inc. * * This software is licensed under the terms of the GNU General Public * License version 2, as published by the Free Software Foundation, and * may be copied, distributed, and modified under those terms. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * */ #include <linux/io.h> #include <linux/device.h> #include <linux/module.h> #include <linux/slab.h> #include <linux/ioport.h> #include <linux/vmalloc.h> |
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#include <linux/mtd/mtd.h> #include <linux/platform_device.h> |
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#include <linux/mutex.h> |
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#include <linux/goldfish.h> |
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#include <asm/div64.h> |
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#include <linux/dma-mapping.h> |
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#include "goldfish_nand_reg.h" struct goldfish_nand { |
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/* lock protects access to the device registers */ |
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struct mutex lock; |
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unsigned char __iomem *base; struct cmd_params *cmd_params; size_t mtd_count; struct mtd_info mtd[0]; }; static u32 goldfish_nand_cmd_with_params(struct mtd_info *mtd, |
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enum nand_cmd cmd, u64 addr, u32 len, void *ptr, u32 *rv) |
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{ u32 cmdp; struct goldfish_nand *nand = mtd->priv; struct cmd_params *cps = nand->cmd_params; unsigned char __iomem *base = nand->base; |
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if (!cps) |
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return -1; switch (cmd) { case NAND_CMD_ERASE: cmdp = NAND_CMD_ERASE_WITH_PARAMS; break; case NAND_CMD_READ: cmdp = NAND_CMD_READ_WITH_PARAMS; break; case NAND_CMD_WRITE: cmdp = NAND_CMD_WRITE_WITH_PARAMS; break; default: return -1; } cps->dev = mtd - nand->mtd; cps->addr_high = (u32)(addr >> 32); cps->addr_low = (u32)addr; cps->transfer_size = len; |
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cps->data = (unsigned long)ptr; |
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writel(cmdp, base + NAND_COMMAND); *rv = cps->result; return 0; } static u32 goldfish_nand_cmd(struct mtd_info *mtd, enum nand_cmd cmd, |
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u64 addr, u32 len, void *ptr) |
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{ struct goldfish_nand *nand = mtd->priv; u32 rv; |
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unsigned char __iomem *base = nand->base; |
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mutex_lock(&nand->lock); |
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if (goldfish_nand_cmd_with_params(mtd, cmd, addr, len, ptr, &rv)) { writel(mtd - nand->mtd, base + NAND_DEV); writel((u32)(addr >> 32), base + NAND_ADDR_HIGH); writel((u32)addr, base + NAND_ADDR_LOW); writel(len, base + NAND_TRANSFER_SIZE); |
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gf_write_ptr(ptr, base + NAND_DATA, base + NAND_DATA_HIGH); |
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writel(cmd, base + NAND_COMMAND); rv = readl(base + NAND_RESULT); } |
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mutex_unlock(&nand->lock); |
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return rv; } static int goldfish_nand_erase(struct mtd_info *mtd, struct erase_info *instr) { loff_t ofs = instr->addr; u32 len = instr->len; |
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s32 rem; |
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if (ofs + len > mtd->size) goto invalid_arg; |
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ofs = div_s64_rem(ofs, mtd->writesize, &rem); |
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if (rem) goto invalid_arg; ofs *= (mtd->writesize + mtd->oobsize); if (len % mtd->writesize) goto invalid_arg; len = len / mtd->writesize * (mtd->writesize + mtd->oobsize); if (goldfish_nand_cmd(mtd, NAND_CMD_ERASE, ofs, len, NULL) != len) { pr_err("goldfish_nand_erase: erase failed, start %llx, len %x, dev_size %llx, erase_size %x ", |
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ofs, len, mtd->size, mtd->erasesize); |
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return -EIO; } instr->state = MTD_ERASE_DONE; mtd_erase_callback(instr); return 0; invalid_arg: pr_err("goldfish_nand_erase: invalid erase, start %llx, len %x, dev_size %llx, erase_size %x ", |
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ofs, len, mtd->size, mtd->erasesize); |
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return -EINVAL; } static int goldfish_nand_read_oob(struct mtd_info *mtd, loff_t ofs, |
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struct mtd_oob_ops *ops) |
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{ |
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s32 rem; |
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if (ofs + ops->len > mtd->size) goto invalid_arg; if (ops->datbuf && ops->len && ops->len != mtd->writesize) goto invalid_arg; if (ops->ooblen + ops->ooboffs > mtd->oobsize) goto invalid_arg; |
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ofs = div_s64_rem(ofs, mtd->writesize, &rem); |
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if (rem) goto invalid_arg; ofs *= (mtd->writesize + mtd->oobsize); if (ops->datbuf) ops->retlen = goldfish_nand_cmd(mtd, NAND_CMD_READ, ofs, ops->len, ops->datbuf); ofs += mtd->writesize + ops->ooboffs; if (ops->oobbuf) ops->oobretlen = goldfish_nand_cmd(mtd, NAND_CMD_READ, ofs, ops->ooblen, ops->oobbuf); return 0; invalid_arg: |
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pr_err("goldfish_nand_read_oob: invalid read, start %llx, len %zx, ooblen %zx, dev_size %llx, write_size %x ", |
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ofs, ops->len, ops->ooblen, mtd->size, mtd->writesize); |
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return -EINVAL; } static int goldfish_nand_write_oob(struct mtd_info *mtd, loff_t ofs, |
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struct mtd_oob_ops *ops) |
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{ |
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s32 rem; |
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if (ofs + ops->len > mtd->size) goto invalid_arg; if (ops->len && ops->len != mtd->writesize) goto invalid_arg; if (ops->ooblen + ops->ooboffs > mtd->oobsize) goto invalid_arg; |
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ofs = div_s64_rem(ofs, mtd->writesize, &rem); |
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if (rem) goto invalid_arg; ofs *= (mtd->writesize + mtd->oobsize); if (ops->datbuf) ops->retlen = goldfish_nand_cmd(mtd, NAND_CMD_WRITE, ofs, ops->len, ops->datbuf); ofs += mtd->writesize + ops->ooboffs; if (ops->oobbuf) ops->oobretlen = goldfish_nand_cmd(mtd, NAND_CMD_WRITE, ofs, ops->ooblen, ops->oobbuf); return 0; invalid_arg: |
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pr_err("goldfish_nand_write_oob: invalid write, start %llx, len %zx, ooblen %zx, dev_size %llx, write_size %x ", |
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ofs, ops->len, ops->ooblen, mtd->size, mtd->writesize); |
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return -EINVAL; } static int goldfish_nand_read(struct mtd_info *mtd, loff_t from, size_t len, |
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size_t *retlen, u_char *buf) |
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{ |
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s32 rem; |
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if (from + len > mtd->size) goto invalid_arg; |
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|
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from = div_s64_rem(from, mtd->writesize, &rem); |
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if (rem) goto invalid_arg; from *= (mtd->writesize + mtd->oobsize); *retlen = goldfish_nand_cmd(mtd, NAND_CMD_READ, from, len, buf); return 0; invalid_arg: |
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pr_err("goldfish_nand_read: invalid read, start %llx, len %zx, dev_size %llx, write_size %x ", |
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from, len, mtd->size, mtd->writesize); |
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return -EINVAL; } static int goldfish_nand_write(struct mtd_info *mtd, loff_t to, size_t len, |
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size_t *retlen, const u_char *buf) |
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{ |
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s32 rem; |
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if (to + len > mtd->size) goto invalid_arg; |
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|
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to = div_s64_rem(to, mtd->writesize, &rem); |
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if (rem) goto invalid_arg; to *= (mtd->writesize + mtd->oobsize); *retlen = goldfish_nand_cmd(mtd, NAND_CMD_WRITE, to, len, (void *)buf); return 0; invalid_arg: |
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pr_err("goldfish_nand_write: invalid write, start %llx, len %zx, dev_size %llx, write_size %x ", |
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to, len, mtd->size, mtd->writesize); |
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return -EINVAL; } static int goldfish_nand_block_isbad(struct mtd_info *mtd, loff_t ofs) { |
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s32 rem; |
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if (ofs >= mtd->size) goto invalid_arg; |
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ofs = div_s64_rem(ofs, mtd->writesize, &rem); |
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if (rem) goto invalid_arg; ofs *= mtd->erasesize / mtd->writesize; ofs *= (mtd->writesize + mtd->oobsize); return goldfish_nand_cmd(mtd, NAND_CMD_BLOCK_BAD_GET, ofs, 0, NULL); invalid_arg: pr_err("goldfish_nand_block_isbad: invalid arg, ofs %llx, dev_size %llx, write_size %x ", |
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ofs, mtd->size, mtd->writesize); |
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return -EINVAL; } static int goldfish_nand_block_markbad(struct mtd_info *mtd, loff_t ofs) { |
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s32 rem; |
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if (ofs >= mtd->size) goto invalid_arg; |
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ofs = div_s64_rem(ofs, mtd->writesize, &rem); |
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if (rem) goto invalid_arg; ofs *= mtd->erasesize / mtd->writesize; ofs *= (mtd->writesize + mtd->oobsize); if (goldfish_nand_cmd(mtd, NAND_CMD_BLOCK_BAD_SET, ofs, 0, NULL) != 1) return -EIO; return 0; invalid_arg: pr_err("goldfish_nand_block_markbad: invalid arg, ofs %llx, dev_size %llx, write_size %x ", |
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ofs, mtd->size, mtd->writesize); |
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return -EINVAL; } static int nand_setup_cmd_params(struct platform_device *pdev, |
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struct goldfish_nand *nand) |
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{ |
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dma_addr_t dma_handle; |
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unsigned char __iomem *base = nand->base; |
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nand->cmd_params = dmam_alloc_coherent(&pdev->dev, sizeof(struct cmd_params), &dma_handle, GFP_KERNEL); if (!nand->cmd_params) { dev_err(&pdev->dev, "allocate buffer failed "); return -ENOMEM; } writel((u32)((u64)dma_handle >> 32), base + NAND_CMD_PARAMS_ADDR_HIGH); writel((u32)dma_handle, base + NAND_CMD_PARAMS_ADDR_LOW); |
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return 0; } static int goldfish_nand_init_device(struct platform_device *pdev, |
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struct goldfish_nand *nand, int id) |
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{ u32 name_len; u32 result; u32 flags; |
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unsigned char __iomem *base = nand->base; struct mtd_info *mtd = &nand->mtd[id]; char *name; |
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mutex_lock(&nand->lock); |
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writel(id, base + NAND_DEV); flags = readl(base + NAND_DEV_FLAGS); name_len = readl(base + NAND_DEV_NAME_LEN); mtd->writesize = readl(base + NAND_DEV_PAGE_SIZE); mtd->size = readl(base + NAND_DEV_SIZE_LOW); mtd->size |= (u64)readl(base + NAND_DEV_SIZE_HIGH) << 32; mtd->oobsize = readl(base + NAND_DEV_EXTRA_SIZE); mtd->oobavail = mtd->oobsize; mtd->erasesize = readl(base + NAND_DEV_ERASE_SIZE) / (mtd->writesize + mtd->oobsize) * mtd->writesize; |
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mtd->size = div_s64(mtd->size, mtd->writesize + mtd->oobsize); |
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mtd->size *= mtd->writesize; |
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dev_dbg(&pdev->dev, |
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"goldfish nand dev%d: size %llx, page %d, extra %d, erase %d ", |
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id, mtd->size, mtd->writesize, mtd->oobsize, mtd->erasesize); |
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mutex_unlock(&nand->lock); |
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mtd->priv = nand; |
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name = devm_kzalloc(&pdev->dev, name_len + 1, GFP_KERNEL); |
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if (!name) |
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return -ENOMEM; |
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mtd->name = name; |
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result = goldfish_nand_cmd(mtd, NAND_CMD_GET_DEV_NAME, 0, name_len, |
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name); |
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if (result != name_len) { |
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dev_err(&pdev->dev, |
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"goldfish_nand_init_device failed to get dev name %d != %d ", result, name_len); return -ENODEV; } |
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((char *)mtd->name)[name_len] = '\0'; |
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/* Setup the MTD structure */ mtd->type = MTD_NANDFLASH; mtd->flags = MTD_CAP_NANDFLASH; if (flags & NAND_DEV_FLAG_READ_ONLY) mtd->flags &= ~MTD_WRITEABLE; if (flags & NAND_DEV_FLAG_CMD_PARAMS_CAP) nand_setup_cmd_params(pdev, nand); mtd->owner = THIS_MODULE; mtd->_erase = goldfish_nand_erase; mtd->_read = goldfish_nand_read; mtd->_write = goldfish_nand_write; mtd->_read_oob = goldfish_nand_read_oob; mtd->_write_oob = goldfish_nand_write_oob; mtd->_block_isbad = goldfish_nand_block_isbad; mtd->_block_markbad = goldfish_nand_block_markbad; if (mtd_device_register(mtd, NULL, 0)) return -EIO; return 0; } static int goldfish_nand_probe(struct platform_device *pdev) { u32 num_dev; int i; int err; u32 num_dev_working; u32 version; struct resource *r; struct goldfish_nand *nand; unsigned char __iomem *base; r = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
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if (!r) |
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return -ENODEV; base = devm_ioremap(&pdev->dev, r->start, PAGE_SIZE); |
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if (!base) |
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return -ENOMEM; version = readl(base + NAND_VERSION); if (version != NAND_VERSION_CURRENT) { |
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dev_err(&pdev->dev, |
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"goldfish_nand_init: version mismatch, got %d, expected %d ", version, NAND_VERSION_CURRENT); return -ENODEV; } num_dev = readl(base + NAND_NUM_DEV); if (num_dev == 0) return -ENODEV; |
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nand = devm_kzalloc(&pdev->dev, sizeof(*nand) + |
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sizeof(struct mtd_info) * num_dev, GFP_KERNEL); |
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if (!nand) |
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return -ENOMEM; |
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mutex_init(&nand->lock); |
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nand->base = base; nand->mtd_count = num_dev; platform_set_drvdata(pdev, nand); num_dev_working = 0; for (i = 0; i < num_dev; i++) { err = goldfish_nand_init_device(pdev, nand, i); if (err == 0) num_dev_working++; } if (num_dev_working == 0) return -ENODEV; return 0; } static int goldfish_nand_remove(struct platform_device *pdev) { struct goldfish_nand *nand = platform_get_drvdata(pdev); int i; |
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for (i = 0; i < nand->mtd_count; i++) { if (nand->mtd[i].name) mtd_device_unregister(&nand->mtd[i]); } return 0; } static struct platform_driver goldfish_nand_driver = { .probe = goldfish_nand_probe, .remove = goldfish_nand_remove, .driver = { .name = "goldfish_nand" } }; module_platform_driver(goldfish_nand_driver); MODULE_LICENSE("GPL"); |