Blame view
include/kvm/arm_pmu.h
4.12 KB
04fe47261 arm64: KVM: Defin... |
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 |
/* * Copyright (C) 2015 Linaro Ltd. * Author: Shannon Zhao <shannon.zhao@linaro.org> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program. If not, see <http://www.gnu.org/licenses/>. */ #ifndef __ASM_ARM_KVM_PMU_H #define __ASM_ARM_KVM_PMU_H |
04fe47261 arm64: KVM: Defin... |
20 21 |
#include <linux/perf_event.h> #include <asm/perf_event.h> |
051ff581c arm64: KVM: Add a... |
22 |
#define ARMV8_PMU_CYCLE_IDX (ARMV8_PMU_MAX_COUNTERS - 1) |
0efce9da1 arm64: KVM: fix b... |
23 |
#ifdef CONFIG_KVM_ARM_PMU |
04fe47261 arm64: KVM: Defin... |
24 25 26 27 28 29 30 31 32 33 |
struct kvm_pmc { u8 idx; /* index into the pmu->pmc array */ struct perf_event *perf_event; u64 bitmask; }; struct kvm_pmu { int irq_num; struct kvm_pmc pmc[ARMV8_PMU_MAX_COUNTERS]; bool ready; |
a2befacf5 KVM: arm64: Allow... |
34 |
bool created; |
b02386eb7 arm64: KVM: Add P... |
35 |
bool irq_level; |
04fe47261 arm64: KVM: Defin... |
36 |
}; |
ab9468340 arm64: KVM: Add a... |
37 38 |
#define kvm_arm_pmu_v3_ready(v) ((v)->arch.pmu.ready) |
bb0c70bcc arm64: KVM: Add a... |
39 |
#define kvm_arm_pmu_irq_initialized(v) ((v)->arch.pmu.irq_num >= VGIC_NR_SGIS) |
051ff581c arm64: KVM: Add a... |
40 41 |
u64 kvm_pmu_get_counter_value(struct kvm_vcpu *vcpu, u64 select_idx); void kvm_pmu_set_counter_value(struct kvm_vcpu *vcpu, u64 select_idx, u64 val); |
96b0eebcc arm64: KVM: Add a... |
42 |
u64 kvm_pmu_valid_counter_mask(struct kvm_vcpu *vcpu); |
2aa36e984 arm64: KVM: Reset... |
43 |
void kvm_pmu_vcpu_reset(struct kvm_vcpu *vcpu); |
5f0a714a2 arm64: KVM: Free ... |
44 |
void kvm_pmu_vcpu_destroy(struct kvm_vcpu *vcpu); |
96b0eebcc arm64: KVM: Add a... |
45 46 |
void kvm_pmu_disable_counter(struct kvm_vcpu *vcpu, u64 val); void kvm_pmu_enable_counter(struct kvm_vcpu *vcpu, u64 val); |
b02386eb7 arm64: KVM: Add P... |
47 48 |
void kvm_pmu_flush_hwstate(struct kvm_vcpu *vcpu); void kvm_pmu_sync_hwstate(struct kvm_vcpu *vcpu); |
3dbbdf786 KVM: arm/arm64: R... |
49 50 |
bool kvm_pmu_should_notify_user(struct kvm_vcpu *vcpu); void kvm_pmu_update_run(struct kvm_vcpu *vcpu); |
7a0adc706 arm64: KVM: Add a... |
51 |
void kvm_pmu_software_increment(struct kvm_vcpu *vcpu, u64 val); |
76993739c arm64: KVM: Add h... |
52 |
void kvm_pmu_handle_pmcr(struct kvm_vcpu *vcpu, u64 val); |
7f7663587 arm64: KVM: PMU: ... |
53 54 |
void kvm_pmu_set_counter_event_type(struct kvm_vcpu *vcpu, u64 data, u64 select_idx); |
808e73814 arm64: KVM: Add a... |
55 |
bool kvm_arm_support_pmu_v3(void); |
bb0c70bcc arm64: KVM: Add a... |
56 57 58 59 60 61 |
int kvm_arm_pmu_v3_set_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr); int kvm_arm_pmu_v3_get_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr); int kvm_arm_pmu_v3_has_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr); |
a2befacf5 KVM: arm64: Allow... |
62 |
int kvm_arm_pmu_v3_enable(struct kvm_vcpu *vcpu); |
04fe47261 arm64: KVM: Defin... |
63 64 65 |
#else struct kvm_pmu { }; |
ab9468340 arm64: KVM: Add a... |
66 67 |
#define kvm_arm_pmu_v3_ready(v) (false) |
bb0c70bcc arm64: KVM: Add a... |
68 |
#define kvm_arm_pmu_irq_initialized(v) (false) |
051ff581c arm64: KVM: Add a... |
69 70 71 72 73 74 75 |
static inline u64 kvm_pmu_get_counter_value(struct kvm_vcpu *vcpu, u64 select_idx) { return 0; } static inline void kvm_pmu_set_counter_value(struct kvm_vcpu *vcpu, u64 select_idx, u64 val) {} |
96b0eebcc arm64: KVM: Add a... |
76 77 78 79 |
static inline u64 kvm_pmu_valid_counter_mask(struct kvm_vcpu *vcpu) { return 0; } |
2aa36e984 arm64: KVM: Reset... |
80 |
static inline void kvm_pmu_vcpu_reset(struct kvm_vcpu *vcpu) {} |
5f0a714a2 arm64: KVM: Free ... |
81 |
static inline void kvm_pmu_vcpu_destroy(struct kvm_vcpu *vcpu) {} |
96b0eebcc arm64: KVM: Add a... |
82 83 |
static inline void kvm_pmu_disable_counter(struct kvm_vcpu *vcpu, u64 val) {} static inline void kvm_pmu_enable_counter(struct kvm_vcpu *vcpu, u64 val) {} |
b02386eb7 arm64: KVM: Add P... |
84 85 |
static inline void kvm_pmu_flush_hwstate(struct kvm_vcpu *vcpu) {} static inline void kvm_pmu_sync_hwstate(struct kvm_vcpu *vcpu) {} |
3dbbdf786 KVM: arm/arm64: R... |
86 87 88 89 90 |
static inline bool kvm_pmu_should_notify_user(struct kvm_vcpu *vcpu) { return false; } static inline void kvm_pmu_update_run(struct kvm_vcpu *vcpu) {} |
7a0adc706 arm64: KVM: Add a... |
91 |
static inline void kvm_pmu_software_increment(struct kvm_vcpu *vcpu, u64 val) {} |
76993739c arm64: KVM: Add h... |
92 |
static inline void kvm_pmu_handle_pmcr(struct kvm_vcpu *vcpu, u64 val) {} |
7f7663587 arm64: KVM: PMU: ... |
93 94 |
static inline void kvm_pmu_set_counter_event_type(struct kvm_vcpu *vcpu, u64 data, u64 select_idx) {} |
808e73814 arm64: KVM: Add a... |
95 |
static inline bool kvm_arm_support_pmu_v3(void) { return false; } |
bb0c70bcc arm64: KVM: Add a... |
96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 |
static inline int kvm_arm_pmu_v3_set_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr) { return -ENXIO; } static inline int kvm_arm_pmu_v3_get_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr) { return -ENXIO; } static inline int kvm_arm_pmu_v3_has_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr) { return -ENXIO; } |
a2befacf5 KVM: arm64: Allow... |
111 112 113 114 |
static inline int kvm_arm_pmu_v3_enable(struct kvm_vcpu *vcpu) { return 0; } |
04fe47261 arm64: KVM: Defin... |
115 116 117 |
#endif #endif |