Blame view
kernel/irq/ipi.c
9.15 KB
d17bf24e6 genirq: Add a new... |
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 |
/* * linux/kernel/irq/ipi.c * * Copyright (C) 2015 Imagination Technologies Ltd * Author: Qais Yousef <qais.yousef@imgtec.com> * * This file contains driver APIs to the IPI subsystem. */ #define pr_fmt(fmt) "genirq/ipi: " fmt #include <linux/irqdomain.h> #include <linux/irq.h> /** * irq_reserve_ipi() - Setup an IPI to destination cpumask * @domain: IPI domain * @dest: cpumask of cpus which can receive the IPI * * Allocate a virq that can be used to send IPI to any CPU in dest mask. * |
7cec18a39 genirq: Add error... |
22 |
* On success it'll return linux irq number and error code on failure |
d17bf24e6 genirq: Add a new... |
23 |
*/ |
7cec18a39 genirq: Add error... |
24 |
int irq_reserve_ipi(struct irq_domain *domain, |
d17bf24e6 genirq: Add a new... |
25 26 27 28 29 30 31 32 33 |
const struct cpumask *dest) { unsigned int nr_irqs, offset; struct irq_data *data; int virq, i; if (!domain ||!irq_domain_is_ipi(domain)) { pr_warn("Reservation on a non IPI domain "); |
7cec18a39 genirq: Add error... |
34 |
return -EINVAL; |
d17bf24e6 genirq: Add a new... |
35 36 37 38 39 |
} if (!cpumask_subset(dest, cpu_possible_mask)) { pr_warn("Reservation is not in possible_cpu_mask "); |
7cec18a39 genirq: Add error... |
40 |
return -EINVAL; |
d17bf24e6 genirq: Add a new... |
41 42 43 44 45 46 |
} nr_irqs = cpumask_weight(dest); if (!nr_irqs) { pr_warn("Reservation for empty destination mask "); |
7cec18a39 genirq: Add error... |
47 |
return -EINVAL; |
d17bf24e6 genirq: Add a new... |
48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 |
} if (irq_domain_is_ipi_single(domain)) { /* * If the underlying implementation uses a single HW irq on * all cpus then we only need a single Linux irq number for * it. We have no restrictions vs. the destination mask. The * underlying implementation can deal with holes nicely. */ nr_irqs = 1; offset = 0; } else { unsigned int next; /* * The IPI requires a seperate HW irq on each CPU. We require * that the destination mask is consecutive. If an * implementation needs to support holes, it can reserve * several IPI ranges. */ offset = cpumask_first(dest); /* * Find a hole and if found look for another set bit after the * hole. For now we don't support this scenario. */ next = cpumask_next_zero(offset, dest); if (next < nr_cpu_ids) next = cpumask_next(next, dest); if (next < nr_cpu_ids) { pr_warn("Destination mask has holes "); |
7cec18a39 genirq: Add error... |
79 |
return -EINVAL; |
d17bf24e6 genirq: Add a new... |
80 81 |
} } |
06ee6d571 genirq: Add affin... |
82 |
virq = irq_domain_alloc_descs(-1, nr_irqs, 0, NUMA_NO_NODE, NULL); |
d17bf24e6 genirq: Add a new... |
83 84 85 |
if (virq <= 0) { pr_warn("Can't reserve IPI, failed to alloc descs "); |
7cec18a39 genirq: Add error... |
86 |
return -ENOMEM; |
d17bf24e6 genirq: Add a new... |
87 88 89 |
} virq = __irq_domain_alloc_irqs(domain, virq, nr_irqs, NUMA_NO_NODE, |
eb0dc47ab genirq: Fix missi... |
90 |
(void *) dest, true, NULL); |
d17bf24e6 genirq: Add a new... |
91 92 93 94 95 96 97 98 99 100 101 |
if (virq <= 0) { pr_warn("Can't reserve IPI, failed to alloc hw irqs "); goto free_descs; } for (i = 0; i < nr_irqs; i++) { data = irq_get_irq_data(virq + i); cpumask_copy(data->common->affinity, dest); data->common->ipi_offset = offset; |
4589f450f genirq: Dont allo... |
102 |
irq_set_status_flags(virq + i, IRQ_NO_BALANCING); |
d17bf24e6 genirq: Add a new... |
103 104 105 106 107 |
} return virq; free_descs: irq_free_descs(virq, nr_irqs); |
7cec18a39 genirq: Add error... |
108 |
return -EBUSY; |
d17bf24e6 genirq: Add a new... |
109 110 111 112 113 |
} /** * irq_destroy_ipi() - unreserve an IPI that was previously allocated * @irq: linux irq number to be destroyed |
01292cea0 genirq: Make irq_... |
114 |
* @dest: cpumask of cpus which should have the IPI removed |
d17bf24e6 genirq: Add a new... |
115 |
* |
7cec18a39 genirq: Add error... |
116 117 118 119 |
* The IPIs allocated with irq_reserve_ipi() are retuerned to the system * destroying all virqs associated with them. * * Return 0 on success or error code on failure. |
d17bf24e6 genirq: Add a new... |
120 |
*/ |
7cec18a39 genirq: Add error... |
121 |
int irq_destroy_ipi(unsigned int irq, const struct cpumask *dest) |
d17bf24e6 genirq: Add a new... |
122 123 124 125 126 127 128 |
{ struct irq_data *data = irq_get_irq_data(irq); struct cpumask *ipimask = data ? irq_data_get_affinity_mask(data) : NULL; struct irq_domain *domain; unsigned int nr_irqs; if (!irq || !data || !ipimask) |
7cec18a39 genirq: Add error... |
129 |
return -EINVAL; |
d17bf24e6 genirq: Add a new... |
130 131 132 |
domain = data->domain; if (WARN_ON(domain == NULL)) |
59fa58602 genirq: Fix missi... |
133 |
return -EINVAL; |
d17bf24e6 genirq: Add a new... |
134 135 136 137 |
if (!irq_domain_is_ipi(domain)) { pr_warn("Trying to destroy a non IPI domain! "); |
7cec18a39 genirq: Add error... |
138 |
return -EINVAL; |
d17bf24e6 genirq: Add a new... |
139 |
} |
01292cea0 genirq: Make irq_... |
140 141 142 143 144 |
if (WARN_ON(!cpumask_subset(dest, ipimask))) /* * Must be destroying a subset of CPUs to which this IPI * was set up to target */ |
7cec18a39 genirq: Add error... |
145 |
return -EINVAL; |
01292cea0 genirq: Make irq_... |
146 147 148 149 150 |
if (irq_domain_is_ipi_per_cpu(domain)) { irq = irq + cpumask_first(dest) - data->common->ipi_offset; nr_irqs = cpumask_weight(dest); } else { |
d17bf24e6 genirq: Add a new... |
151 |
nr_irqs = 1; |
01292cea0 genirq: Make irq_... |
152 |
} |
d17bf24e6 genirq: Add a new... |
153 154 |
irq_domain_free_irqs(irq, nr_irqs); |
7cec18a39 genirq: Add error... |
155 |
return 0; |
d17bf24e6 genirq: Add a new... |
156 |
} |
f9bce791a genirq: Add a new... |
157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 |
/** * ipi_get_hwirq - Get the hwirq associated with an IPI to a cpu * @irq: linux irq number * @cpu: the target cpu * * When dealing with coprocessors IPI, we need to inform the coprocessor of * the hwirq it needs to use to receive and send IPIs. * * Returns hwirq value on success and INVALID_HWIRQ on failure. */ irq_hw_number_t ipi_get_hwirq(unsigned int irq, unsigned int cpu) { struct irq_data *data = irq_get_irq_data(irq); struct cpumask *ipimask = data ? irq_data_get_affinity_mask(data) : NULL; |
8fbbe2d7c genirq/ipi: Fixup... |
172 |
if (!data || !ipimask || cpu >= nr_cpu_ids) |
f9bce791a genirq: Add a new... |
173 174 175 176 177 178 179 180 181 |
return INVALID_HWIRQ; if (!cpumask_test_cpu(cpu, ipimask)) return INVALID_HWIRQ; /* * Get the real hardware irq number if the underlying implementation * uses a seperate irq per cpu. If the underlying implementation uses * a single hardware irq for all cpus then the IPI send mechanism |
3b8e29a82 genirq: Implement... |
182 |
* needs to take care of the cpu destinations. |
f9bce791a genirq: Add a new... |
183 184 185 186 187 188 189 |
*/ if (irq_domain_is_ipi_per_cpu(data->domain)) data = irq_get_irq_data(irq + cpu - data->common->ipi_offset); return data ? irqd_to_hwirq(data) : INVALID_HWIRQ; } EXPORT_SYMBOL_GPL(ipi_get_hwirq); |
3b8e29a82 genirq: Implement... |
190 191 192 193 194 195 196 197 198 199 200 |
static int ipi_send_verify(struct irq_chip *chip, struct irq_data *data, const struct cpumask *dest, unsigned int cpu) { struct cpumask *ipimask = irq_data_get_affinity_mask(data); if (!chip || !ipimask) return -EINVAL; if (!chip->ipi_send_single && !chip->ipi_send_mask) return -EINVAL; |
8fbbe2d7c genirq/ipi: Fixup... |
201 |
if (cpu >= nr_cpu_ids) |
3b8e29a82 genirq: Implement... |
202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 |
return -EINVAL; if (dest) { if (!cpumask_subset(dest, ipimask)) return -EINVAL; } else { if (!cpumask_test_cpu(cpu, ipimask)) return -EINVAL; } return 0; } /** * __ipi_send_single - send an IPI to a target Linux SMP CPU * @desc: pointer to irq_desc of the IRQ * @cpu: destination CPU, must in the destination mask passed to * irq_reserve_ipi() * * This function is for architecture or core code to speed up IPI sending. Not * usable from driver code. * * Returns zero on success and negative error number on failure. */ int __ipi_send_single(struct irq_desc *desc, unsigned int cpu) { struct irq_data *data = irq_desc_get_irq_data(desc); struct irq_chip *chip = irq_data_get_irq_chip(data); #ifdef DEBUG /* * Minimise the overhead by omitting the checks for Linux SMP IPIs. * Since the callers should be arch or core code which is generally * trusted, only check for errors when debugging. */ if (WARN_ON_ONCE(ipi_send_verify(chip, data, NULL, cpu))) return -EINVAL; #endif if (!chip->ipi_send_single) { chip->ipi_send_mask(data, cpumask_of(cpu)); return 0; } /* FIXME: Store this information in irqdata flags */ if (irq_domain_is_ipi_per_cpu(data->domain) && cpu != data->common->ipi_offset) { /* use the correct data for that cpu */ unsigned irq = data->irq + cpu - data->common->ipi_offset; data = irq_get_irq_data(irq); } chip->ipi_send_single(data, cpu); return 0; } /** * ipi_send_mask - send an IPI to target Linux SMP CPU(s) * @desc: pointer to irq_desc of the IRQ * @dest: dest CPU(s), must be a subset of the mask passed to * irq_reserve_ipi() * * This function is for architecture or core code to speed up IPI sending. Not * usable from driver code. * * Returns zero on success and negative error number on failure. */ int __ipi_send_mask(struct irq_desc *desc, const struct cpumask *dest) { struct irq_data *data = irq_desc_get_irq_data(desc); struct irq_chip *chip = irq_data_get_irq_chip(data); unsigned int cpu; #ifdef DEBUG /* * Minimise the overhead by omitting the checks for Linux SMP IPIs. * Since the callers should be arch or core code which is generally * trusted, only check for errors when debugging. */ if (WARN_ON_ONCE(ipi_send_verify(chip, data, dest, 0))) return -EINVAL; #endif if (chip->ipi_send_mask) { chip->ipi_send_mask(data, dest); return 0; } if (irq_domain_is_ipi_per_cpu(data->domain)) { unsigned int base = data->irq; for_each_cpu(cpu, dest) { unsigned irq = base + cpu - data->common->ipi_offset; data = irq_get_irq_data(irq); chip->ipi_send_single(data, cpu); } } else { for_each_cpu(cpu, dest) chip->ipi_send_single(data, cpu); } return 0; } /** * ipi_send_single - Send an IPI to a single CPU * @virq: linux irq number from irq_reserve_ipi() * @cpu: destination CPU, must in the destination mask passed to * irq_reserve_ipi() * * Returns zero on success and negative error number on failure. */ int ipi_send_single(unsigned int virq, unsigned int cpu) { struct irq_desc *desc = irq_to_desc(virq); struct irq_data *data = desc ? irq_desc_get_irq_data(desc) : NULL; struct irq_chip *chip = data ? irq_data_get_irq_chip(data) : NULL; if (WARN_ON_ONCE(ipi_send_verify(chip, data, NULL, cpu))) return -EINVAL; return __ipi_send_single(desc, cpu); } EXPORT_SYMBOL_GPL(ipi_send_single); /** * ipi_send_mask - Send an IPI to target CPU(s) * @virq: linux irq number from irq_reserve_ipi() * @dest: dest CPU(s), must be a subset of the mask passed to * irq_reserve_ipi() * * Returns zero on success and negative error number on failure. */ int ipi_send_mask(unsigned int virq, const struct cpumask *dest) { struct irq_desc *desc = irq_to_desc(virq); struct irq_data *data = desc ? irq_desc_get_irq_data(desc) : NULL; struct irq_chip *chip = data ? irq_data_get_irq_chip(data) : NULL; if (WARN_ON_ONCE(ipi_send_verify(chip, data, dest, 0))) return -EINVAL; return __ipi_send_mask(desc, dest); } EXPORT_SYMBOL_GPL(ipi_send_mask); |