02 Mar, 2010
1 commit
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* 'acpica' of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux-acpi-2.6:
ACPI: replace acpi_integer by u64
ACPICA: Update version to 20100121.
ACPICA: Remove unused uint32_struct type
ACPICA: Disassembler: Remove obsolete "Integer64" field in parse object
ACPICA: Remove obsolete ACPI_INTEGER (acpi_integer) type
ACPICA: Predefined name repair: fix NULL package elements
ACPICA: AcpiGetDevices: Eliminate unnecessary _STA calls
ACPICA: Update all ACPICA copyrights and signons to 2010
ACPICA: Update for new gcc-4 warning options
01 Mar, 2010
2 commits
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A ROM resource that doesn't fit should not cause us to try to re-assign
all the bus resources. Nobody generally cares, and re-assigning is
going to just cause way more troubles than it tries to solve.Signed-off-by: Yinghai Lu
Signed-off-by: Linus Torvalds -
* 'x86-pci-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
x86: Enable NMI on all cpus on UV
vgaarb: Add user selectability of the number of GPUS in a system
vgaarb: Fix VGA arbiter to accept PCI domains other than 0
x86, uv: Update UV arch to target Legacy VGA I/O correctly.
pci: Update pci_set_vga_state() to call arch functions
27 Feb, 2010
1 commit
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Set power.async_suspend for all PCI devices and PCIe port services,
so that they can be suspended and resumed in parallel with other
devices they don't depend on in a known way (i.e. devices which are
not their parents or children).This only affects the "regular" suspend and resume stages, which
means in particular that the restoration of the PCI devices' standard
configuration registers during resume will still be carried out
synchronously (at the "early" resume stage).Signed-off-by: Rafael J. Wysocki
24 Feb, 2010
4 commits
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Previously we used a table of size PCI_BUS_NUM_RESOURCES (16) for resources
forwarded to a bus by its upstream bridge. We've increased this size
several times when the table overflowed.But there's no good limit on the number of resources because host bridges
and subtractive decode bridges can forward any number of ranges to their
secondary buses.This patch reduces the table to only PCI_BRIDGE_RESOURCE_NUM (4) entries,
which corresponds to the number of windows a PCI-to-PCI (3) or CardBus (4)
bridge can positively decode. Any additional resources, e.g., PCI host
bridge windows or subtractively-decoded regions, are kept in a list.I'd prefer a single list rather than this split table/list approach, but
that requires simultaneous changes to every architecture. This approach
only requires immediate changes where we set up (a) host bridges with more
than four windows and (b) subtractive-decode P2P bridges, and we can
incrementally change other architectures to use the list.Signed-off-by: Bjorn Helgaas
Signed-off-by: Jesse Barnes -
No functional change; this converts loops that iterate from 0 to
PCI_BUS_NUM_RESOURCES through pci_bus resource[] table to use the
pci_bus_for_each_resource() iterator instead.This doesn't change the way resources are stored; it merely removes
dependencies on the fact that they're in a table.Signed-off-by: Bjorn Helgaas
Signed-off-by: Jesse Barnes -
No functional change; this fills in the bus subtractive decode resources
after reading the bridge window information rather than before. Also,
print out the subtractive decode resources as we already do for the
positive decode windows.Signed-off-by: Bjorn Helgaas
Signed-off-by: Jesse Barnes -
No functional change; this breaks up pci_read_bridge_bases() into separate
pieces for the I/O, memory, and prefetchable memory windows, similar to how
Yinghai recently split up pci_setup_bridge() in 68e84ff3bdc.Signed-off-by: Bjorn Helgaas
Signed-off-by: Jesse Barnes
23 Feb, 2010
32 commits
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Use pci_pcie_cap() instead of pci_find_capability() to get PCIe
capability offset. This reduces redundant search in PCI configuration
space.Signed-off-by: Kenji Kaneshige
Signed-off-by: Jesse Barnes -
Introduce run-time PM callbacks for the PCI bus type. Make the new
callbacks work in analogy with the existing system sleep PM
callbacks, so that the drivers already converted to struct dev_pm_ops
can use their suspend and resume routines for run-time PM without
modifications.Signed-off-by: Rafael J. Wysocki
Signed-off-by: Jesse Barnes -
Use pci_is_pcie() instead of looking at obsolete is_pcie field in
struct pci_dev.Signed-off-by: Kenji Kaneshige
Signed-off-by: Jesse Barnes -
Although the majority of PCI devices can generate PMEs that in
principle may be used to wake up devices suspended at run time,
platform support is generally necessary to convert PMEs into wake-up
events that can be delivered to the kernel. If ACPI is used for this
purpose, PME signals generated by a PCI device will trigger the ACPI
GPE associated with the device to generate an ACPI wake-up event that
we can set up a handler for, provided that everything is configured
correctly.Unfortunately, the subset of PCI devices that have GPEs associated
with them is quite limited. The devices without dedicated GPEs have
to rely on the GPEs associated with other devices (in the majority of
cases their upstream bridges and, possibly, the root bridge) to
generate ACPI wake-up events in response to PME signals from them.Add ACPI platform support for PCI PME wake-up:
o Add a framework making is possible to use ACPI system notify
handlers for run-time PM.
o Add new PCI platform callback ->run_wake() to struct
pci_platform_pm_ops allowing us to enable/disable the platform to
generate wake-up events for given device. Implemet this callback
for the ACPI platform.
o Define ACPI wake-up handlers for PCI devices and PCI root buses and
make the PCI-ACPI binding code register wake-up notifiers for all
PCI devices present in the ACPI tables.
o Add function pci_dev_run_wake() which can be used by PCI drivers to
check if given device is capable of generating wake-up events at
run time.Developed in cooperation with Matthew Garrett .
Signed-off-by: Rafael J. Wysocki
Signed-off-by: Jesse Barnes -
Apparently, some machines may have problems with PCI run-time power
management if MSIs are used for the native PCIe PME signaling. In
particular, on the MSI Wind U-100 PCIe PME interrupts are not
generated by a PCIe root port after a resume from suspend to RAM, if
the system wake-up was triggered by a PME from the device attached to
this port. [It doesn't help to free the interrupt on suspend and
request it back on resume, even if that is done along with disabling
the MSI and re-enabling it, respectively.] However, if INTx
interrupts are used for this purpose on the same machine, everything
works just fine.For this reason, add a kernel command line switch allowing one to
request that MSIs be not used for the native PCIe PME signaling,
introduce a DMI table allowing us to blacklist machines that need
this switch to be set by default and put the MSI Wind U-100 into this
table.Signed-off-by: Rafael J. Wysocki
Signed-off-by: Jesse Barnes -
PCIe native PME detection mechanism is based on interrupts generated
by root ports or event collectors every time a PCIe device sends a
PME message upstream.Once a PME message has been sent by an endpoint device and received
by its root port (or event collector in the case of root complex
integrated endpoints), the Requester ID from the message header is
registered in the root port's Root Status register. At the same
time, the PME Status bit of the Root Status register is set to
indicate that there's a PME to handle. If PCIe PME interrupt is
enabled for the root port, it generates an interrupt once the PME
Status has been set. After receiving the interrupt, the kernel can
identify the PCIe device that generated the PME using the Requester
ID from the root port's Root Status register. [For details, see PCI
Express Base Specification, Rev. 2.0.]Implement a driver for the PCIe PME root port service working in
accordance with the above description.Based on a patch from Shaohua Li .
Signed-off-by: Rafael J. Wysocki
Signed-off-by: Jesse Barnes -
Add function pci_check_pme_status() that will check the PME status
bit of given device and clear it along with the PME enable bit. It
will be necessary for PCI run-time power management.Based on a patch from Shaohua Li
Signed-off-by: Rafael J. Wysocki
Signed-off-by: Jesse Barnes -
Make pci_bridge_check_ranges() store the PCI_PREF_RANGE_TYPE_64 in
addition to IORESOURCE_MEM_64. Just like pci_read_bridge_bases().Signed-off-by: Yinghai Lu
Signed-off-by: Jesse Barnes -
Handle the case where the slot bridge that doesn't get a pre-allocated
resource big enough to handle its child resources.. For example pcie
devices need 256M, but the bridge only gets 2M preallocated.Signed-off-by: Yinghai Lu
Signed-off-by: Jesse Barnes -
Move bus_size_bridges and assign resources out of pciehp_add_bridge()
and do them all together, one time, including slot bridge, to avoid to
calling assign resources several times when there are several bridges
under the slot bridge. Using pci_assign_unassigned_bridge_resources.Signed-off-by: Yinghai Lu
Reviewed-by: Alex Chiang
Signed-off-by: Jesse Barnes -
For use by pciehp.
pci_setup_bridge() will not check enabled for the slot bridge, otherwise
update res is not updated to bridge BAR. That is, bridge is already
enabled for port service.Signed-off-by: Yinghai Lu
Reviewed-by: Alex Chiang
Signed-off-by: Jesse Barnes -
BIOS separates IO ranges between several IOHs, and on some slots, BIOS assigns
resources to a bridge, but stops assigning resources to the device under that
bridge, because the device needs a big resource.So:
1. allocate resources and record the failed device resources
2. clear the BIOS assigned resources of the parent bridge of failing device
3. go back and call pci assign unassigned
4. if it still fails, go up the tree, clear more bridges. and try againSigned-off-by: Yinghai Lu
Signed-off-by: Jesse Barnes -
When clearing leaf bridge resources, trying to get a big enough one, we
could shrink the bridge if there is no resource under it. Confirm
against the old resource side to make sure we're increasing the
allocation.Signed-off-by: Yinghai Lu
Signed-off-by: Jesse Barnes -
We already track unassigned resources in struct resource, and this
prevents us from overwriting resource flags and info in the unassigned
case.Signed-off-by: Yinghai Lu
Signed-off-by: Jesse Barnes -
This allows us to track failed allocations for later re-trying with
reallocation.Signed-off-by: Yinghai Lu
Reviewed-by: Alex Chiang
Signed-off-by: Jesse Barnes -
We use this in later patches to free resrouce ranges for reassignment in
an effort to support a wider variety of PCI topologies.Signed-off-by: Yinghai Lu
Reviewed-by: Alex Chiang
Signed-off-by: Jesse Barnes -
check ioremap() return value.
Cc:
Signed-off-by: Andrew Morton
Signed-off-by: Jesse Barnes -
Add header file to fix build error:
drivers/pci/hotplug/ibmphp_hpc.c:135: error: implicit declaration of function 'init_MUTEX'
drivers/pci/hotplug/ibmphp_hpc.c:136: error: implicit declaration of function 'init_MUTEX_LOCKED'
drivers/pci/hotplug/ibmphp_hpc.c:797: error: implicit declaration of function 'down'
drivers/pci/hotplug/ibmphp_hpc.c:807: error: implicit declaration of function 'up'Signed-off-by: Randy Dunlap
Signed-off-by: Jesse Barnes -
Yinghai pointed out that the new pci_scan_slot() crashes when called
on an ARI-capable slot that is empty. Fix this by exiting early from
pci_scan_slot if there is no device in the slot.Also make next_ari_func() robust against devices not existing in case
the ARI capability is corrupt. ARI also requires that the devices be
listed in order, so if we find a function listed that is out of order,
stop scanning to prevent loops.Signed-off-by: Matthew Wilcox
Signed-off-by: Jesse Barnes -
Stanse found an ommitted pci_dev_put on one error path in
cpcihp_generic_init. The path is taken on !dev, but also when
dev->hdr_type != PCI_HEADER_TYPE_BRIDGE. However it omits to
pci_dev_put on the latter.As it is fine to pass NULL to pci_dev_put, put it in there
uncoditionally.Signed-off-by: Jiri Slaby
Cc: Scott Murray
Signed-off-by: Jesse Barnes -
The ISDN4Linux HiSax driver family contains the last remaining users
of the deprecated pci_find_device() function. This patch creates a
private copy of that function in HiSax, and removes the now unused
global function together with its controlling configuration option,
CONFIG_PCI_LEGACY.Signed-off-by: Tilman Schmidt
Signed-off-by: Jesse Barnes -
Don't print out resources without flags to avoid cluttering up the debug
output.Signed-off-by: Yinghai Lu
Signed-off-by: Jesse Barnes -
This is a good cleanup in itself, and makes it easier to modify specific
resource types in later code.Signed-off-by: Yinghai Lu
Acked-by: Linus Torvalds
Signed-off-by: Jesse Barnes -
ibmphp driver currently maps only 1KB of ebda memory area into kernel address
space during driver initialization. This causes kernel oops when the driver is
modprobe'd and it accesses memory beyond 1KB within ebda segment. The first
byte of ebda segment actually stores the length of the ebda region in
Kilobytes. Hence make use of the length parameter and map the entire ebda
region.Signed-off-by: Chandru Siddalingappa
Signed-off-by: Jesse Barnes -
Stanse found a cut&pasted memory leak in pciehp_queue_pushbutton_work
and shpchp_queue_pushbutton_work. info is not freed/assigned on all
paths. Fix that.Reviewed-by: Kenji Kaneshige
Signed-off-by: Jiri Slaby
Signed-off-by: Jesse Barnes -
Now that we return the new resource start position, there is no
need to update "struct resource" inside the align function.
Therefore, mark the struct resource as const.Cc: Bjorn Helgaas
Cc: Yinghai Lu
Signed-off-by: Dominik Brodowski
Signed-off-by: Jesse Barnes -
As suggested by Linus, align functions should return the start
of a resource, not void. An update of "res->start" is no longer
necessary.Cc: Bjorn Helgaas
Cc: Yinghai Lu
Signed-off-by: Dominik Brodowski
Signed-off-by: Jesse Barnes -
Currently, drivers/pci/quirks.c is built unconditionally, but if
CONFIG_PCI_QUIRKS is unset, the only things actually built in this
file are definitions of global variables and empty functions (due to
the #ifdef CONFIG_PCI_QUIRKS embracing all of the code inside the
file). This is not particularly nice and if someone overlooks
the #ifdef CONFIG_PCI_QUIRKS, build errors are introduced.To clean that up, move the definitions of the global variables in
quirks.c that are always built to pci.c, move the definitions of
the empty functions (compiled when CONFIG_PCI_QUIRKS is unset) to
headers (additionally make these functions static inline) and modify
drivers/pci/Makefile so that quirks.c is only built if
CONFIG_PCI_QUIRKS is set.Signed-off-by: Rafael J. Wysocki
Signed-off-by: Jesse Barnes -
No longer needed and causes build breakage.
Reported-by: Stephen Rothwell
Signed-off-by: Jesse Barnes -
Add the 8.0 GT/s speed.
Signed-off-by: Matthew Wilcox
Signed-off-by: Jesse Barnes -
Take advantage of some gaps in the table to fit in support for AGP speeds.
Signed-off-by: Matthew Wilcox
Signed-off-by: Jesse Barnes -
Both PCIe and PCI-X bridges report their secondary bus speed in their
respective capabilities.Signed-off-by: Matthew Wilcox
Signed-off-by: Jesse Barnes
