09 Mar, 2019

1 commit

  • Pull block layer updates from Jens Axboe:
    "Not a huge amount of changes in this round, the biggest one is that we
    finally have Mings multi-page bvec support merged. Apart from that,
    this pull request contains:

    - Small series that avoids quiescing the queue for sysfs changes that
    match what we currently have (Aleksei)

    - Series of bcache fixes (via Coly)

    - Series of lightnvm fixes (via Mathias)

    - NVMe pull request from Christoph. Nothing major, just SPDX/license
    cleanups, RR mp policy (Hannes), and little fixes (Bart,
    Chaitanya).

    - BFQ series (Paolo)

    - Save blk-mq cpu -> hw queue mapping, removing a pointer indirection
    for the fast path (Jianchao)

    - fops->iopoll() added for async IO polling, this is a feature that
    the upcoming io_uring interface will use (Christoph, me)

    - Partition scan loop fixes (Dongli)

    - mtip32xx conversion from managed resource API (Christoph)

    - cdrom registration race fix (Guenter)

    - MD pull from Song, two minor fixes.

    - Various documentation fixes (Marcos)

    - Multi-page bvec feature. This brings a lot of nice improvements
    with it, like more efficient splitting, larger IOs can be supported
    without growing the bvec table size, and so on. (Ming)

    - Various little fixes to core and drivers"

    * tag 'for-5.1/block-20190302' of git://git.kernel.dk/linux-block: (117 commits)
    block: fix updating bio's front segment size
    block: Replace function name in string with __func__
    nbd: propagate genlmsg_reply return code
    floppy: remove set but not used variable 'q'
    null_blk: fix checking for REQ_FUA
    block: fix NULL pointer dereference in register_disk
    fs: fix guard_bio_eod to check for real EOD errors
    blk-mq: use HCTX_TYPE_DEFAULT but not 0 to index blk_mq_tag_set->map
    block: optimize bvec iteration in bvec_iter_advance
    block: introduce mp_bvec_for_each_page() for iterating over page
    block: optimize blk_bio_segment_split for single-page bvec
    block: optimize __blk_segment_map_sg() for single-page bvec
    block: introduce bvec_nth_page()
    iomap: wire up the iopoll method
    block: add bio_set_polled() helper
    block: wire up block device iopoll method
    fs: add an iopoll method to struct file_operations
    loop: set GENHD_FL_NO_PART_SCAN after blkdev_reread_part()
    loop: do not print warn message if partition scan is successful
    block: bounce: make sure that bvec table is updated
    ...

    Linus Torvalds
     

01 Mar, 2019

1 commit

  • The original purpose of the code I fix is to replace max_discard with
    max_trim if max_trim is less than max_discard. When max_discard is 0
    we should replace max_discard with max_trim as well, because
    max_discard equals 0 happens only when the max_do_calc_max_discard
    process is overflowed, so if mmc_can_trim(card) is true, max_discard
    should be replaced by an available max_trim.
    However, in the original code, there are two lines of code interfere
    the right process.
    1) if (max_discard && mmc_can_trim(card))
    when max_discard is 0, it skips the process checking if max_discard
    needs to be replaced with max_trim.
    2) if (max_trim < max_discard)
    the condition is false when max_discard is 0. it also skips the process
    that replaces max_discard with max_trim, in fact, we should replace the
    0-valued max_discard with max_trim.

    Signed-off-by: Jiong Wu
    Fixes: b305882fbc87 (mmc: core: optimize mmc_calc_max_discard)
    Cc: stable@vger.kernel.org # v4.17+
    Signed-off-by: Ulf Hansson

    Jiong Wu
     

28 Feb, 2019

9 commits

  • Ulf Hansson
     
  • Commit 18094430d6b5 ("mmc: sdhci-esdhc-imx: add ADMA Length
    Mismatch errata fix") involve the fix of ERR004536, but the
    fix is incorrect. Double confirm with IC, need to clear the
    bit 7 of register 0x6c rather than set this bit 7.
    Here is the definition of bit 7 of 0x6c:
    0: enable the new IC fix for ERR004536
    1: do not use the IC fix, keep the same as before

    Find this issue on i.MX845s-evk board when enable CMDQ, and
    let system in heavy loading.

    root@imx8mmevk:~# dd if=/dev/mmcblk2 of=/dev/null bs=1M &
    root@imx8mmevk:~# memtester 1000M > /dev/zero &
    root@imx8mmevk:~# [ 139.897220] mmc2: cqhci: timeout for tag 16
    [ 139.901417] mmc2: cqhci: ============ CQHCI REGISTER DUMP ===========
    [ 139.907862] mmc2: cqhci: Caps: 0x0000310a | Version: 0x00000510
    [ 139.914311] mmc2: cqhci: Config: 0x00001001 | Control: 0x00000000
    [ 139.920753] mmc2: cqhci: Int stat: 0x00000000 | Int enab: 0x00000006
    [ 139.927193] mmc2: cqhci: Int sig: 0x00000006 | Int Coal: 0x00000000
    [ 139.933634] mmc2: cqhci: TDL base: 0x7809c000 | TDL up32: 0x00000000
    [ 139.940073] mmc2: cqhci: Doorbell: 0x00030000 | TCN: 0x00000000
    [ 139.946518] mmc2: cqhci: Dev queue: 0x00010000 | Dev Pend: 0x00010000
    [ 139.952967] mmc2: cqhci: Task clr: 0x00000000 | SSC1: 0x00011000
    [ 139.959411] mmc2: cqhci: SSC2: 0x00000001 | DCMD rsp: 0x00000000
    [ 139.965857] mmc2: cqhci: RED mask: 0xfdf9a080 | TERRI: 0x00000000
    [ 139.972308] mmc2: cqhci: Resp idx: 0x0000002e | Resp arg: 0x00000900
    [ 139.978761] mmc2: sdhci: ============ SDHCI REGISTER DUMP ===========
    [ 139.985214] mmc2: sdhci: Sys addr: 0xb2c19000 | Version: 0x00000002
    [ 139.991669] mmc2: sdhci: Blk size: 0x00000200 | Blk cnt: 0x00000400
    [ 139.998127] mmc2: sdhci: Argument: 0x40110400 | Trn mode: 0x00000033
    [ 140.004618] mmc2: sdhci: Present: 0x01088a8f | Host ctl: 0x00000030
    [ 140.011113] mmc2: sdhci: Power: 0x00000002 | Blk gap: 0x00000080
    [ 140.017583] mmc2: sdhci: Wake-up: 0x00000008 | Clock: 0x0000000f
    [ 140.024039] mmc2: sdhci: Timeout: 0x0000008f | Int stat: 0x00000000
    [ 140.030497] mmc2: sdhci: Int enab: 0x107f4000 | Sig enab: 0x107f4000
    [ 140.036972] mmc2: sdhci: AC12 err: 0x00000000 | Slot int: 0x00000502
    [ 140.043426] mmc2: sdhci: Caps: 0x07eb0000 | Caps_1: 0x8000b407
    [ 140.049867] mmc2: sdhci: Cmd: 0x00002c1a | Max curr: 0x00ffffff
    [ 140.056314] mmc2: sdhci: Resp[0]: 0x00000900 | Resp[1]: 0xffffffff
    [ 140.062755] mmc2: sdhci: Resp[2]: 0x328f5903 | Resp[3]: 0x00d00f00
    [ 140.069195] mmc2: sdhci: Host ctl2: 0x00000008
    [ 140.073640] mmc2: sdhci: ADMA Err: 0x00000007 | ADMA Ptr: 0x7809c108
    [ 140.080079] mmc2: sdhci: ============================================
    [ 140.086662] mmc2: running CQE recovery

    Fixes: 18094430d6b5 ("mmc: sdhci-esdhc-imx: add ADMA Length Mismatch errata fix")
    Signed-off-by: Haibo Chen
    Cc: stable@vger.kernel.org
    Signed-off-by: Ulf Hansson

    BOUGH CHEN
     
  • If the card was removed in suspended state and a new one was inserted,
    print a debug log when the check detects that it's not the old card.

    Signed-off-by: hongjiefang
    Signed-off-by: Ulf Hansson

    hongjiefang
     
  • Ulf Hansson
     
  • The busy timeout is 250msec per discard command.

    Signed-off-by: Avri Altman
    Signed-off-by: Ulf Hansson

    Avri Altman
     
  • SD spec v5.1 adds discard support. The flows and commands are similar to
    mmc, so just set the discard arg in CMD38.

    A host which supports DISCARD shall check if the DISCARD_SUPPORT (b313)
    is set in the SD_STATUS register. If the card does not support discard,
    the host shall not issue DISCARD command, but ERASE command instead.

    Post the DISCARD operation, the card may de-allocate the discarded
    blocks partially or completely. So the host mustn't make any assumptions
    concerning the content of the discarded region. This is unlike ERASE
    command, in which the region is guaranteed to contain either '0's or
    '1's, depends on the content of DATA_STAT_AFTER_ERASE (b55) in the scr
    register.

    One more important difference compared to ERASE is the busy timeout
    which we will address on the next patch.

    Signed-off-by: Avri Altman
    Signed-off-by: Ulf Hansson

    Avri Altman
     
  • After system suspend, CQE is in cqhci_off state, which set the HALT bit, make
    CQE in HALT state. If the SoC do not power down the USDHC module, then when
    system resume back, this bit keep the same, still set. Though there is a
    sdhci reset during sdhci_resume_host(), but this reset do not impact the
    CQE part, so need to clear this bit when enable CQE, otherwise CQE will
    stuck in the first CMDQ request after system resume back.

    Find this issue on NXP i.MX845s-mek board

    [ 105.919862] mmc2: cqhci: timeout for tag 6
    [ 105.923965] mmc2: cqhci: ============ CQHCI REGISTER DUMP ===========
    [ 105.930407] mmc2: cqhci: Caps: 0x0000310a | Version: 0x00000510
    [ 105.936847] mmc2: cqhci: Config: 0x00001001 | Control: 0x00000001
    [ 105.943286] mmc2: cqhci: Int stat: 0x00000000 | Int enab: 0x00000006
    [ 105.949725] mmc2: cqhci: Int sig: 0x00000006 | Int Coal: 0x00000000
    [ 105.956164] mmc2: cqhci: TDL base: 0x7809b000 | TDL up32: 0x00000000
    [ 105.962604] mmc2: cqhci: Doorbell: 0x00000040 | TCN: 0x00000000
    [ 105.969043] mmc2: cqhci: Dev queue: 0x00000000 | Dev Pend: 0x00000000
    [ 105.975483] mmc2: cqhci: Task clr: 0x00000000 | SSC1: 0x00011000
    [ 105.981922] mmc2: cqhci: SSC2: 0x00000001 | DCMD rsp: 0x00000000
    [ 105.988362] mmc2: cqhci: RED mask: 0xfdf9a080 | TERRI: 0x00000000
    [ 105.994801] mmc2: cqhci: Resp idx: 0x00000000 | Resp arg: 0x00000000
    [ 106.001240] mmc2: sdhci: ============ SDHCI REGISTER DUMP ===========
    [ 106.007680] mmc2: sdhci: Sys addr: 0xb2b37800 | Version: 0x00000002
    [ 106.014120] mmc2: sdhci: Blk size: 0x00000200 | Blk cnt: 0x00000001
    [ 106.020560] mmc2: sdhci: Argument: 0x00010000 | Trn mode: 0x00000013
    [ 106.026999] mmc2: sdhci: Present: 0x01f88008 | Host ctl: 0x00000030
    [ 106.033439] mmc2: sdhci: Power: 0x00000002 | Blk gap: 0x00000080
    [ 106.039878] mmc2: sdhci: Wake-up: 0x00000008 | Clock: 0x0000000f
    [ 106.046318] mmc2: sdhci: Timeout: 0x0000008f | Int stat: 0x00000000
    [ 106.052757] mmc2: sdhci: Int enab: 0x107f4000 | Sig enab: 0x107f4000
    [ 106.059196] mmc2: sdhci: AC12 err: 0x00000000 | Slot int: 0x00000502
    [ 106.065635] mmc2: sdhci: Caps: 0x07eb0000 | Caps_1: 0x8000b407
    [ 106.072075] mmc2: sdhci: Cmd: 0x00000d1a | Max curr: 0x00ffffff
    [ 106.078514] mmc2: sdhci: Resp[0]: 0x00000900 | Resp[1]: 0x31360181
    [ 106.084954] mmc2: sdhci: Resp[2]: 0x44473430 | Resp[3]: 0x00450100
    [ 106.091392] mmc2: sdhci: Host ctl2: 0x00000008
    [ 106.095836] mmc2: sdhci: ADMA Err: 0x00000000 | ADMA Ptr: 0x7804b208
    [ 106.102274] mmc2: sdhci: ============================================
    [ 106.108785] mmc2: running CQE recovery

    Signed-off-by: Haibo Chen
    Acked-by: Adrian Hunter
    Signed-off-by: Ulf Hansson

    BOUGH CHEN
     
  • the response type of CMD6 is R1B, when the first CMD6 gets response
    CRC error, do retry may get timeout error due to card may still in
    busy state, which cause this retry make no sense.

    Signed-off-by: Chaotian Jing
    Signed-off-by: Ulf Hansson

    Chaotian Jing
     
  • Logical block size is the lowest possible block size that the storage
    device can address. Max segment size is often related with controller's
    DMA capability. And it is reasonable to align max segment size with
    logical block size.

    SDHCI sets un-aligned max segment size, and causes ADMA error, so
    fix it by aligning max segment size with logical block size.

    Reported-by: Naresh Kamboju
    Cc: Christoph Hellwig
    Cc: Naresh Kamboju
    Cc: Faiz Abbas
    Cc: linux-block@vger.kernel.org
    Signed-off-by: Ming Lei
    Signed-off-by: Ulf Hansson

    Ming Lei
     

27 Feb, 2019

3 commits

  • Free up the allocated memory in the case of error return

    The value of mmc_host->cqe_enabled stays 'false'. Thus, cqhci_disable
    (mmc_cqe_ops->cqe_disable) won't be called to free the memory. Also,
    cqhci_disable() seems to be designed to disable and free all resources, not
    suitable to handle this corner case.

    Fixes: a4080225f51d ("mmc: cqhci: support for command queue enabled host")
    Signed-off-by: Alamy Liu
    Acked-by: Adrian Hunter
    Cc: stable@vger.kernel.org
    Signed-off-by: Ulf Hansson

    Alamy Liu
     
  • There is not enough space being allocated when DCMD is disabled.

    CQE_DCMD is not necessary to be enabled when CQE is enabled.
    (Software could halt CQE to send command)

    In the case that CQE_DCMD is not enabled, it still needs to allocate
    space for data transfer. For instance:
    CQE_DCMD is enabled: 31 slots space (one slot used by DCMD)
    CQE_DCMD is disabled: 32 slots space

    Fixes: a4080225f51d ("mmc: cqhci: support for command queue enabled host")
    Signed-off-by: Alamy Liu
    Acked-by: Adrian Hunter
    Cc: stable@vger.kernel.org
    Signed-off-by: Ulf Hansson

    Alamy Liu
     
  • In case of CQHCI, mrq->cmd may be NULL for data requests (non DCMD).
    In such case mmc_should_fail_request is directly dereferencing
    mrq->cmd while cmd is NULL.
    Fix this by checking for mrq->cmd pointer.

    Fixes: 72a5af554df8 ("mmc: core: Add support for handling CQE requests")
    Signed-off-by: Ritesh Harjani
    Cc: stable@vger.kernel.org
    Signed-off-by: Ulf Hansson

    Ritesh Harjani
     

26 Feb, 2019

3 commits

  • In R-Car Gen2 or later, the maximum number of transfer blocks are
    changed from 0xFFFF to 0xFFFFFFFF. Therefore, Block Count Register
    should use iowrite32().

    If another system (U-boot, Hypervisor OS, etc) uses bit[31:16], this
    value will not be cleared. So, SD/MMC card initialization fails.

    So, check for the bigger register and use apropriate write. Also, mark
    the register as extended on Gen2.

    Signed-off-by: Takeshi Saito
    [wsa: use max_blk_count in if(), add Gen2, update commit message]
    Signed-off-by: Wolfram Sang
    Cc: stable@kernel.org
    Reviewed-by: Simon Horman
    [Ulf: Fixed build error]
    Signed-off-by: Ulf Hansson

    Takeshi Saito
     
  • I have encountered an interrupt storm during the eMMC chip probing (and
    the chip finally didn't get detected). It turned out that U-Boot left
    the DMAC interrupts enabled while the Linux driver didn't use those.
    The SDHI driver's interrupt handler somehow assumes that, even if an
    SDIO interrupt didn't happen, it should return IRQ_HANDLED. I think
    that if none of the enabled interrupts happened and got handled, we
    should return IRQ_NONE -- that way the kernel IRQ code recoginizes
    a spurious interrupt and masks it off pretty quickly...

    Fixes: 7729c7a232a9 ("mmc: tmio: Provide separate interrupt handlers")
    Signed-off-by: Sergei Shtylyov
    Reviewed-by: Wolfram Sang
    Tested-by: Wolfram Sang
    Reviewed-by: Simon Horman
    Cc: stable@vger.kernel.org
    Signed-off-by: Ulf Hansson

    Sergei Shtylyov
     
  • The only user of mmc_align_data_size() is sdio_align_size(), which is
    called from SDIO func drivers to let them distinguish, how to optimally
    allocate data buffers.

    Let's move mmc_align_data_size() close to the SDIO code as to make it
    static, rename it to _sdio_align_size() and simplify its definition, all
    with the purpose of clarifying that this is SDIO specific.

    Signed-off-by: Ulf Hansson
    Reviewed-by: Avri Altman

    Ulf Hansson
     

25 Feb, 2019

23 commits

  • When using the mmc_spi driver with a card-detect pin, I noticed that the
    card was not detected immediately after probe, but only after it was
    unplugged and plugged back in (and the CD IRQ fired).

    The call tree looks something like this:

    mmc_spi_probe
    mmc_add_host
    mmc_start_host
    _mmc_detect_change
    mmc_schedule_delayed_work(&host->detect, 0)
    mmc_rescan
    host->bus_ops->detect(host)
    mmc_detect
    _mmc_detect_card_removed
    host->ops->get_cd(host)
    mmc_gpio_get_cd -> -ENOSYS (ctx->cd_gpio not set)
    mmc_gpiod_request_cd
    ctx->cd_gpio = desc

    To fix this issue, call mmc_detect_change after the card-detect GPIO/IRQ
    is registered.

    Signed-off-by: Jonathan Neuschäfer
    Reviewed-by: Linus Walleij
    Cc: stable@vger.kernel.org
    Signed-off-by: Ulf Hansson

    Jonathan Neuschäfer
     
  • MMC OF parsing functions, which parses various host DT properties, should
    stay close to each other. Therefore, let's move mmc_of_parse_voltage()
    close to mmc_of_parse() into host.c.

    Additionally, there is no reason to build the code only when CONFIG_OF is
    set, as there should be stub functions for the OF helpers that is being
    used, so let's drop this condition as well.

    Signed-off-by: Ulf Hansson

    Ulf Hansson
     
  • The only left user of mmc_regulator_get_ocrmask() is the mmc core itself.
    Therefore, let's drop the export and turn it into static.

    Signed-off-by: Ulf Hansson

    Ulf Hansson
     
  • The mmc regulator helper functions, are placed in the extensive core.c
    file. In a step towards trying to create a better structure of files,
    avoiding too many lines of code per file, let's move these helpers to a new
    file, regulator.c.

    Moreover, this within this context it makes sense to also drop the export
    of mmc_vddrange_to_ocrmask(), but instead let's make it internal to the mmc
    core.

    Signed-off-by: Ulf Hansson

    Ulf Hansson
     
  • Let's drop the open-coding of the parsing of the "voltage-ranges" DT
    property and convert to use the common mmc_of_parse_voltage() API instead.

    Signed-off-by: Ulf Hansson

    Ulf Hansson
     
  • All callers of mmc_wait_for_app_cmd() set the retries in-parameter to
    MMC_CMD_RETRIES. This is silly, so let's just drop the in-parameter
    altogether, as to simplify the code.

    Signed-off-by: Ulf Hansson

    Ulf Hansson
     
  • mmc_wait_for_app_cmd() is an internal function for sd_ops.c, thus let's
    drop the unnecessary export and turn it into static function.

    Signed-off-by: Ulf Hansson

    Ulf Hansson
     
  • SCC is used for SDR104/HS200/HS400. We need to change SCC_DT2FF
    according to the mode. If it is inappropriate, CRC error tends to occur.

    This adds variable "tap_hs400" for HS400 mode and configures SCC_DT2FF
    as needed.

    Signed-off-by: Takeshi Saito
    [wsa: rebased to upstream and updated commit message]
    Signed-off-by: Wolfram Sang
    Reviewed-by: Niklas Söderlund
    Tested-by: Marek Vasut
    Signed-off-by: Ulf Hansson

    Takeshi Saito
     
  • The current approach with sending a CMD12 (STOP_TRANSMISSION) to complete a
    data transfer request, either because of using the open-ended transmission
    type or because of receiving an error during a pre-defined data transfer,
    isn't sufficient for the STM32 sdmmc variant. More precisely, this variant
    needs to clear the DPSM ("Data Path State Machine") by sending a CMD12, for
    all failing ADTC commands.

    Support this, by adding a struct mmc_command inside the struct mmci_host
    and initialize it to a CMD12 during ->probe(). Let's also add checks for
    the new conditions, to enable mmci_data_irq() and mmci_cmd_irq() to
    postpone the calls to mmci_request_end(), but instead send the CMD12.

    Cc: Ludovic Barre
    Signed-off-by: Ulf Hansson
    Tested-by: Ludovic Barre

    Ulf Hansson
     
  • In preparation to enabling -Wimplicit-fallthrough, mark switch cases
    according to what the compiler looks for, where we are expecting to fall
    through.

    Signed-off-by: Gustavo A. R. Silva
    Signed-off-by: Ulf Hansson

    Gustavo A. R. Silva
     
  • The SDHCI core is know properly checking for the state of a WP GPIO,
    so there is no longer any need for the sdhci-tegra code to implement
    ->get_ro() using mmc_gpio_get_ro().

    Signed-off-by: Thomas Petazzoni
    Tested-by: Thierry Reding
    Acked-by: Thierry Reding
    Acked-by: Adrian Hunter
    Signed-off-by: Ulf Hansson

    Thomas Petazzoni
     
  • The SDHCI core is now properly checking for the state of a WP GPIO,
    so there is no longer any need for the sdhci-omap code to implement
    ->get_ro() using mmc_gpio_get_ro().

    Signed-off-by: Thomas Petazzoni
    Reviewed-by: Thierry Reding
    Acked-by: Adrian Hunter
    Signed-off-by: Ulf Hansson

    Thomas Petazzoni
     
  • Even though SDHCI controllers may have a dedicated WP pin that can be
    queried using the SDHCI_PRESENT_STATE register, some platforms may
    chose to use a separate regular GPIO to route the WP signal. Such a
    GPIO is typically represented using the wp-gpios property in the
    Device Tree.

    Unfortunately, the current sdhci_check_ro() function does not make use
    of such GPIO when available: it either uses a host controller specific
    ->get_ro() operation, or uses the SDHCI_PRESENT_STATE. Several host
    controller specific ->get_ro() functions are implemented just to check
    a WP GPIO state.

    Instead of pushing this to more controller-specific implementations,
    let's handle this in the core SDHCI code, just like it is already done
    for the CD GPIO in sdhci_get_cd().

    The below patch simply changes sdhci_check_ro() to use the value of
    the WP GPIO if available.

    Signed-off-by: Thomas Petazzoni
    Acked-by: Adrian Hunter
    Signed-off-by: Ulf Hansson

    Thomas Petazzoni
     
  • The WMT SDMMC driver uses slot GPIO helpers and does not make
    any use of so drop this surplus include.

    Cc: Tony Prisk
    Signed-off-by: Linus Walleij
    Signed-off-by: Ulf Hansson

    Linus Walleij
     
  • The Sunxi MMC driver uses slot GPIO helpers and does not make
    any use of or so drop these
    surplus includes.

    Cc: Chen-Yu Tsai
    Cc: Andre Przywara
    Cc: cenowy Zheng
    Acked-by: Maxime Ripard
    Signed-off-by: Linus Walleij
    Signed-off-by: Ulf Hansson

    Linus Walleij
     
  • The SDHCI PXAv2 driver uses slot GPIO helpers and does not make
    any use of so drop this surplus include.

    Cc: Jisheng Zhang
    Acked-by: Adrian Hunter
    Signed-off-by: Linus Walleij
    Signed-off-by: Ulf Hansson

    Linus Walleij
     
  • The SDHCI BCM Kona driver uses slot GPIO helpers and does not
    make any use of or so drop these
    surplus includes.

    Cc: Jisheng Zhang
    Acked-by: Adrian Hunter
    Signed-off-by: Linus Walleij
    Signed-off-by: Ulf Hansson

    Linus Walleij
     
  • The MXS-MMC driver uses slot GPIO helpers and does not make
    any use of or so drop these
    surplus includes.

    Cc: Marek Vasut
    Cc: Fabio Estevam
    Cc: Stefan Wahren
    Signed-off-by: Linus Walleij
    Reviewed-by: Fabio Estevam
    Signed-off-by: Ulf Hansson

    Linus Walleij
     
  • The MXCMMC driver uses slot GPIO helpers and does not make
    any use of or so drop these
    surplus includes.

    Cc: Jun Qian
    Cc: Matteo Facchinetti
    Signed-off-by: Linus Walleij
    Signed-off-by: Ulf Hansson

    Linus Walleij
     
  • There is an if block that is not indented, fix this. Also add a
    break statement on the default case to clean up a cppcheck warning.

    Signed-off-by: Colin Ian King
    Signed-off-by: Ulf Hansson

    Colin Ian King
     
  • SD specs version 4.x and 5.x have a dedicated slices in the SCR register.
    Higher versions will rely on a combination of the existing fields.

    Signed-off-by: Avri Altman
    Signed-off-by: Ulf Hansson

    Avri Altman
     
  • In MMC, the discard arg is a read-only ext_csd parameter - set it once
    on card init. To be consistent, do that for SD as well even though its
    discard arg is always 0x0.

    Signed-off-by: Avri Altman
    Signed-off-by: Ulf Hansson

    Avri Altman
     
  • The argument "override_active_level" made it possible to
    enforce a specific polarity on the write-protect
    GPIO line. All callers in the kernel pass "false" to this
    call after I have converted all drivers to use GPIO machine
    descriptors, so remove the argument and clean out this.

    This kind of polarity inversion should be handled by the
    GPIO descriptor inside the GPIO library if needed.

    This rids us of one instance of the kludgy calls into
    the gpiod_get_raw_value() API.

    Signed-off-by: Linus Walleij
    Signed-off-by: Ulf Hansson

    Linus Walleij