30 Apr, 2019

1 commit

  • When enabling ARCH_SUNXI from allnoconfig, SUNXI_SRAM is enabled, but
    not REGMAP_MMIO, so the kernel fails to link with an undefined reference
    to __devm_regmap_init_mmio_clk. Select REGMAP_MMIO, as suggested in
    drivers/base/regmap/Kconfig.

    This creates the following dependency loop:

    drivers/of/Kconfig:68: symbol OF_IRQ depends on IRQ_DOMAIN
    kernel/irq/Kconfig:63: symbol IRQ_DOMAIN is selected by REGMAP
    drivers/base/regmap/Kconfig:7: symbol REGMAP default is visible depending on REGMAP_MMIO
    drivers/base/regmap/Kconfig:39: symbol REGMAP_MMIO is selected by SUNXI_SRAM
    drivers/soc/sunxi/Kconfig:4: symbol SUNXI_SRAM is selected by USB_MUSB_SUNXI
    drivers/usb/musb/Kconfig:63: symbol USB_MUSB_SUNXI depends on GENERIC_PHY
    drivers/phy/Kconfig:7: symbol GENERIC_PHY is selected by PHY_BCM_NS_USB3
    drivers/phy/broadcom/Kconfig:29: symbol PHY_BCM_NS_USB3 depends on MDIO_BUS
    drivers/net/phy/Kconfig:12: symbol MDIO_BUS default is visible depending on PHYLIB
    drivers/net/phy/Kconfig:181: symbol PHYLIB is selected by ARC_EMAC_CORE
    drivers/net/ethernet/arc/Kconfig:18: symbol ARC_EMAC_CORE is selected by ARC_EMAC
    drivers/net/ethernet/arc/Kconfig:24: symbol ARC_EMAC depends on OF_IRQ

    To fix the circular dependency, make USB_MUSB_SUNXI select GENERIC_PHY
    instead of depending on it. This matches the use of GENERIC_PHY by all
    but two other drivers.

    Cc: # 4.19
    Fixes: 5828729bebbb ("soc: sunxi: export a regmap for EMAC clock reg on A64")
    Signed-off-by: Samuel Holland
    Acked-by: Maxime Ripard
    Signed-off-by: Bin Liu
    Signed-off-by: Greg Kroah-Hartman

    Samuel Holland
     

19 Mar, 2019

1 commit


07 Mar, 2019

1 commit

  • Pull ARM SoC driver updates from Arnd Bergmann:
    "As usual, the drivers/tee and drivers/reset subsystems get merged
    here, with the expected set of smaller updates and some new hardware
    support. The tee subsystem now supports device drivers to be attached
    to a tee, the first example here is a random number driver with its
    implementation in the secure world.

    Three new power domain drivers get added for specific chip families:
    - Broadcom BCM283x chips (used in Raspberry Pi)
    - Qualcomm Snapdragon phone chips
    - Xilinx ZynqMP FPGA SoCs

    One new driver is added to talk to the BPMP firmware on NVIDIA
    Tegra210

    Existing drivers are extended for new SoC variants from NXP, NVIDIA,
    Amlogic and Qualcomm"

    * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (113 commits)
    tee: optee: update optee_msg.h and optee_smc.h to dual license
    tee: add cancellation support to client interface
    dpaa2-eth: configure the cache stashing amount on a queue
    soc: fsl: dpio: configure cache stashing destination
    soc: fsl: dpio: enable frame data cache stashing per software portal
    soc: fsl: guts: make fsl_guts_get_svr() static
    hwrng: make symbol 'optee_rng_id_table' static
    tee: optee: Fix unsigned comparison with less than zero
    hwrng: Fix unsigned comparison with less than zero
    tee: fix possible error pointer ctx dereferencing
    hwrng: optee: Initialize some structs using memset instead of braces
    tee: optee: Initialize some structs using memset instead of braces
    soc: fsl: dpio: fix memory leak of a struct qbman on error exit path
    clk: tegra: dfll: Make symbol 'tegra210_cpu_cvb_tables' static
    soc: qcom: llcc-slice: Fix typos
    qcom: soc: llcc-slice: Consolidate some code
    qcom: soc: llcc-slice: Clear the global drv_data pointer on error
    drivers: soc: xilinx: Add ZynqMP power domain driver
    firmware: xilinx: Add APIs to control node status/power
    dt-bindings: power: Add ZynqMP power domain bindings
    ...

    Linus Torvalds
     

06 Mar, 2019

3 commits

  • Pull timer and clockevent updates from Thomas Gleixner:
    "The time(r) core and clockevent updates are mostly boring this time:

    - A new driver for the Tegra210 timer

    - Small fixes and improvements alll over the place

    - Documentation updates and cleanups"

    * 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (22 commits)
    soc/tegra: default select TEGRA_TIMER for Tegra210
    clocksource/drivers/tegra: Add Tegra210 timer support
    dt-bindings: timer: add Tegra210 timer
    clocksource/drivers/timer-cs5535: Rename the file for consistency
    clocksource/drivers/timer-pxa: Rename the file for consistency
    clocksource/drivers/tango-xtal: Rename the file for consistency
    dt-bindings: timer: gpt: update binding doc
    clocksource/drivers/exynos_mct: Remove unused header includes
    dt-bindings: timer: mediatek: update bindings for MT7629 SoC
    clocksource/drivers/exynos_mct: Fix error path in timer resources initialization
    clocksource/drivers/exynos_mct: Remove dead code
    clocksource/drivers/riscv: Add required checks during clock source init
    dt-bindings: timer: renesas: tmu: Document r8a774c0 bindings
    dt-bindings: timer: renesas, cmt: Document r8a774c0 CMT support
    clocksource/drivers/exynos_mct: Clear timer interrupt when shutdown
    clocksource/drivers/exynos_mct: Move one-shot check from tick clear to ISR
    clocksource/drivers/arch_timer: Workaround for Allwinner A64 timer instability
    clocksource/drivers/sun5i: Fail gracefully when clock rate is unavailable
    timers: Mark expected switch fall-throughs
    timekeeping/debug: No need to check return value of debugfs_create functions
    ...

    Linus Torvalds
     
  • Pull MIPS updates from Paul Burton:

    - Support for the MIPSr6 MemoryMapID register & Global INValidate TLB
    (GINVT) instructions, allowing for more efficient TLB maintenance
    when running on a CPU such as the I6500 that supports these.

    - Enable huge page support for MIPS64r6.

    - Optimize post-DMA cache sync by removing that code entirely for
    kernel configurations in which we know it won't be needed.

    - The number of pages allocated for interrupt stacks is now calculated
    correctly, where before we would wastefully allocate too much memory
    in some configurations.

    - The ath79 platform migrates to devicetree.

    - The bcm47xx platform sees fixes for the Buffalo WHR-G54S board.

    - The ingenic/jz4740 platform gains support for appended devicetrees.

    - The cavium_octeon, lantiq, loongson32 & sgi-ip27 platforms all see
    cleanups as do various pieces of core architecture code.

    * tag 'mips_5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (66 commits)
    MIPS: lantiq: Remove separate GPHY Firmware loader
    MIPS: ingenic: Add support for appended devicetree
    MIPS: SGI-IP27: rework HUB interrupts
    MIPS: SGI-IP27: do boot CPU init later
    MIPS: SGI-IP27: do xtalk scanning later
    MIPS: SGI-IP27: use pr_info/pr_emerg and pr_cont to fix output
    MIPS: SGI-IP27: clean up bridge access and header files
    MIPS: SGI-IP27: get rid of volatile and hubreg_t
    MIPS: irq: Allocate accurate order pages for irq stack
    MIPS: dma-noncoherent: Remove bogus condition in dma_sync_phys()
    MIPS: eBPF: Remove REG_32BIT_ZERO_EX
    MIPS: eBPF: Always return sign extended 32b values
    MIPS: CM: Fix indentation
    MIPS: BCM47XX: Fix/improve Buffalo WHR-G54S support
    MIPS: OCTEON: program rx/tx-delay always from DT
    MIPS: OCTEON: delete board-specific link status
    MIPS: OCTEON: don't lie about interface type of CN3005 board
    MIPS: OCTEON: warn if deprecated link status is being used
    MIPS: OCTEON: add fixed-link nodes to in-kernel device tree
    MIPS: Delete unused flush_cache_sigtramp()
    ...

    Linus Torvalds
     
  • Pull crypto update from Herbert Xu:
    "API:
    - Add helper for simple skcipher modes.
    - Add helper to register multiple templates.
    - Set CRYPTO_TFM_NEED_KEY when setkey fails.
    - Require neither or both of export/import in shash.
    - AEAD decryption test vectors are now generated from encryption
    ones.
    - New option CONFIG_CRYPTO_MANAGER_EXTRA_TESTS that includes random
    fuzzing.

    Algorithms:
    - Conversions to skcipher and helper for many templates.
    - Add more test vectors for nhpoly1305 and adiantum.

    Drivers:
    - Add crypto4xx prng support.
    - Add xcbc/cmac/ecb support in caam.
    - Add AES support for Exynos5433 in s5p.
    - Remove sha384/sha512 from artpec7 as hardware cannot do partial
    hash"

    [ There is a merge of the Freescale SoC tree in order to pull in changes
    required by patches to the caam/qi2 driver. ]

    * 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (174 commits)
    crypto: s5p - add AES support for Exynos5433
    dt-bindings: crypto: document Exynos5433 SlimSSS
    crypto: crypto4xx - add missing of_node_put after of_device_is_available
    crypto: cavium/zip - fix collision with generic cra_driver_name
    crypto: af_alg - use struct_size() in sock_kfree_s()
    crypto: caam - remove redundant likely/unlikely annotation
    crypto: s5p - update iv after AES-CBC op end
    crypto: x86/poly1305 - Clear key material from stack in SSE2 variant
    crypto: caam - generate hash keys in-place
    crypto: caam - fix DMA mapping xcbc key twice
    crypto: caam - fix hash context DMA unmap size
    hwrng: bcm2835 - fix probe as platform device
    crypto: s5p-sss - Use AES_BLOCK_SIZE define instead of number
    crypto: stm32 - drop pointless static qualifier in stm32_hash_remove()
    crypto: chelsio - Fixed Traffic Stall
    crypto: marvell - Remove set but not used variable 'ivsize'
    crypto: ccp - Update driver messages to remove some confusion
    crypto: adiantum - add 1536 and 4096-byte test vectors
    crypto: nhpoly1305 - add a test vector with len % 16 != 0
    crypto: arm/aes-ce - update IV after partial final CTR block
    ...

    Linus Torvalds
     

05 Mar, 2019

2 commits


01 Mar, 2019

1 commit

  • …/leo/linux into arm/drivers

    NXP/FSL SoC driver updates for v5.1 take4

    DPIO driver
    - Add support for cache stashing and enable it in dpaa2-eth driver

    GUTS driver
    - Make fsl_guts_get_svr() API internal in favor of more generic
    soc_device_match()

    * tag 'soc-fsl-next-v5.1-4' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux:
    dpaa2-eth: configure the cache stashing amount on a queue
    soc: fsl: dpio: configure cache stashing destination
    soc: fsl: dpio: enable frame data cache stashing per software portal
    soc: fsl: guts: make fsl_guts_get_svr() static

    Signed-off-by: Arnd Bergmann <arnd@arndb.de>

    Arnd Bergmann
     

27 Feb, 2019

3 commits


26 Feb, 2019

1 commit

  • The separate GPHY Firmware loader driver is not used any more, the GPHY
    firmware is now loaded by the GSWIP switch driver which also makes use
    of the GPHY.
    Remove the old unused GPHY firmware loader driver.

    The GPHY firmware is useless without an Ethernet and switch driver, it
    should not harm if loading this does not work for system using an old
    device tree.
    I am not aware of any vendor separating the device tree from the kernel
    binary, it should be ok to remove this.

    The code and the functionality form this separate GPHY firmware loader
    was added to the gswip driver in commit 14fceff4771e ("net: dsa: Add
    Lantiq / Intel DSA driver for vrx200")

    Signed-off-by: Hauke Mehrtens
    Signed-off-by: Paul Burton
    Cc: linux-mips@vger.kernel.org
    Cc: devicetree@vger.kernel.org
    Cc: john@phrozen.org
    Cc: netdev@vger.kernel.org

    Hauke Mehrtens
     

23 Feb, 2019

1 commit


20 Feb, 2019

2 commits


17 Feb, 2019

1 commit


16 Feb, 2019

9 commits

  • This patch fixes typos in the llcc-slice driver.

    Fixes: 72d1cd033154 ("qcom: soc: llcc-slice: Clear the global drv_data pointer on error")

    Signed-off-by: Andy Gross

    Andy Gross
     
  • …git/agross/linux into arm/drivers

    Qualcomm ARM Based Driver Updates for v5.1 - Part 2

    * Fixups/Cleanup for Qualcomm LLCC

    * tag 'qcom-drivers-for-5.1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
    qcom: soc: llcc-slice: Consolidate some code
    qcom: soc: llcc-slice: Clear the global drv_data pointer on error

    Signed-off-by: Arnd Bergmann <arnd@arndb.de>

    Arnd Bergmann
     
  • …/ssantosh/linux-keystone into arm/drivers

    soc: ti: couple of non critical fixes for v5.1

    - Fix the Clang warning for enum in Navigator dma
    - Simplify code in ti_sci with DEFINE_SHOW_ATTRIBUTE macro

    * tag 'drivers_soc_for_5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
    soc: ti: knav_dma: Use proper enum in pktdma_init_chan
    firmware: ti_sci: Change to use DEFINE_SHOW_ATTRIBUTE macro

    Signed-off-by: Arnd Bergmann <arnd@arndb.de>

    Arnd Bergmann
     
  • This pull request contains Broadcom ARM/ARM64/MIPS based SoCs changes
    for 5.1, please pull the following:

    - Stefan updates the BCM2835 SoC driver with downstream properties and
    uses that to implement a reboot notifier to tell the VC4 firmware when
    Linux on the ARM CPU is rebooting

    - Eric adds a proper power domain driver for the BCM283x SoCs and
    updates a bunch of drivers to have a better and clearer Device Tree
    definition to support power domains/breaking up of functionality. This
    requires converting the existing watchdog driver into a MFD and then
    breaking up the functionality into separate drivers and finally
    updating the DTS files to leverage the power domains information.

    - Wei provides a fix for making a symbol static

    * tag 'arm-soc/for-5.1/drivers' of https://github.com/Broadcom/stblinux:
    ARM: bcm283x: Switch V3D over to using the PM driver instead of firmware.
    ARM: bcm283x: Extend the WDT DT node out to cover the whole PM block. (v4)
    soc: bcm: bcm2835-pm: Make local symbol static
    soc: bcm: Make PM driver default for BCM2835
    soc: bcm: bcm2835-pm: Add support for power domains under a new binding.
    bcm2835-pm: Move bcm2835-watchdog's DT probe to an MFD.
    dt-bindings: soc: Add a new binding for the BCM2835 PM node. (v4)
    firmware: raspberrypi: notify VC4 firmware of a reboot
    soc: bcm2835: sync firmware properties with downstream

    Signed-off-by: Arnd Bergmann

    Arnd Bergmann
     
  • …t/agross/linux into arm/drivers

    Qualcomm ARM Based Driver Updates for v5.1

    * Add Qualcomm RPMh power domain driver and related changes
    * Fix issues with sleep/wake sets and batch API in RPMh
    * Update MAINTAINERS Qualcomm entry
    * Fixup RMTFS-mem sysfs and uevents
    * Fix error handling in GSBI
    * Add SMD-RPM compatible entry for SDM660

    * tag 'qcom-drivers-for-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
    soc: qcom: smd-rpm: Add sdm660 compatible
    soc: qcom: gsbi: Fix error handling in gsbi_probe()
    soc: qcom: rpmh: Avoid accessing freed memory from batch API
    drivers: qcom: rpmh: avoid sending sleep/wake sets immediately
    soc: qcom: rmtfs-mem: Make sysfs attributes world-readable
    soc: qcom: rmtfs-mem: Add class to enable uevents
    soc: qcom: update config dependencies for QCOM_RPMPD
    soc: qcom: rpmpd: Drop family A RPM dependency
    MAINTAINERS: update list of qcom drivers
    soc: qcom: rpmhpd: Mark mx as a parent for cx
    soc: qcom: rpmhpd: Add RPMh power domain driver
    soc: qcom: rpmpd: Add support for get/set performance state
    soc: qcom: rpmpd: Add a Power domain driver to model corners
    dt-bindings: power: Add qcom rpm power domain driver bindings
    OPP: Add support for parsing the 'opp-level' property
    dt-bindings: opp: Introduce opp-level bindings

    Signed-off-by: Arnd Bergmann <arnd@arndb.de>

    Arnd Bergmann
     
  • …egra/linux into arm/drivers

    soc/tegra: Changes for v5.1-rc1

    This contains a couple of miscellaneous fixes for minor issues and a
    largish rework of the PMC driver to make it work on systems where the
    PMC has been locked down and can only be accessed from secure firmware.

    * tag 'tegra-for-5.1-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
    soc/tegra: pmc: Support systems where PMC is marked secure
    soc/tegra: pmc: Explicitly initialize all fields
    soc/tegra: pmc: Make alignment consistent
    soc/tegra: pmc: Pass struct tegra_pmc * where possible
    soc/tegra: pmc: Make tegra_powergate_is_powered() a local function
    soc/tegra: pmc: Add missing kerneldoc
    soc/tegra: pmc: Sort includes alphabetically
    soc/tegra: pmc: Use TEGRA186_ prefix for GPIO names
    soc/tegra: fuse: Fix typo in tegra210_init_speedo_data
    soc/tegra: fuse: Fix illegal free of IO base address

    Signed-off-by: Arnd Bergmann <arnd@arndb.de>

    Arnd Bergmann
     
  • …lman/linux-amlogic into arm/drivers

    Amlogic: driver updates for v5.1
    - clock measure: add support for G12a SoC family
    - misc. fixes

    * tag 'amlogic-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
    soc: amlogic: clk-measure: add axg and g12a support
    dt-bindings: amlogic: add new compatible devices to clk_measure
    soc: amlogic: canvas: Fix meson_canvas_get when probe failed
    soc: amlogic: add missing of_node_put()

    Signed-off-by: Arnd Bergmann <arnd@arndb.de>

    Arnd Bergmann
     
  • …wnguo/linux into arm/drivers

    i.MX drivers update for 5.1:
    - Do not get GPCv2 driver depend on SOC_IMX8MQ since the driver is
    going to be used on more SoCs than just i.MX8MQ.
    - Add power domain information into SCU bindings document.
    - Add support of start/stop a CPU into imx firmware driver.
    - Support multiple address ranges per child node for imx-weim bus
    driver.

    * tag 'imx-drivers-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
    firmware: imx: Add support to start/stop a CPU
    soc: imx: Break dependency on SOC_IMX8MQ for GPCv2
    firmware: imx: scu-pd: add fallback compatible string support
    dt-bindings: fsl: scu: add imx8qm scu power domain support
    dt-bindings: fsl: scu: add fallback compatible string for power domain
    bus: imx-weim: guard against timing configuration conflicts
    bus: imx-weim: support multiple address ranges per child node
    dt-bindings: bus: imx-weim: document multiple address ranges per child node
    soc: imx: gpcv2: handle reset clocks
    soc: imx: gpcv2: handle additional power-down bits in handshake register

    Signed-off-by: Arnd Bergmann <arnd@arndb.de>

    Arnd Bergmann
     
  • arm64: zynqmp: SoC changes for v5.1

    - Extend firmware interface with reset, nvmem,
    power management and power domain support

    - Add reset, nvmem driver, power management and
    power domain drivers
    -

    * tag 'zynqmp-soc-for-v5.1' of https://github.com/Xilinx/linux-xlnx:
    drivers: soc: xilinx: Add ZynqMP power domain driver
    firmware: xilinx: Add APIs to control node status/power
    dt-bindings: power: Add ZynqMP power domain bindings
    drivers: soc: xilinx: Add ZynqMP PM driver
    firmware: xilinx: Implement ZynqMP power management APIs
    dt-bindings: soc: Add ZynqMP PM bindings
    nvmem: zynqmp: Added zynqmp nvmem firmware driver
    dt-bindings: nvmem: Add bindings for ZynqMP nvmem driver
    firmware: xilinx: Add zynqmp_pm_get_chipid() API
    reset: reset-zynqmp: Adding support for Xilinx zynqmp reset controller.
    dt-bindings: reset: Add bindings for ZynqMP reset driver
    firmware: xilinx: Add reset API's

    Signed-off-by: Arnd Bergmann

    Arnd Bergmann
     

13 Feb, 2019

2 commits

  • Make the code a little bit clearer (and use less gotos)
    by consolidating some of the initialization.

    Signed-off-by: Jordan Crouse
    Reviewed-by: Douglas Anderson
    Signed-off-by: Andy Gross

    Jordan Crouse
     
  • Currently the data structure for llc-slice is devm allocated and
    stored as a global but never cleared if the probe function fails.
    This is a problem because devm managed memory gets freed on probe
    failure the API functions could access the pointer after it has been
    freed.

    Initialize the drv_data pointer to an error and reset it to an error
    on probe failure or device destroy and add protection to the API
    functions to make sure the memory doesn't get accessed.

    Signed-off-by: Jordan Crouse
    Signed-off-by: Andy Gross

    Jordan Crouse
     

12 Feb, 2019

2 commits


08 Feb, 2019

2 commits


07 Feb, 2019

1 commit

  • The call to of_parse_phandle returns a node pointer with refcount
    incremented thus it must be explicitly decremented here after the last
    usage.

    Signed-off-by: Wen Yang
    Reviewed-by: Neil Armstrong
    Fixes: d4983983d987 ("soc: amlogic: add meson-canvas driver")
    Signed-off-by: Kevin Hilman

    wen yang
     

05 Feb, 2019

1 commit


02 Feb, 2019

6 commits

  • Add the compatible for the RPM in SDM660, so that rpm resources can be
    made available.

    Signed-off-by: Craig Tatlor
    Signed-off-by: Bjorn Andersson
    Signed-off-by: Andy Gross

    Craig Tatlor
     
  • If of_platform_populate() fails in gsbi_probe(),
    gsbi->hclk is left undisabled.

    Found by Linux Driver Verification project (linuxtesting.org).

    Signed-off-by: Alexey Khoroshilov
    Signed-off-by: Bjorn Andersson
    Signed-off-by: Andy Gross

    Alexey Khoroshilov
     
  • Using the batch API from the interconnect driver sometimes leads to a
    KASAN error due to an access to freed memory. This is easier to trigger
    with threadirqs on the kernel commandline.

    BUG: KASAN: use-after-free in rpmh_tx_done+0x114/0x12c
    Read of size 1 at addr fffffff51414ad84 by task irq/110-apps_rs/57

    CPU: 0 PID: 57 Comm: irq/110-apps_rs Tainted: G W 4.19.10 #72
    Call trace:
    dump_backtrace+0x0/0x2f8
    show_stack+0x20/0x2c
    __dump_stack+0x20/0x28
    dump_stack+0xcc/0x10c
    print_address_description+0x74/0x240
    kasan_report+0x250/0x26c
    __asan_report_load1_noabort+0x20/0x2c
    rpmh_tx_done+0x114/0x12c
    tcs_tx_done+0x450/0x768
    irq_forced_thread_fn+0x58/0x9c
    irq_thread+0x120/0x1dc
    kthread+0x248/0x260
    ret_from_fork+0x10/0x18

    Allocated by task 385:
    kasan_kmalloc+0xac/0x148
    __kmalloc+0x170/0x1e4
    rpmh_write_batch+0x174/0x540
    qcom_icc_set+0x8dc/0x9ac
    icc_set+0x288/0x2e8
    a6xx_gmu_stop+0x320/0x3c0
    a6xx_pm_suspend+0x108/0x124
    adreno_suspend+0x50/0x60
    pm_generic_runtime_suspend+0x60/0x78
    __rpm_callback+0x214/0x32c
    rpm_callback+0x54/0x184
    rpm_suspend+0x3f8/0xa90
    pm_runtime_work+0xb4/0x178
    process_one_work+0x544/0xbc0
    worker_thread+0x514/0x7d0
    kthread+0x248/0x260
    ret_from_fork+0x10/0x18

    Freed by task 385:
    __kasan_slab_free+0x12c/0x1e0
    kasan_slab_free+0x10/0x1c
    kfree+0x134/0x588
    rpmh_write_batch+0x49c/0x540
    qcom_icc_set+0x8dc/0x9ac
    icc_set+0x288/0x2e8
    a6xx_gmu_stop+0x320/0x3c0
    a6xx_pm_suspend+0x108/0x124
    adreno_suspend+0x50/0x60
    cr50_spi spi5.0: SPI transfer timed out
    pm_generic_runtime_suspend+0x60/0x78
    __rpm_callback+0x214/0x32c
    rpm_callback+0x54/0x184
    rpm_suspend+0x3f8/0xa90
    pm_runtime_work+0xb4/0x178
    process_one_work+0x544/0xbc0
    worker_thread+0x514/0x7d0
    kthread+0x248/0x260
    ret_from_fork+0x10/0x18

    The buggy address belongs to the object at fffffff51414ac80
    which belongs to the cache kmalloc-512 of size 512
    The buggy address is located 260 bytes inside of
    512-byte region [fffffff51414ac80, fffffff51414ae80)
    The buggy address belongs to the page:
    page:ffffffbfd4505200 count:1 mapcount:0 mapping:fffffff51e00c680 index:0x0 compound_mapcount: 0
    flags: 0x4000000000008100(slab|head)
    raw: 4000000000008100 ffffffbfd4529008 ffffffbfd44f9208 fffffff51e00c680
    raw: 0000000000000000 0000000000200020 00000001ffffffff 0000000000000000
    page dumped because: kasan: bad access detected

    Memory state around the buggy address:
    fffffff51414ac80: fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb
    fffffff51414ad00: fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb
    >fffffff51414ad80: fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb
    ^
    fffffff51414ae00: fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb
    fffffff51414ae80: fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc

    The batch API sets the same completion for each rpmh message that's sent
    and then loops through all the messages and waits for that single
    completion declared on the stack to be completed before returning from
    the function and freeing the message structures. Unfortunately, some
    messages may still be in process and 'stuck' in the TCS. At some later
    point, the tcs_tx_done() interrupt will run and try to process messages
    that have already been freed at the end of rpmh_write_batch(). This will
    in turn access the 'needs_free' member of the rpmh_request structure and
    cause KASAN to complain. Furthermore, if there's a message that's
    completed in rpmh_tx_done() and freed immediately after the complete()
    call is made we'll be racing with potentially freed memory when
    accessing the 'needs_free' member:

    CPU0 CPU1
    ---- ----
    rpmh_tx_done()
    complete(&compl)
    wait_for_completion(&compl)
    kfree(rpm_msg)
    if (rpm_msg->needs_free)

    Let's fix this by allocating a chunk of completions for each message and
    waiting for all of them to be completed before returning from the batch
    API. Alternatively, we could wait for the last message in the batch, but
    that may be a more complicated change because it looks like
    tcs_tx_done() just iterates through the indices of the queue and
    completes each message instead of tracking the last inserted message and
    completing that first.

    Fixes: c8790cb6da58 ("drivers: qcom: rpmh: add support for batch RPMH request")
    Cc: Lina Iyer
    Cc: "Raju P.L.S.S.S.N"
    Cc: Matthias Kaehlcke
    Cc: Evan Green
    Cc: stable@vger.kernel.org
    Reviewed-by: Lina Iyer
    Reviewed-by: Evan Green
    Signed-off-by: Stephen Boyd
    Signed-off-by: Bjorn Andersson
    Signed-off-by: Andy Gross

    Stephen Boyd
     
  • Fix the redundant call being made to send the sleep and wake requests
    immediately to the controller.

    As per the patch [1], the sleep and wake request votes are cached in
    rpmh controller and sent during rpmh_flush(). These requests needs to be
    sent only during entry of deeper system low power modes or suspend.

    [1] https://patchwork.kernel.org/patch/10477533/

    Reviewed-by: Lina Iyer
    Reviewed-by: Evan Green
    Signed-off-by: Raju P.L.S.S.S.N
    Signed-off-by: Bjorn Andersson
    Signed-off-by: Andy Gross

    Raju P.L.S.S.S.N
     
  • In order to run an rmtfs daemon as an unprivileged user, that user would
    need access to the phys_addr and size sysfs attributes. Sharing these
    attributes with unprivileged users doesn't really leak anything
    sensitive, since if you have access to physical memory, the jig is
    up anyway.

    Make those attributes readable by all.

    Reviewed-by: Brian Norris
    Reviewed-by: Bjorn Andersson
    Signed-off-by: Evan Green
    Signed-off-by: Bjorn Andersson
    Signed-off-by: Andy Gross

    Evan Green
     
  • Currently the qcom_rmtfs_memN devices are entirely invisible to the udev world.
    Add a class to the rmtfs device so that uevents fire when the device is added.

    Reviewed-by: Brian Norris
    Reviewed-by: Bjorn Andersson
    Signed-off-by: Evan Green
    Signed-off-by: Bjorn Andersson
    Signed-off-by: Andy Gross

    Evan Green