07 Dec, 2011

1 commit


06 Dec, 2011

7 commits

  • * 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
    intr_remapping: Fix section mismatch in ir_dev_scope_init()
    intel-iommu: Fix section mismatch in dmar_parse_rmrr_atsr_dev()
    x86, amd: Fix up numa_node information for AMD CPU family 15h model 0-0fh northbridge functions
    x86, AMD: Correct align_va_addr documentation
    x86/rtc, mrst: Don't register a platform RTC device for for Intel MID platforms
    x86/mrst: Battery fixes
    x86/paravirt: PTE updates in k(un)map_atomic need to be synchronous, regardless of lazy_mmu mode
    x86: Fix "Acer Aspire 1" reboot hang
    x86/mtrr: Resolve inconsistency with Intel processor manual
    x86: Document rdmsr_safe restrictions
    x86, microcode: Fix the failure path of microcode update driver init code
    Add TAINT_FIRMWARE_WORKAROUND on MTRR fixup
    x86/mpparse: Account for bus types other than ISA and PCI
    x86, mrst: Change the pmic_gpio device type to IPC
    mrst: Added some platform data for the SFI translations
    x86,mrst: Power control commands update
    x86/reboot: Blacklist Dell OptiPlex 990 known to require PCI reboot
    x86, UV: Fix UV2 hub part number
    x86: Add user_mode_vm check in stack_overflow_check

    Linus Torvalds
     
  • * 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
    perf: Fix loss of notification with multi-event
    perf, x86: Force IBS LVT offset assignment for family 10h
    perf, x86: Disable PEBS on SandyBridge chips
    trace_events_filter: Use rcu_assign_pointer() when setting ftrace_event_call->filter
    perf session: Fix crash with invalid CPU list
    perf python: Fix undefined symbol problem
    perf/x86: Enable raw event access to Intel offcore events
    perf: Don't use -ENOSPC for out of PMU resources
    perf: Do not set task_ctx pointer in cpuctx if there are no events in the context
    perf/x86: Fix PEBS instruction unwind
    oprofile, x86: Fix crash when unloading module (nmi timer mode)
    oprofile: Fix crash when unloading module (hr timer mode)

    Linus Torvalds
     
  • * 'sched-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
    sched, x86: Avoid unnecessary overflow in sched_clock
    sched: Fix buglet in return_cfs_rq_runtime()
    sched: Avoid SMT siblings in select_idle_sibling() if possible
    sched: Set the command name of the idle tasks in SMP kernels
    sched, rt: Provide means of disabling cross-cpu bandwidth sharing
    sched: Document wait_for_completion_*() return values
    sched_fair: Fix a typo in the comment describing update_sd_lb_stats
    sched: Add a comment to effective_load() since it's a pain

    Linus Torvalds
     
  • * 'for-linus' of git://git390.marist.edu/pub/scm/linux-2.6:
    [S390] ap: Setup timer for sending messages after reset.
    [S390] cio: fix chsc_chp_vary
    [S390] cio: provide fake irb for transport mode IO
    [S390] cio: disallow driver io for known to be broken paths
    [S390] hibernate: directly trigger subchannel evaluation
    [S390] remove reset of system call restart on psw changes
    [S390] add missing .set function for NT_S390_LAST_BREAK regset
    [S390] fix page change underindication in pgste_update_all
    [S390] ptrace inferior call interactions with TIF_SYSCALL
    [S390] kdump: Replace is_kdump_kernel() with OLDMEM_BASE check

    Linus Torvalds
     
  • I've received complaints that the numa_node attribute for family
    15h model 00-0fh (e.g. Interlagos) northbridge functions shows
    -1 instead of the proper node ID.

    Correct this with attached quirks (similar to quirks for other
    AMD CPU families used in multi-socket systems).

    Signed-off-by: Andreas Herrmann
    Cc: Frank Arnold
    Cc: Borislav Petkov
    Link: http://lkml.kernel.org/r/20111202072143.GA31916@alberich.amd.com
    Signed-off-by: Ingo Molnar

    Andreas Herrmann
     
  • Intel MID x86 platforms have a memory mapped virtual RTC
    instead. No MID platform have the default ports (and
    accessing them may do weird stuff).

    Signed-off-by: Mathias Nyman
    Signed-off-by: Alan Cox
    Cc: feng.tang@intel.com
    Cc: Feng Tang
    Cc: "H. Peter Anvin"
    Signed-off-by: Andrew Morton
    Signed-off-by: Ingo Molnar

    Mathias Nyman
     
  • Fix an outstanding issue that has been reported since 2.6.37.
    Under a heavy loaded machine processing "fork()" calls could
    crash with:

    BUG: unable to handle kernel paging request at f573fc8c
    IP: [] swap_count_continued+0x104/0x180
    *pdpt = 000000002a3b9027 *pde = 0000000001bed067 *pte = 0000000000000000 Oops: 0000 [#1] SMP
    Modules linked in:
    Pid: 1638, comm: apache2 Not tainted 3.0.4-linode37 #1
    EIP: 0061:[] EFLAGS: 00210246 CPU: 3
    EIP is at swap_count_continued+0x104/0x180
    .. snip..
    Call Trace:
    [] ? __swap_duplicate+0xc2/0x160
    [] ? pte_mfn_to_pfn+0x87/0xe0
    [] ? swap_duplicate+0x14/0x40
    [] ? copy_pte_range+0x45b/0x500
    [] ? copy_page_range+0x195/0x200
    [] ? dup_mmap+0x1c6/0x2c0
    [] ? dup_mm+0xa8/0x130
    [] ? copy_process+0x98a/0xb30
    [] ? do_fork+0x4f/0x280
    [] ? getnstimeofday+0x43/0x100
    [] ? sys_clone+0x30/0x40
    [] ? ptregs_clone+0x15/0x48
    [] ? syscall_call+0x7/0xb

    The problem is that in copy_page_range() we turn lazy mode on,
    and then in swap_entry_free() we call swap_count_continued()
    which ends up in:

    map = kmap_atomic(page, KM_USER0) + offset;

    and then later we touch *map.

    Since we are running in batched mode (lazy) we don't actually
    set up the PTE mappings and the kmap_atomic is not done
    synchronously and ends up trying to dereference a page that has
    not been set.

    Looking at kmap_atomic_prot_pfn(), it uses
    'arch_flush_lazy_mmu_mode' and doing the same in
    kmap_atomic_prot() and __kunmap_atomic() makes the problem go
    away.

    Interestingly, commit b8bcfe997e4615 ("x86/paravirt: remove lazy
    mode in interrupts") removed part of this to fix an interrupt
    issue - but it went to far and did not consider this scenario.

    Signed-off-by: Konrad Rzeszutek Wilk
    Cc: Peter Zijlstra
    Cc: Jeremy Fitzhardinge
    Cc:
    Signed-off-by: Andrew Morton
    Signed-off-by: Ingo Molnar

    Konrad Rzeszutek Wilk
     

05 Dec, 2011

16 commits

  • Ingo Molnar
     
  • Looks like on some Acer Aspire 1s with older bioses, reboot via bios
    fails. It works on my machine, (with BIOS version 0.3310) but
    not on some others (BIOS version 0.3309).

    There's a log of problems at:

    https://bbs.archlinux.org/viewtopic.php?id=124136

    This patch adds a different callback to the reboot quirk table,
    to allow rebooting via keybaord controller.

    Reported-by: Uroš Vampl
    Tested-by: Vasily Khoruzhick
    Signed-off-by: Peter Chubb
    Cc: Don Zickus
    Cc: Peter Zijlstra
    Cc: stable@kernel.org
    Link: http://lkml.kernel.org/r/1323093233-9481-1-git-send-email-anarsoul@gmail.com
    Signed-off-by: Ingo Molnar

    Peter Chubb
     
  • Following is from Notes of section 11.5.3 of Intel processor
    manual available at:

    http://www.intel.com/Assets/PDF/manual/325384.pdf

    For the Pentium 4 and Intel Xeon processors, after the sequence of
    steps given above has been executed, the cache lines containing the
    code between the end of the WBINVD instruction and before the
    MTRRS have actually been disabled may be retained in the cache
    hierarchy. Here, to remove code from the cache completely, a
    second WBINVD instruction must be executed after the MTRRs have
    been disabled.

    This patch provides resolution for that.

    Ideally, I will like to make changes only for Pentium 4 and Xeon
    processors. But, I am not finding easier way to do it.
    And, extra wbinvd() instruction does not hurt much for other
    processors.

    Signed-off-by: Ajaykumar Hotchandani
    Cc: Linus Torvalds
    Cc: Arjan van de Ven
    Cc: Lucas De Marchi
    Link: http://lkml.kernel.org/r/4EBD1CC5.3030008@oracle.com
    Signed-off-by: Ingo Molnar

    Ajaykumar Hotchandani
     
  • Recently, I got bitten by using rdmsr_safe too early in the boot
    process. Document its shortcomings for future reference.

    Link: http://lkml.kernel.org/r/4ED5B70F.606@lwfinger.net
    Signed-off-by: Borislav Petkov

    Borislav Petkov
     
  • The microcode update driver's initialization code does not handle
    failures correctly. This patch fixes this issue.

    Signed-off-by: Jan Beulich
    Signed-off-by: Srivatsa S. Bhat
    Link: http://lkml.kernel.org/r/20111107123530.12164.31227.stgit@srivatsabhat.in.ibm.com
    Link: http://lkml.kernel.org/r/4ED8E2270200007800065120@nat28.tlf.novell.com
    Signed-off-by: Borislav Petkov

    Srivatsa S. Bhat
     
  • TAINT_FIRMWARE_WORKAROUND should be set when an MTRR fixup
    is done.

    Signed-off-by: Prarit Bhargava
    Acked-by: David Rientjes
    Link: http://lkml.kernel.org/r/1318958650-12447-1-git-send-email-prarit@redhat.com
    Signed-off-by: Ingo Molnar

    Prarit Bhargava
     
  • In commit f8924e770e04 ("x86: unify mp_bus_info"), the 32-bit
    and 64-bit versions of MP_bus_info were rearranged to match each
    other better. Unfortunately it introduced a regression: prior
    to that change we used to always set the mp_bus_not_pci bit,
    then clear it if we found a PCI bus. After it, we set
    mp_bus_not_pci for ISA buses, clear it for PCI buses, and leave
    it alone otherwise.

    In the cases of ISA and PCI, there's not much difference. But
    ISA is not the only non-PCI bus, so it's better to always set
    mp_bus_not_pci and clear it only for PCI.

    Without this change, Dan's Dell PowerEdge 4200 panics on boot
    with a log indicating interrupt routing trouble unless the
    "noapic" option is supplied. With this change, the machine
    boots reliably without "noapic".

    Fixes http://bugs.debian.org/586494

    Reported-bisected-and-tested-by: Dan McGrath
    Signed-off-by: Bjorn Helgaas
    Cc: stable@vger.kernel.org # 2.6.26+
    Cc: Dan McGrath
    Cc: Alexey Starikovskiy
    [jrnieder@gmail.com: clarified commit message]
    Signed-off-by: Jonathan Nieder
    Link: http://lkml.kernel.org/r/20111122215000.GA9151@elie.hsd1.il.comcast.net
    Signed-off-by: Ingo Molnar

    Bjorn Helgaas
     
  • In latest firmware's SFI tables, pmic_gpio has been set to
    IPC type of device, so we need handle it too.

    Signed-off-by: Feng Tang
    Signed-off-by: Alan Cox
    Signed-off-by: Ingo Molnar

    Feng Tang
     
  • Add SFI glue for the following devices:

    tca6416: a gpio expander compatible with max7315
    mpu3050: gyro sensor

    Both of these actual drivers are already upstream

    Signed-off-by: Jekyll Lai
    Signed-off-by: Alan Cox
    Signed-off-by: Ingo Molnar

    Jekyll Lai
     
  • On the Intel MID devices SCU commands are issued to manage power
    off and the like. We need to issue different ones for
    non-Lincroft based devices.

    Signed-off-by: Alek Du
    Signed-off-by: Jacob Pan
    Signed-off-by: Alan Cox
    Signed-off-by: Ingo Molnar

    Jacob Pan
     
  • Dell OptiPlex 990 is known to require PCI reboot, so add it to
    the reboot blacklist in pci_reboot_dmi_table[].

    Signed-off-by: Rafael J. Wysocki
    Link: http://lkml.kernel.org/r/201111160019.51303.rjw@sisk.pl
    Signed-off-by: Ingo Molnar

    Rafael J. Wysocki
     
  • There was a mixup when the SGI UV2 hub chip was sent to be
    fabricated, and it ended up with the wrong part number in the
    HRP_NODE_ID mmr. Future versions of the chip will (may) have the
    correct part number. Change the UV infrastructure to recognize
    both part numbers as valid IDs of a UV2 hub chip.

    Signed-off-by: Jack Steiner
    Link: http://lkml.kernel.org/r/20111129210058.GA20452@sgi.com
    Signed-off-by: Ingo Molnar

    Jack Steiner
     
  • The kernel stack overflow is checked in stack_overflow_check(),
    which may wrongly detect the overflow if the stack pointer in
    user space points to the kernel stack intentionally or
    accidentally. So, the actual overflow is never detected after
    this misdetection because WARN_ONCE() is used on the detection
    of it.

    This patch adds user-mode-vm checking before it to avoid this
    problem and bails out early if the user stack is used.

    Signed-off-by: Mitsuo Hayasaka
    Cc: yrl.pp-manager.tt@hitachi.com
    Cc: Randy Dunlap
    Link: http://lkml.kernel.org/r/20111129060821.11076.55315.stgit@ltc219.sdl.hitachi.co.jp
    Signed-off-by: Ingo Molnar
    Cc: "H. Peter Anvin"

    Mitsuo Hayasaka
     
  • On AMD family 10h we see firmware bug messages like the following:

    [Firmware Bug]: cpu 6, try to use APIC500 (LVT offset 0) for vector 0x10400, but the register is already in use for vector 0xf9 on another cpu
    [Firmware Bug]: cpu 6, IBS interrupt offset 0 not available (MSRC001103A=0x0000000000000100)
    [Firmware Bug]: using offset 1 for IBS interrupts
    [Firmware Bug]: workaround enabled for IBS LVT offset
    perf: AMD IBS detected (0x00000007)

    We always see this, since the offsets are not assigned by the BIOS for
    this family. Force LVT offset assignment in this case. If the OS
    assignment fails, fallback to BIOS settings and try to setup this.

    The fallback to BIOS settings weakens the family check since
    force_ibs_eilvt_setup() may fail e.g. in case of virtual machines.
    But setup may still succeed if BIOS offsets are correct.

    Other families don't have a workaround implemented that assigns LVT
    offsets. It's ok, to drop calling force_ibs_eilvt_setup() for that
    families.

    With the patch the [Firmware Bug] messages vanish. We see now:

    IBS: LVT offset 1 assigned
    perf: AMD IBS detected (0x00000007)

    Signed-off-by: Robert Richter
    Signed-off-by: Peter Zijlstra
    Link: http://lkml.kernel.org/r/20111109162225.GO12451@erda.amd.com
    Signed-off-by: Ingo Molnar

    Robert Richter
     
  • Cc: Stephane Eranian
    Cc: stable@kernel.org
    Signed-off-by: Peter Zijlstra
    Signed-off-by: Ingo Molnar

    Peter Zijlstra
     
  • People with old AMD chips are getting hung boots, because commit
    bcb80e53877c ("x86, microcode, AMD: Add microcode revision to
    /proc/cpuinfo") moved the microcode detection too early into
    "early_init_amd()".

    At that point we are *so* early in the booth that the exception tables
    haven't even been set up yet, so the whole

    rdmsr_safe(MSR_AMD64_PATCH_LEVEL, &c->microcode, &dummy);

    doesn't actually work: if the rdmsr does a GP fault (due to non-existant
    MSR register on older CPU's), we can't fix it up yet, and the boot fails.

    Fix it by simply moving the code to a slightly later point in the boot
    (init_amd() instead of early_init_amd()), since the kernel itself
    doesn't even really care about the microcode patchlevel at this point
    (or really ever: it's made available to user space in /proc/cpuinfo, and
    updated if you do a microcode load).

    Reported-tested-and-bisected-by: Larry Finger
    Tested-by: Bob Tracy
    Acked-by: Borislav Petkov
    Cc: Ingo Molnar
    Cc: Srivatsa S. Bhat
    Signed-off-by: Linus Torvalds

    Linus Torvalds
     

04 Dec, 2011

1 commit

  • The idea behind commit d91ee5863b71 ("cpuidle: replace xen access to x86
    pm_idle and default_idle") was to have one call - disable_cpuidle()
    which would make pm_idle not be molested by other code. It disallows
    cpuidle_idle_call to be set to pm_idle (which is excellent).

    But in the select_idle_routine() and idle_setup(), the pm_idle can still
    be set to either: amd_e400_idle, mwait_idle or default_idle. This
    depends on some CPU flags (MWAIT) and in AMD case on the type of CPU.

    In case of mwait_idle we can hit some instances where the hypervisor
    (Amazon EC2 specifically) sets the MWAIT and we get:

    Brought up 2 CPUs
    invalid opcode: 0000 [#1] SMP

    Pid: 0, comm: swapper Not tainted 3.1.0-0.rc6.git0.3.fc16.x86_64 #1
    RIP: e030:[] [] mwait_idle+0x6f/0xb4
    ...
    Call Trace:
    [] cpu_idle+0xae/0xe8
    [] cpu_bringup_and_idle+0xe/0x10
    RIP [] mwait_idle+0x6f/0xb4
    RSP

    In the case of amd_e400_idle we don't get so spectacular crashes, but we
    do end up making an MSR which is trapped in the hypervisor, and then
    follow it up with a yield hypercall. Meaning we end up going to
    hypervisor twice instead of just once.

    The previous behavior before v3.0 was that pm_idle was set to
    default_idle regardless of select_idle_routine/idle_setup.

    We want to do that, but only for one specific case: Xen. This patch
    does that.

    Fixes RH BZ #739499 and Ubuntu #881076
    Reported-by: Stefan Bader
    Signed-off-by: Konrad Rzeszutek Wilk
    Signed-off-by: Linus Torvalds

    Konrad Rzeszutek Wilk
     

03 Dec, 2011

1 commit


02 Dec, 2011

2 commits

  • * 'fixes' of http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm:
    ARM: 7182/1: ARM cpu topology: fix warning
    ARM: 7181/1: Restrict kprobes probing SWP instructions to ARMv5 and below
    ARM: 7180/1: Change kprobes testcase with unpredictable STRD instruction
    ARM: 7177/1: GIC: avoid skipping non-existent PPIs in irq_start calculation
    ARM: 7176/1: cpu_pm: register GIC PM notifier only once
    ARM: 7175/1: add subname parameter to mfp_set_groupg callers
    ARM: 7174/1: Fix build error in kprobes test code on Thumb2 kernels
    ARM: 7172/1: dma: Drop GFP_COMP for DMA memory allocations
    ARM: 7171/1: unwind: add unwind directives to bitops assembly macros
    ARM: 7170/2: fix compilation breakage in entry-armv.S
    ARM: 7168/1: use cache type functions for arch_get_unmapped_area
    ARM: perf: check that we have a platform device when reserving PMU
    ARM: 7166/1: Use PMD_SHIFT instead of PGDIR_SHIFT in dma-consistent.c
    ARM: 7165/2: PL330: Fix typo in _prepare_ccr()
    ARM: 7163/2: PL330: Only register usable channels
    ARM: 7162/1: errata: tidy up Kconfig options for PL310 errata workarounds
    ARM: 7161/1: errata: no automatic store buffer drain
    ARM: perf: initialise used_mask for fake PMU during validation
    ARM: PMU: remove pmu_init declaration
    ARM: PMU: re-export release_pmu symbol to modules

    Linus Torvalds
     
  • This patch enables or updates support for the CC770 and AN82527
    CAN controller on the TQM8548 and TQM8xx boards.

    CC: devicetree-discuss@lists.ozlabs.org
    CC: linuxppc-dev@ozlabs.org
    CC: Kumar Gala
    Signed-off-by: Wolfgang Grandegger
    Signed-off-by: David S. Miller

    Wolfgang Grandegger
     

01 Dec, 2011

9 commits

  • git commit 20b40a794baf3b4b "signal race with restarting system calls"
    added code to the poke_user/poke_user_compat to reset the system call
    restart information in the thread-info if the PSW address is changed.
    The purpose of that change has been to workaround old gdbs that do
    not know about the REGSET_SYSTEM_CALL. It turned out that this is not
    a good idea, it makes the behaviour of the debuggee dependent on the
    order of specific ptrace call, e.g. the REGSET_SYSTEM_CALL register
    set needs to be written last. And the workaround does not really fix
    old gdbs, inferior calls on interrupted restarting system calls do not
    work either way.

    Signed-off-by: Martin Schwidefsky

    Martin Schwidefsky
     
  • The last breaking event address is a read-only value, the regset misses the
    .set function. If a PTRACE_SETREGSET is done for NT_S390_LAST_BREAK we
    get an oops due to a branch to zero:

    Kernel BUG at 0000000000000002 verbose debug info unavailable
    illegal operation: 0001 #1 SMP
    ...
    Call Trace:
    ( ptrace_regset+0x184/0x188)
    ptrace_request+0x37a/0x4fc
    arch_ptrace+0x108/0x1fc
    SyS_ptrace+0xaa/0x12c
    sysc_noemu+0x16/0x1c
    0x3fffd5ec10c
    Last Breaking-Event-Address:
    ptrace_regset+0x132/0x188

    Add a nop .set function to prevent the branch to zero.

    Signed-off-by: Martin Schwidefsky
    Cc: stable@kernel.org

    Martin Schwidefsky
     
  • This patch makes sure we don't underindicate _PAGE_CHANGED in case
    we have a race between an operation that changes the page and this
    code path that hits us between page_get_storage_key and
    page_set_storage_key. Note that we still have a potential
    underindication on _PAGE_REFERENCED in the unlikely event that
    the page was changed but not referenced _and_ someone references
    the page in the race window. That's not considered to be a problem.

    Signed-off-by: Carsten Otte
    Signed-off-by: Martin Schwidefsky

    Carsten Otte
     
  • The TIF_SYSCALL bit needs to be cleared if the debugger changes the state
    of the ptraced process in regard to the presence of a system call.
    Otherwise the system call will be restarted although the debugger set up
    an inferior call.

    Signed-off-by: Martin Schwidefsky

    Martin Schwidefsky
     
  • In order to have the same behavior for kdump based stand-alone dump
    as for the kexec method, the is_kdump_kernel() check (only true for
    the kexec method) has to be replaced by the OLDMEM_BASE check (true
    for both methods).

    Signed-off-by: Michael Holzheu
    Signed-off-by: Martin Schwidefsky

    Michael Holzheu
     
  • * 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (45 commits)
    ARM: ux500: update defconfig
    ARM: u300: update defconfig
    ARM: at91: enable additional boards in existing soc defconfig files
    ARM: at91: refresh soc defconfig files for 3.2
    ARM: at91: rename defconfig files appropriately
    ARM: OMAP2+: Fix Compilation error when omap_l3_noc built as module
    ARM: OMAP2+: Remove empty io.h
    ARM: OMAP2: select ARM_AMBA if OMAP3_EMU is defined
    ARM: OMAP: smartreflex: fix IRQ handling bug
    ARM: OMAP: PM: only register TWL with voltage layer when device is present
    ARM: OMAP: hwmod: Fix the addr space, irq, dma count APIs
    arm: mx28: fix bit operation in clock setting
    ARM: imx: export imx_ioremap
    ARM: imx/mm-imx3: conditionally compile i.MX31 and i.MX35 code
    ARM: mx5: Fix checkpatch warnings in cpu-imx5.c
    MAINTAINERS: Add missing directory
    ARM: imx: drop 'ARCH_MX31' and 'ARCH_MX35'
    ARM: imx6q: move clock register map to machine_desc.map_io
    ARM: pxa168/gplugd: add the correct SSP device
    ARM: Update mach-types to fix mxs build breakage
    ...

    Linus Torvalds
     
  • kernel/sched.c:7354:2: warning: initialization from incompatible pointer type

    Align cpu_coregroup_mask prototype interface with sched_domain_mask_f typedef
    use int cpu instead of unsigned int cpu

    Cc:
    Signed-off-by: Vincent Guittot
    Signed-off-by: Russell King

    Vincent Guittot
     
  • The SWP instruction is deprecated on ARMv6 and with ARMv7 it will be
    UNDEFINED when CONFIG_SWP_EMULATE is selected. In this case, probing a
    SWP instruction will cause an oops when the kprobes emulation code
    executes an undefined instruction.

    As the SWP instruction should be rare or non-existent in kernels for
    ARMv6 and later, we can simply avoid these problems by not allowing
    probing of these.

    Reported-by: Leif Lindholm
    Tested-by: Leif Lindholm
    Acked-by: Nicolas Pitre
    Signed-off-by: Jon Medhurst
    Signed-off-by: Russell King

    Jon Medhurst (Tixy)
     
  • There is a kprobes testcase for the instruction "strd r2, [r3], r4".
    This has unpredictable behaviour as it uses r3 for register writeback
    addressing and also stores it to memory.

    On a cortex A9, this testcase would fail because the instruction writes
    the updated value of r3 to memory, whereas the kprobes emulation code
    writes the original value.

    Fix this by changing testcase to used r5 instead of r3.

    Reported-by: Leif Lindholm
    Tested-by: Leif Lindholm
    Acked-by: Nicolas Pitre
    Signed-off-by: Jon Medhurst
    Signed-off-by: Russell King

    Jon Medhurst (Tixy)
     

29 Nov, 2011

3 commits