16 Nov, 2015
7 commits
-
dma_addr_t may be defined as 32 or 64 bit depending on configuration,
so it cannot be printed using the normal format strings, as
gcc correctly warns:drivers/dma/at_hdmac.c: In function 'atc_prep_dma_interleaved':
drivers/dma/at_hdmac.c:731:28: warning: format '%x' expects argument of type 'unsigned int', but argument 4 has type 'dma_addr_t {aka long long unsigned int}' [-Wformat=]This changes the format strings to use the special "%pad" format
string that prints a dma_addr_t, and changes the arguments so we
pass the address by reference as required.Signed-off-by: Arnd Bergmann
Acked-by: Nicolas Ferre
Signed-off-by: Vinod Koul -
dma_addr_t may be defined as 32 or 64 bit depending on configuration,
so it cannot be printed using the normal format strings, as
gcc correctly warns:drivers/dma/at_xdmac.c: In function 'at_xdmac_interleaved_queue_desc':
drivers/dma/at_xdmac.c:922:51: warning: format '%x' expects argument of type 'unsigned int', but argument 5 has type 'dma_addr_t {aka long long unsigned int}' [-Wformat=]This changes the format strings to use the special "%pad" format
string that prints a dma_addr_t, and changes the arguments so we
pass the address by reference as required.Signed-off-by: Arnd Bergmann
Signed-off-by: Vinod Koul -
The sdma_probe function will call sdma_event_remap, but sdma_event_remap
marked with the __init annotation which make the kbuild complains as the
following log:WARNING: drivers/dma/built-in.o(.text+0x56fc): Section mismatch in reference
from the function sdma_probe() to the function .init.text:sdma_event_remap()
The function sdma_probe() references
the function __init sdma_event_remap().
This is often because sdma_probe lacks a __init
annotation or the annotation of sdma_event_remap is wrong.Remove the __init annotation on sdma_event_remap to kill this build warning
Signed-off-by: Jason Liu
Acked-by: Arnd Bergmann
Signed-off-by: Vinod Koul -
The current code uses bits 0-2 instead of 4-6 as the comment says.
Fixes: 633e42b8c546 ('dmaengine: edma: Get qDMA channel information from HW also')
Signed-off-by: Dan Carpenter
Acked-by: Peter Ujfalusi
Signed-off-by: Vinod Koul -
During the edma rework, a build error was introduced for the
case that CONFIG_OF is disabled:drivers/built-in.o: In function `edma_tc_set_pm_state':
:(.text+0x43bf0): undefined reference to `of_find_device_by_node'As the edma_tc_set_pm_state() function does nothing in case
we are running without OF, this adds an IS_ENABLED() check
that turns the function into an empty stub then and avoids the
link error.Signed-off-by: Arnd Bergmann
Fixes: ca304fa9bb76 ("ARM/dmaengine: edma: Public API to use private struct pointer")
Acked-by: Peter Ujfalusi
Signed-off-by: Vinod Koul -
If the call to pm_runtime_get_sync() failed, Runtime PM was left
enabled.Signed-off-by: Geert Uytterhoeven
Signed-off-by: Vinod Koul -
If CONFIG_PREEMPT=y:
Unable to handle kernel NULL pointer dereference at virtual address 00000014
pgd = c0003000
[00000014] *pgd=80000040004003, *pmd=00000000
Internal error: Oops: 206 [#1] PREEMPT SMP ARM
Modules linked in:
CPU: 0 PID: 17 Comm: kworker/0:1 Tainted: G W 4.3.0-rc3-koelsch-022
71-g705498fc5e6a5da8-dirty #1789
Hardware name: Generic R8A7791 (Flattened Device Tree)
Workqueue: pm pm_runtime_work
task: ef578e40 ti: ef57a000 task.ti: ef57a000
PC is at usb_dmac_chan_halt+0xc/0xc0
LR is at usb_dmac_runtime_suspend+0x28/0x38
pc : [] lr : [] psr: 80000113
sp : ef57bdf8 ip : 00000008 fp : 00000003
r10: 00000008 r9 : c06ab928 r8 : ef49e810
r7 : 00000000 r6 : 000000ac r5 : ef770010 r4 : 00000000
r3 : 00000000 r2 : 8ffc2b84 r1 : 00000000 r0 : ef770010
Flags: Nzcv IRQs on FIQs on Mode SVC_32 ISA ARM Segment kernel
Control: 30c5307d Table: 40003000 DAC: fffffffd
Process kworker/0:1 (pid: 17, stack limit = 0xef57a210)
Stack: (0xef57bdf8 to 0xef57c000)[...
[] (usb_dmac_chan_halt) from [] (usb_dmac_runtime_suspend+0x28/0x38)
[] (usb_dmac_runtime_suspend) from [] (pm_genpd_runtime_suspend+0x74/0x23c)This happens because usb_dmac_probe() calls pm_runtime_put() before
usb_dmac_chan_probe(), leading to the device being suspended before the
DMA channels are initialized, causing a NULL pointer dereference.Move the call to pm_runtime_put() to the end of usb_dmac_probe() to fix
this.Add a check to usb_dmac_runtime_suspend() to prevent the crash from
happening in the error path.Reported-by: Sergei Shtylyov
Signed-off-by: Geert Uytterhoeven
Tested-by: Yoshihiro Shimoda
Signed-off-by: Vinod Koul
11 Nov, 2015
1 commit
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Pull dmaengine updates from Vinod Koul:
"This time we have a very typical update which is mostly fixes and
updates to drivers and no new drivers.- the biggest change is coming from Peter for edma cleanup which even
caused some last minute regression, things seem settled now
- idma64 and dw updates
- iotdma updates
- module autoload fixes for various drivers
- scatter gather support for hdmac"* tag 'dmaengine-4.4-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (77 commits)
dmaengine: edma: Add dummy driver skeleton for edma3-tptc
Revert "ARM: DTS: am33xx: Use the new DT bindings for the eDMA3"
Revert "ARM: DTS: am437x: Use the new DT bindings for the eDMA3"
dmaengine: dw: some Intel devices has no memcpy support
dmaengine: dw: platform: provide platform data for Intel
dmaengine: dw: don't override platform data with autocfg
dmaengine: hdmac: Add scatter-gathered memset support
dmaengine: hdmac: factorise memset descriptor allocation
dmaengine: virt-dma: Fix kernel-doc annotations
ARM: DTS: am437x: Use the new DT bindings for the eDMA3
ARM: DTS: am33xx: Use the new DT bindings for the eDMA3
dmaengine: edma: New device tree binding
dmaengine: Kconfig: edma: Select TI_DMA_CROSSBAR in case of ARCH_OMAP
dmaengine: ti-dma-crossbar: Add support for crossbar on AM33xx/AM43xx
dmaengine: edma: Merge the of parsing functions
dmaengine: edma: Do not allocate memory for edma_rsv_info in case of DT boot
dmaengine: edma: Refactor the dma device and channel struct initialization
dmaengine: edma: Get qDMA channel information from HW also
dmaengine: edma: Merge map_dmach_to_queue into assign_channel_eventq
dmaengine: edma: Correct PaRAM access function names (_parm_ to _param_)
...
05 Nov, 2015
3 commits
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Pull char/misc driver updates from Greg KH:
"Here is the big char/misc driver update for 4.4-rc1. Lots of
different driver and subsystem updates, hwtracing being the largest
with the addition of some new platforms that are now supported. Full
details in the shortlog.All of these have been in linux-next for a long time with no reported
issues"* tag 'char-misc-4.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (181 commits)
fpga: socfpga: Fix check of return value of devm_request_irq
lkdtm: fix ACCESS_USERSPACE test
mcb: Destroy IDA on module unload
mcb: Do not return zero on error path in mcb_pci_probe()
mei: bus: set the device name before running fixup
mei: bus: use correct lock ordering
mei: Fix debugfs filename in error output
char: ipmi: ipmi_ssif: Replace timeval with timespec64
fpga: zynq-fpga: Fix issue with drvdata being overwritten.
fpga manager: remove unnecessary null pointer checks
fpga manager: ensure lifetime with of_fpga_mgr_get
fpga: zynq-fpga: Change fw format to handle bin instead of bit.
fpga: zynq-fpga: Fix unbalanced clock handling
misc: sram: partition base address belongs to __iomem space
coresight: etm3x: adding documentation for sysFS's cpu interface
vme: 8-bit status/id takes 256 values, not 255
fpga manager: Adding FPGA Manager support for Xilinx Zynq 7000
ARM: zynq: dt: Updated devicetree for Zynq 7000 platform.
ARM: dt: fpga: Added binding docs for Xilinx Zynq FPGA manager.
ver_linux: proc/modules, limit text processing to 'sed'
... -
Pull tty/serial driver updates from Greg KH:
"Here is the big tty and serial driver update for 4.4-rc1.Lots of serial driver updates and a few small tty core changes. Full
details in the shortlog.All of these have been in linux-next for a while"
* tag 'tty-4.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: (148 commits)
tty: Use unbound workqueue for all input workers
tty: Abstract tty buffer work
tty: Prevent tty teardown during tty_write_message()
tty: core: Use correct spinlock flavor in tiocspgrp()
tty: Combine SIGTTOU/SIGTTIN handling
serial: amba-pl011: fix incorrect integer size in pl011_fifo_to_tty()
ttyFDC: Fix build problems due to use of module_{init,exit}
tty: remove unneeded return statement
serial: 8250_mid: add support for DMA engine handling from UART MMIO
dmaengine: hsu: remove platform data
dmaengine: hsu: introduce stubs for the exported functions
dmaengine: hsu: make the UART driver in control of selecting this driver
serial: fix mctrl helper functions
serial: 8250_pci: Intel MID UART support to its own driver
serial: fsl_lpuart: add earlycon support
tty: disable unbind for old 74xx based serial/mpsc console port
serial: pl011: Spelling s/clocks-names/clock-names/
n_tty: Remove reader wakeups for TTY_BREAK/TTY_PARITY chars
tty: synclink, fix indentation
serial: at91, fix rs485 properties
... -
The eDMA3 TPTC does not need any software configuration, but it is a
separate IP block in the SoC. In order the omap hwmod core to be able to
handle the TPTC resources correctly in regards of PM we need to have a
driver loaded for it.
This patch will add a dummy driver skeleton without probe or remove
callbacks provided.Signed-off-by: Peter Ujfalusi
Reported-by: Olof Johansson
Tested-by: Felipe Balbi
Signed-off-by: Vinod Koul
31 Oct, 2015
7 commits
-
Signed-off-by: Vinod Koul
Conflicts:
drivers/dma/edma.c -
Provide a flag to choose if the device does support memory-to-memory transfers.
At least this is not true for iDMA32 controller that might be supported in the
future. Besides that Intel BayTrail and Braswell users should not try this
feature due to HW specific behaviour.Signed-off-by: Andy Shevchenko
Acked-by: Viresh Kumar
Signed-off-by: Vinod Koul -
Provide platform data explicitly for Intel SoCs where dw_dmac is enumerated by
ACPI.Signed-off-by: Andy Shevchenko
Acked-by: Viresh Kumar
Signed-off-by: Vinod Koul -
Let probe driver decide either it wants to auto configure the driver or have
explicitly defined properties.Signed-off-by: Andy Shevchenko
Acked-by: Viresh Kumar
Signed-off-by: Vinod Koul
29 Oct, 2015
3 commits
-
Just like memset support, the HDMAC might be used to do a memset over a
discontiguous memory area.In such a case, we'll just build up a chain of memset descriptors over the
contiguous chunks of memory to set, in order to allow such a support.Signed-off-by: Maxime Ripard
Acked-by: Nicolas Ferre
Signed-off-by: Vinod Koul -
The memset and scatter gathered memset are going to use some common logic
to create their descriptors.Move that logic into a function of its own so that we can share it with the
future memset_sg callback.Signed-off-by: Maxime Ripard
Acked-by: Nicolas Ferre
Signed-off-by: Vinod Koul
27 Oct, 2015
13 commits
-
In kernel-doc annotations parameters need to start with a @ for them to be
properly recognized. Add those where missing for virt-dma.Signed-off-by: Lars-Peter Clausen
Signed-off-by: Vinod Koul -
With the old binding and driver architecture we had many issues:
No way to assign eDMA channels to event queues, thus not able to tune the
system by moving specific DMA channels to low/high priority servicing. We
moved the cyclic channels to high priority within the code, but that was
just a workaround to this issue.
Memcopy was fundamentally broken: even if the driver scanned the DT/devices
in the booted system for direct DMA users (which is not effective when the
events are going through a crossbar) and created a map of 'used' channels,
this information was not really usable. Since via dmaengien API the eDMA
driver will be called with _some_ channel number, we would try to request
this channel when any channel is requested for memcpy. By luck we got
channel which is not used by any device most of the time so things worked,
but if a device would have been using the given channel, but not requested
it, the memcpy channel would have been waiting for HW event.
The old code had the am33xx/am43xx DMA event router handling embedded. This
should have been done in a separate driver since it is not part of the
actual eDMA IP.
There were no way to 'lock' PaRAM slots to be used by the DSP for example
when booting with DT.
In DT boot the edma node used more than one hwmod which is not a good
practice and the kernel prints warning because of this.With the new bindings and the changes in the driver we can:
- No regression with Legacy binding and non DT boot
- DMA channels can be assigned to any TC (to set priority)
- PaRAM slots can be reserved for other cores to use
- Dynamic power management for CC and TCs, if only TC0 is used all other TC
can be powered down for exampleSigned-off-by: Peter Ujfalusi
Signed-off-by: Vinod Koul -
Since the crossbar is needed for eDMA when it is used on OMAP like
platforms (am335x/am437x and later DRA7xx), select the crossbar to be built
if ARCH_OMAP is set.Signed-off-by: Peter Ujfalusi
Signed-off-by: Vinod Koul -
The DMA event crossbar on AM33xx/AM43xx is different from the one found in
DRA7x family.
Instead of a single event crossbar it has 64 identical mux attached to each
eDMA event line. When the 0 event mux is selected, the default mapped event
is going to be routed to the corresponding eDMA event line. If different
mux is selected, then the selected event is going to be routed to the given
eDMA event.Signed-off-by: Peter Ujfalusi
Signed-off-by: Vinod Koul -
Instead of nesting functions just merge them since the resulting function
is still small and readable.Signed-off-by: Peter Ujfalusi
Signed-off-by: Vinod Koul -
The channel/slot reservation is not supported when booted with DT so there
is not need to allocate memory.Signed-off-by: Peter Ujfalusi
Signed-off-by: Vinod Koul -
Move all code under one function to do the dma device and eDMA channel
related setup so they are not scattered around the driver.Signed-off-by: Peter Ujfalusi
Signed-off-by: Vinod Koul -
Query the number of qDMA channels from CCCFG register.
Signed-off-by: Peter Ujfalusi
Signed-off-by: Vinod Koul -
edma_assign_channel_eventq() is a wrapper around edma_map_dmach_to_queue()
We can merge the content of the later so we will have only one function
to be used for mapping channels to given eventqSigned-off-by: Peter Ujfalusi
Signed-off-by: Vinod Koul -
These inline functions are designed to modify parts of the PaRAM in eDMA.
Change the names accordingly.Signed-off-by: Peter Ujfalusi
Signed-off-by: Vinod Koul -
Instead of passing a pointer to struct edma_cc and the channel number,
pass only the pointer to the edma_chan structure for the given channel.
This struct contains all the information needed by the functions and the
use of this makes it obvious that most of the sanity checks can be removed
from the driver.Signed-off-by: Peter Ujfalusi
Signed-off-by: Vinod Koul -
If the transfer is shorted then 64K we can complete it with one ACNT burst
by configuring ACNT to the length of the copy, this require one paRAM slot.
Otherwise we use two paRAM slots for the copy:
slot1: will copy (length / 32767) number of 32767 byte long blocks
slot2: will be configured to copy the remaining data.According to tests this patch increases the throughput of memcpy from
~3MB/s to 15MB/sSigned-off-by: Peter Ujfalusi
Signed-off-by: Vinod Koul -
Despite the claim by the original commit adding the memcpy
support, eDMA does not have constraint on the alignment of src, dst
or length in increment mode.Signed-off-by: Peter Ujfalusi
Signed-off-by: Vinod Koul
26 Oct, 2015
1 commit
-
* device-properties:
ACPI / property: Fix subnode lookup scope for data-only subnodes
acpi-dma: Add support for "dma-names" device property
device property: Add fwnode_property_match_string()
ACPI / property: Extend device_get_next_child_node() to data-only nodes
ACPI / gpio: Split acpi_get_gpiod_by_index()
ACPI / property: Extend fwnode_property_* to data-only subnodes
ACPI / property: Expose data-only subnodes via sysfs
ACPI / property: Add support for data-only subnodes
ACPI / property: Add routine for extraction of _DSD properties
25 Oct, 2015
1 commit
-
s/regsiter/register/
Signed-off-by: Geliang Tang
Acked-by: Linus Walleij
Signed-off-by: Vinod Koul
18 Oct, 2015
2 commits
-
There are no platforms where it's not possible to calculate
the number of channels based on IO space length, and since
that is the only purpose for struct hsu_dma_platform_data,
removing it.Suggested-by: Andy Shevchenko
Signed-off-by: Heikki Krogerus
Acked-by: Vinod Koul
Acked-by: Andy Shevchenko
Signed-off-by: Greg Kroah-Hartman -
HSU (High Speed UART) DMA engine, like the name suggests, is
an integrated DMA engine for UART and UART alone. Therefore,
making the UART drivers responsible of selecting it and
removing the user selectable option for it. The UARTs with
this DMA engine can always select HSU_DMA when
SERIAL_8250_DMA option is enabled.Suggested-by: Andy Shevchenko
Signed-off-by: Heikki Krogerus
Acked-by: Vinod Koul
Acked-by: Andy Shevchenko
Signed-off-by: Greg Kroah-Hartman
14 Oct, 2015
2 commits
-
The DMA engine supports memory copy, RAID5 XOR, RAID6 PQ, and other
computations. But the bandwidth of the entire DMA engine is shared
among all channels. This patch re-configures operations availability
such that one can achieve maximum performance for XOR and PQ
computation by removing the memory offload operations.Signed-off-by: Rameshwar Prasad Sahu
Signed-off-by: Vinod Koul -
If the eDMA3 has support for channel paRAM slot mapping we can utilize it
to allocate slots on demand and save precious slots for real transfers.
On am335x the eDMA has 64 channels which means we can unlock 64 paRAM
slots out from the available 256.Signed-off-by: Peter Ujfalusi
Signed-off-by: Vinod Koul
