22 Apr, 2018

1 commit


24 May, 2017

1 commit


25 Jan, 2017

1 commit


30 Nov, 2016

2 commits

  • Several versions of DW DMAC have multi block transfers hardware
    support. Hardware support of multi block transfers is disabled
    by default if we use DT to configure DMAC and software emulation
    of multi block transfers used instead.
    Add multi-block property, so it is possible to enable hardware
    multi block transfers (if present) via DT.

    Switch from per device is_nollp variable to multi_block array
    to be able enable/disable multi block transfers separately per
    channel.

    Acked-by: Andy Shevchenko
    Signed-off-by: Eugeniy Paltsev
    Signed-off-by: Vinod Koul

    Eugeniy Paltsev
     
  • All known devices, which use DT for configuration, support
    memory-to-memory transfers. So enable it by default, if we read
    configuration from DT.

    Acked-by: Andy Shevchenko
    Signed-off-by: Eugeniy Paltsev
    Signed-off-by: Vinod Koul

    Eugeniy Paltsev
     

02 May, 2016

4 commits


14 Apr, 2016

1 commit

  • The source and destination masters are reflecting buses or their layers to
    where the different devices can be connected. The patch changes the master
    names to reflect which one is related to which independently on the transfer
    direction.

    The outcome of the change is that the memory data width is now always limited
    by a data width of the master which is dedicated to communicate to memory.

    The patch will not break anything since all current users have the same data
    width for all masters. Though it would be nice to revisit avr32 platforms to
    check what is the actual hardware topology in use there. It seems that it has
    one bus and two masters on it as stated by Table 8-2, that's why everything
    works independently on the master in use. The purpose of the sequential patch
    is to fix the driver for configuration of more than one bus.

    The change is done in the assumption that src_master and dst_master are
    reflecting a connection to the memory and peripheral correspondently on avr32
    and otherwise on the rest.

    Acked-by: Hans-Christian Egtvedt
    Acked-by: Mark Brown
    Signed-off-by: Andy Shevchenko
    Signed-off-by: Vinod Koul

    Andy Shevchenko
     

14 Jan, 2016

1 commit

  • Pull dmaengine updates from Vinod Koul:
    "This round we have few new features, new driver and updates to few
    drivers.

    The new features to dmaengine core are:
    - Synchronized transfer termination API to terminate the dmaengine
    transfers in synchronized and async fashion as required by users.
    We have its user now in ALSA dmaengine lib, img, at_xdma, axi_dmac
    drivers.
    - Universal API for channel request and start consolidation of
    request flows. It's user is ompa-dma driver.
    - Introduce reuse of descriptors and use in pxa_dma driver

    Add/Remove:
    - New STM32 DMA driver
    - Removal of unused R-Car HPB-DMAC driver

    Updates:
    - ti-dma-crossbar updates for supporting eDMA
    - tegra-apb pm updates
    - idma64
    - mv_xor updates
    - ste_dma updates"

    * tag 'dmaengine-4.5-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (54 commits)
    dmaengine: mv_xor: add suspend/resume support
    dmaengine: mv_xor: de-duplicate mv_chan_set_mode*()
    dmaengine: mv_xor: remove mv_xor_chan->current_type field
    dmaengine: omap-dma: Add support for DMA filter mapping to slave devices
    dmaengine: edma: Add support for DMA filter mapping to slave devices
    dmaengine: core: Introduce new, universal API to request a channel
    dmaengine: core: Move and merge the code paths using private_candidate
    dmaengine: core: Skip mask matching when it is not provided to private_candidate
    dmaengine: mdc: Correct terminate_all handling
    dmaengine: edma: Add probe callback to edma_tptc_driver
    dmaengine: dw: fix potential memory leak in dw_dma_parse_dt()
    dmaengine: stm32-dma: Fix unchecked deference of chan->desc
    dmaengine: sh: Remove unused R-Car HPB-DMAC driver
    dmaengine: usb-dmac: Document SoC specific compatibility strings
    ste_dma40: Delete an unnecessary variable initialisation in d40_probe()
    ste_dma40: Delete another unnecessary check in d40_probe()
    ste_dma40: Delete an unnecessary check before the function call "kmem_cache_destroy"
    dmaengine: tegra-apb: Free interrupts before killing tasklets
    dmaengine: tegra-apb: Update driver to use GFP_NOWAIT
    dmaengine: tegra-apb: Only save channel state for those in use
    ...

    Linus Torvalds
     

07 Jan, 2016

2 commits

  • Since we have a work around to prevent a system hangup we don't need to provide
    a platform data explicitly anymore.

    This reverts commit 175267b389f781748e2bbb6c737e76b5c9bc4c88.

    Signed-off-by: Andy Shevchenko
    Acked-by: Vinod Koul
    Signed-off-by: Rafael J. Wysocki

    Andy Shevchenko
     
  • We have to call dw_dma_disable() to stop any ongoing transfer. On some
    platforms we can't do that since DMA device is powered off. Moreover we have no
    possibility at that point to check if the platform is affected or not. That's
    why we call pm_runtime_get_sync() / pm_runtime_put() unconditionally. On the
    other hand we can't use pm_runtime_suspended() because runtime PM framework is
    not fully used by the driver.

    Signed-off-by: Andy Shevchenko
    Acked-by: Vinod Koul
    Signed-off-by: Rafael J. Wysocki

    Andy Shevchenko
     

18 Dec, 2015

1 commit

  • If the "dma-channels" DT property is missing, the dw_dma_parse_dt()
    function return NULL, but not before allocating memory for a struct
    dw_dma_platform_data through devres. If the device supports parameter
    detection, the probe still succeeds and the allocated memory is not
    released until the device is removed.

    Fix this by deferring the allocation until after checking the
    "dma-channels" property.

    Signed-off-by: Mans Rullgard
    Acked-by: Viresh Kumar
    Signed-off-by: Vinod Koul

    Mans Rullgard
     

31 Oct, 2015

1 commit


17 Mar, 2015

1 commit

  • The commit 9cade1a46c77 (dma: dw: split driver to library part and platform
    code) introduced a separate platform driver but missed to add a
    MODULE_ALIAS("platform:dw_dmac"); to that module.

    The patch adds this to get driver loaded automatically if platform device is
    registered.

    Reported-by: "Blin, Jerome"
    Fixes: 9cade1a46c77 (dma: dw: split driver to library part and platform code)
    Signed-off-by: Andy Shevchenko
    Signed-off-by: Vinod Koul

    Andy Shevchenko
     

19 Feb, 2015

1 commit

  • Pull dmaengine updates from Vinod Koul:
    "This update brings:

    - the big cleanup up by Maxime for device control and slave
    capabilities. This makes the API much cleaner.

    - new IMG MDC driver by Andrew

    - new Renesas R-Car Gen2 DMA Controller driver by Laurent along with
    bunch of fixes on rcar drivers

    - odd fixes and updates spread over driver"

    * 'for-linus' of git://git.infradead.org/users/vkoul/slave-dma: (130 commits)
    dmaengine: pl330: add DMA_PAUSE feature
    dmaengine: pl330: improve pl330_tx_status() function
    dmaengine: rcar-dmac: Disable channel 0 when using IOMMU
    dmaengine: rcar-dmac: Work around descriptor mode IOMMU errata
    dmaengine: rcar-dmac: Allocate hardware descriptors with DMAC device
    dmaengine: rcar-dmac: Fix oops due to unintialized list in error ISR
    dmaengine: rcar-dmac: Fix spinlock issues in interrupt
    dmaenegine: edma: fix sparse warnings
    dmaengine: rcar-dmac: Fix uninitialized variable usage
    dmaengine: shdmac: extend PM methods
    dmaengine: shdmac: use SET_RUNTIME_PM_OPS()
    dmaengine: pl330: fix bug that cause start the same descs in cyclic
    dmaengine: at_xdmac: allow muliple dwidths when doing slave transfers
    dmaengine: at_xdmac: simplify channel configuration stuff
    dmaengine: at_xdmac: introduce save_cc field
    dmaengine: at_xdmac: wait for in-progress transaction to complete after pausing a channel
    ioat: fail self-test if wait_for_completion times out
    dmaengine: dw: define DW_DMA_MAX_NR_MASTERS
    dmaengine: dw: amend description of dma_dev field
    dmatest: move src_off, dst_off, len inside loop
    ...

    Linus Torvalds
     

05 Feb, 2015

1 commit


14 Jan, 2015

1 commit

  • In case of PCI driver we will get a warning:
    dw_dmac_pci 0000:00:18.0: Unbalanced pm_runtime_enable!
    dw_dmac_pci 0000:00:18.0: DesignWare DMA Controller, 8 channels

    This happens due to pm_runtime_enable() call from the driver when PM runtime is
    enabled by core.

    This patch moves that call to the platform driver where it might make sense.

    Fixes: bb32baf76e56 (dmaengine: dw: enable runtime PM)
    Signed-off-by: Andy Shevchenko
    Signed-off-by: Vinod Koul

    Andy Shevchenko
     

15 Oct, 2014

1 commit


11 Sep, 2014

3 commits

  • On BayTrail platform DMA is not functional in the PCI mode, whereby it always
    failed and exit at the point when it tries to get a clock. It causes the PCI
    mode probe to exit with the error message:
    dw_dmac_pci: probe of 0000:00:1e.0 failed with error -2

    This patch moves clock operations to where it belongs to. Thus, the clock is
    provided only in ACPI / non-PCI cases.

    Reported-by: Chew, Chiau Ee
    Signed-off-by: Andy Shevchenko
    Signed-off-by: Vinod Koul

    Andy Shevchenko
     
  • The introduced filter function would be reused in the ACPI and DT cases since
    in those cases we have to apply mandatory data to the requested channel. Thus,
    patch moves platform driver to use it in that case.

    The function unlikely can't be used by users of the driver due to an implicit
    dependency to the dw_dmac_core module.

    Signed-off-by: Andy Shevchenko
    Signed-off-by: Vinod Koul

    Andy Shevchenko
     
  • Instead of one request line member let's use both source and destination ones.
    Usually we have no such hardware except Atmel MMC controller found on AVR32
    platform (see arch/avr32/mach-at32ap/at32ap700x.c and
    drivers/mmc/host/atmel-mci.c).

    This patch removes slave_id usage since it'll be removed from the generic
    structure in later. This breaks the non-ACPI / non-DT cases for the users of
    the driver, i.e. SPI and HSUART. However, these cases mean only PCI enumerated
    devices for now, which is anyway broken (considering more than one DMA
    controller in the system) and this patch series is intended to fix that
    eventually.

    The ACPI and DT cases shall be aware of the channel direction when setting
    request lines, but this is a minor problem that would be addressed in future.

    Suggested-by: Arnd Bergmann
    Signed-off-by: Andy Shevchenko
    Signed-off-by: Vinod Koul

    Andy Shevchenko
     

07 May, 2014

1 commit


31 Oct, 2013

1 commit


05 Aug, 2013

1 commit

  • In rare cases (mostly for the testing purposes) the dw_dmac driver might be
    compiled as a module as well as the other LPSS device drivers (I2C, SPI,
    HSUART). When udev handles the event of the devices appearing the dw_dmac
    module is missing. This patch will fix that.

    Signed-off-by: Andy Shevchenko
    Acked-by: Viresh Kumar
    Signed-off-by: Vinod Koul

    Andy Shevchenko
     

05 Jul, 2013

1 commit