04 Nov, 2015

2 commits

  • This seems to be a mis-reading of how alpha memory ordering works, and
    is not backed up by the alpha architecture manual. The helper functions
    don't do anything special on any other architectures, and the arguments
    that support them being safe on other architectures also argue that they
    are safe on alpha.

    Basically, the "control dependency" is between a previous read and a
    subsequent write that is dependent on the value read. Even if the
    subsequent write is actually done speculatively, there is no way that
    such a speculative write could be made visible to other cpu's until it
    has been committed, which requires validating the speculation.

    Note that most weakely ordered architectures (very much including alpha)
    do not guarantee any ordering relationship between two loads that depend
    on each other on a control dependency:

    read A
    if (val == 1)
    read B

    because the conditional may be predicted, and the "read B" may be
    speculatively moved up to before reading the value A. So we require the
    user to insert a smp_rmb() between the two accesses to be correct:

    read A;
    if (A == 1)
    smp_rmb()
    read B

    Alpha is further special in that it can break that ordering even if the
    *address* of B depends on the read of A, because the cacheline that is
    read later may be stale unless you have a memory barrier in between the
    pointer read and the read of the value behind a pointer:

    read ptr
    read offset(ptr)

    whereas all other weakly ordered architectures guarantee that the data
    dependency (as opposed to just a control dependency) will order the two
    accesses. As a result, alpha needs a "smp_read_barrier_depends()" in
    between those two reads for them to be ordered.

    The coontrol dependency that "READ_ONCE_CTRL()" and "atomic_read_ctrl()"
    had was a control dependency to a subsequent *write*, however, and
    nobody can finalize such a subsequent write without having actually done
    the read. And were you to write such a value to a "stale" cacheline
    (the way the unordered reads came to be), that would seem to lose the
    write entirely.

    So the things that make alpha able to re-order reads even more
    aggressively than other weak architectures do not seem to be relevant
    for a subsequent write. Alpha memory ordering may be strange, but
    there's no real indication that it is *that* strange.

    Also, the alpha architecture reference manual very explicitly talks
    about the definition of "Dependence Constraints" in section 5.6.1.7,
    where a preceding read dominates a subsequent write.

    Such a dependence constraint admittedly does not impose a BEFORE (alpha
    architecture term for globally visible ordering), but it does guarantee
    that there can be no "causal loop". I don't see how you could avoid
    such a loop if another cpu could see the stored value and then impact
    the value of the first read. Put another way: the read and the write
    could not be seen as being out of order wrt other cpus.

    So I do not see how these "x_ctrl()" functions can currently be necessary.

    I may have to eat my words at some point, but in the absense of clear
    proof that alpha actually needs this, or indeed even an explanation of
    how alpha could _possibly_ need it, I do not believe these functions are
    called for.

    And if it turns out that alpha really _does_ need a barrier for this
    case, that barrier still should not be "smp_read_barrier_depends()".
    We'd have to make up some new speciality barrier just for alpha, along
    with the documentation for why it really is necessary.

    Cc: Peter Zijlstra
    Cc: Paul E McKenney
    Cc: Dmitry Vyukov
    Cc: Will Deacon
    Cc: Ingo Molnar
    Signed-off-by: Linus Torvalds

    Linus Torvalds
     
  • Pull locking changes from Ingo Molnar:
    "The main changes in this cycle were:

    - More gradual enhancements to atomic ops: new atomic*_read_ctrl()
    ops, synchronize atomic_{read,set}() ordering requirements between
    architectures, add atomic_long_t bitops. (Peter Zijlstra)

    - Add _{relaxed|acquire|release}() variants for inc/dec atomics and
    use them in various locking primitives: mutex, rtmutex, mcs, rwsem.
    This enables weakly ordered architectures (such as arm64) to make
    use of more locking related optimizations. (Davidlohr Bueso)

    - Implement atomic[64]_{inc,dec}_relaxed() on ARM. (Will Deacon)

    - Futex kernel data cache footprint micro-optimization. (Rasmus
    Villemoes)

    - pvqspinlock runtime overhead micro-optimization. (Waiman Long)

    - misc smaller fixlets"

    * 'locking-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
    ARM, locking/atomics: Implement _relaxed variants of atomic[64]_{inc,dec}
    locking/rwsem: Use acquire/release semantics
    locking/mcs: Use acquire/release semantics
    locking/rtmutex: Use acquire/release semantics
    locking/mutex: Use acquire/release semantics
    locking/asm-generic: Add _{relaxed|acquire|release}() variants for inc/dec atomics
    atomic: Implement atomic_read_ctrl()
    atomic, arch: Audit atomic_{read,set}()
    atomic: Add atomic_long_t bitops
    futex: Force hot variables into a single cache line
    locking/pvqspinlock: Kick the PV CPU unconditionally when _Q_SLOW_VAL
    locking/osq: Relax atomic semantics
    locking/qrwlock: Rename ->lock to ->wait_lock
    locking/Documentation/lockstat: Fix typo - lokcing -> locking
    locking/atomics, cmpxchg: Privatize the inclusion of asm/cmpxchg.h

    Linus Torvalds
     

07 Oct, 2015

2 commits

  • The recently added lockless_dereference() macro is not present in the
    Documentation/ directory, so this commit fixes that.

    Reported-by: Dmitry Vyukov
    Signed-off-by: Paul E. McKenney
    Reviewed-by: Josh Triplett

    Paul E. McKenney
     
  • Documentation/memory-barriers.txt calls out RCU as one of the sets
    of primitives associated with ACQUIRE and RELEASE. There really
    is an association in that rcu_assign_pointer() includes a RELEASE
    operation, but a quick read can convince people that rcu_read_lock() and
    rcu_read_unlock() have ACQUIRE and RELEASE semantics, which they do not.

    This commit therefore removes RCU from this list in order to avoid
    this confusion.

    Reported-by: Boqun Feng
    Signed-off-by: Paul E. McKenney
    Reviewed-by: Josh Triplett

    Paul E. McKenney
     

23 Sep, 2015

1 commit

  • Provide atomic_read_ctrl() to mirror READ_ONCE_CTRL(), such that we can
    more conveniently use atomics in control dependencies.

    Since we can assume atomic_read() implies a READ_ONCE(), we must only
    emit an extra smp_read_barrier_depends() in order to upgrade to
    READ_ONCE_CTRL() semantics.

    Requested-by: Dmitry Vyukov
    Signed-off-by: Peter Zijlstra (Intel)
    Acked-by: Will Deacon
    Cc: Andrew Morton
    Cc: Linus Torvalds
    Cc: Paul E. McKenney
    Cc: Peter Zijlstra
    Cc: Thomas Gleixner
    Cc: linux-kernel@vger.kernel.org
    Cc: oleg@redhat.com
    Link: http://lkml.kernel.org/r/20150918115637.GM3604@twins.programming.kicks-ass.net
    Signed-off-by: Ingo Molnar

    Peter Zijlstra
     

04 Sep, 2015

1 commit

  • Pull locking and atomic updates from Ingo Molnar:
    "Main changes in this cycle are:

    - Extend atomic primitives with coherent logic op primitives
    (atomic_{or,and,xor}()) and deprecate the old partial APIs
    (atomic_{set,clear}_mask())

    The old ops were incoherent with incompatible signatures across
    architectures and with incomplete support. Now every architecture
    supports the primitives consistently (by Peter Zijlstra)

    - Generic support for 'relaxed atomics':

    - _acquire/release/relaxed() flavours of xchg(), cmpxchg() and {add,sub}_return()
    - atomic_read_acquire()
    - atomic_set_release()

    This came out of porting qwrlock code to arm64 (by Will Deacon)

    - Clean up the fragile static_key APIs that were causing repeat bugs,
    by introducing a new one:

    DEFINE_STATIC_KEY_TRUE(name);
    DEFINE_STATIC_KEY_FALSE(name);

    which define a key of different types with an initial true/false
    value.

    Then allow:

    static_branch_likely()
    static_branch_unlikely()

    to take a key of either type and emit the right instruction for the
    case. To be able to know the 'type' of the static key we encode it
    in the jump entry (by Peter Zijlstra)

    - Static key self-tests (by Jason Baron)

    - qrwlock optimizations (by Waiman Long)

    - small futex enhancements (by Davidlohr Bueso)

    - ... and misc other changes"

    * 'locking-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (63 commits)
    jump_label/x86: Work around asm build bug on older/backported GCCs
    locking, ARM, atomics: Define our SMP atomics in terms of _relaxed() operations
    locking, include/llist: Use linux/atomic.h instead of asm/cmpxchg.h
    locking/qrwlock: Make use of _{acquire|release|relaxed}() atomics
    locking/qrwlock: Implement queue_write_unlock() using smp_store_release()
    locking/lockref: Remove homebrew cmpxchg64_relaxed() macro definition
    locking, asm-generic: Add _{relaxed|acquire|release}() variants for 'atomic_long_t'
    locking, asm-generic: Rework atomic-long.h to avoid bulk code duplication
    locking/atomics: Add _{acquire|release|relaxed}() variants of some atomic operations
    locking, compiler.h: Cast away attributes in the WRITE_ONCE() magic
    locking/static_keys: Make verify_keys() static
    jump label, locking/static_keys: Update docs
    locking/static_keys: Provide a selftest
    jump_label: Provide a self-test
    s390/uaccess, locking/static_keys: employ static_branch_likely()
    x86, tsc, locking/static_keys: Employ static_branch_likely()
    locking/static_keys: Add selftest
    locking/static_keys: Add a new static_key interface
    locking/static_keys: Rework update logic
    locking/static_keys: Add static_key_{en,dis}able() helpers
    ...

    Linus Torvalds
     

04 Aug, 2015

1 commit


03 Aug, 2015

1 commit

  • A failed cmpxchg does not provide any memory ordering guarantees, a
    property that is used to optimise the cmpxchg implementations on Alpha,
    PowerPC and arm64.

    This patch updates atomic_ops.txt and memory-barriers.txt to reflect
    this.

    Signed-off-by: Will Deacon
    Signed-off-by: Peter Zijlstra (Intel)
    Cc: Andrew Morton
    Cc: Davidlohr Bueso
    Cc: Douglas Hatch
    Cc: H. Peter Anvin
    Cc: Jonathan Corbet
    Cc: Linus Torvalds
    Cc: Paul E. McKenney
    Cc: Peter Zijlstra
    Cc: Scott J Norton
    Cc: Thomas Gleixner
    Cc: Waiman Long
    Link: http://lkml.kernel.org/r/20150716151006.GH26390@arm.com
    Signed-off-by: Ingo Molnar

    Will Deacon
     

16 Jul, 2015

3 commits


23 Jun, 2015

1 commit

  • Pull locking updates from Ingo Molnar:
    "The main changes are:

    - 'qspinlock' support, enabled on x86: queued spinlocks - these are
    now the spinlock variant used by x86 as they outperform ticket
    spinlocks in every category. (Waiman Long)

    - 'pvqspinlock' support on x86: paravirtualized variant of queued
    spinlocks. (Waiman Long, Peter Zijlstra)

    - 'qrwlock' support, enabled on x86: queued rwlocks. Similar to
    queued spinlocks, they are now the variant used by x86:

    CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y
    CONFIG_QUEUED_SPINLOCKS=y
    CONFIG_ARCH_USE_QUEUED_RWLOCKS=y
    CONFIG_QUEUED_RWLOCKS=y

    - various lockdep fixlets

    - various locking primitives cleanups, further WRITE_ONCE()
    propagation"

    * 'locking-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (24 commits)
    locking/lockdep: Remove hard coded array size dependency
    locking/qrwlock: Don't contend with readers when setting _QW_WAITING
    lockdep: Do not break user-visible string
    locking/arch: Rename set_mb() to smp_store_mb()
    locking/arch: Add WRITE_ONCE() to set_mb()
    rtmutex: Warn if trylock is called from hard/softirq context
    arch: Remove __ARCH_HAVE_CMPXCHG
    locking/rtmutex: Drop usage of __HAVE_ARCH_CMPXCHG
    locking/qrwlock: Rename QUEUE_RWLOCK to QUEUED_RWLOCKS
    locking/pvqspinlock: Rename QUEUED_SPINLOCK to QUEUED_SPINLOCKS
    locking/pvqspinlock: Replace xchg() by the more descriptive set_mb()
    locking/pvqspinlock, x86: Enable PV qspinlock for Xen
    locking/pvqspinlock, x86: Enable PV qspinlock for KVM
    locking/pvqspinlock, x86: Implement the paravirt qspinlock call patching
    locking/pvqspinlock: Implement simple paravirt support for the qspinlock
    locking/qspinlock: Revert to test-and-set on hypervisors
    locking/qspinlock: Use a simple write to grab the lock
    locking/qspinlock: Optimize for smaller NR_CPUS
    locking/qspinlock: Extract out code snippets for the next patch
    locking/qspinlock: Add pending bit
    ...

    Linus Torvalds
     

28 May, 2015

3 commits

  • …plug.2015.05.27a', 'init.2015.05.27a', 'tiny.2015.05.27a' and 'torture.2015.05.27a' into HEAD

    array.2015.05.27a: Remove all uses of RCU-protected array indexes.
    doc.2015.05.27a: Docuemntation updates.
    fixes.2015.05.27a: Miscellaneous fixes.
    hotplug.2015.05.27a: CPU-hotplug updates.
    init.2015.05.27a: Initialization/Kconfig updates.
    tiny.2015.05.27a: Updates to Tiny RCU.
    torture.2015.05.27a: Torture-testing updates.

    Paul E. McKenney
     
  • The current formulation of control dependencies fails on DEC Alpha,
    which does not respect dependencies of any kind unless an explicit
    memory barrier is provided. This means that the current fomulation of
    control dependencies fails on Alpha. This commit therefore creates a
    READ_ONCE_CTRL() that has the same overhead on non-Alpha systems, but
    causes Alpha to produce the needed ordering. This commit also applies
    READ_ONCE_CTRL() to the one known use of control dependencies.

    Use of READ_ONCE_CTRL() also has the beneficial effect of adding a bit
    of self-documentation to control dependencies.

    Signed-off-by: Paul E. McKenney
    Acked-by: Peter Zijlstra (Intel)

    Paul E. McKenney
     
  • Our current documentation claims that, when followed by an ACQUIRE,
    smp_mb__before_spinlock() orders prior loads against subsequent loads
    and stores, which isn't the intent. This commit therefore fixes the
    documentation to state that this sequence orders only prior stores
    against subsequent loads and stores.

    In addition, the original intent of smp_mb__before_spinlock() was to only
    order prior loads against subsequent stores, however, people have started
    using it as if it ordered prior loads against subsequent loads and stores.
    This commit therefore also updates smp_mb__before_spinlock()'s header
    comment to reflect this new reality.

    Cc: Oleg Nesterov
    Cc: "Paul E. McKenney"
    Cc: Peter Zijlstra
    Signed-off-by: Will Deacon
    Signed-off-by: Paul E. McKenney

    Will Deacon
     

19 May, 2015

1 commit

  • Since set_mb() is really about an smp_mb() -- not a IO/DMA barrier
    like mb() rename it to match the recent smp_load_acquire() and
    smp_store_release().

    Suggested-by: Linus Torvalds
    Signed-off-by: Peter Zijlstra (Intel)
    Cc: Peter Zijlstra
    Cc: Thomas Gleixner
    Cc: linux-kernel@vger.kernel.org
    Signed-off-by: Ingo Molnar

    Peter Zijlstra
     

18 Apr, 2015

1 commit

  • Pull documentation updates from Jonathan Corbet:
    "Numerous fixes, the overdue removal of the i2o docs, some new Chinese
    translations, and, hopefully, the README fix that will end the flow of
    identical patches to that file"

    * tag 'docs-for-linus' of git://git.lwn.net/linux-2.6: (34 commits)
    Documentation/memcg: update memcg/kmem status
    Documentation: blackfin: Makefile: Typo building issue
    Documentation/vm/pagemap.txt: correct location of page-types tool
    Documentation/memory-barriers.txt: typo fix
    doc: Add guest_nice column to example output of `cat /proc/stat'
    Documentation/kernel-parameters: Move "eagerfpu" to its right place
    Documentation: gpio: Update ACPI part of the document to mention _DSD
    docs/completion.txt: Various tweaks and corrections
    doc: completion: context, scope and language fixes
    Documentation:Update Documentation/zh_CN/arm64/memory.txt
    Documentation:Update Documentation/zh_CN/arm64/booting.txt
    Documentation: Chinese translation of arm64/legacy_instructions.txt
    DocBook media: fix broken EIA hyperlink
    Documentation: tweak the maintainers entry
    README: Change gzip/bzip2 to xz compression format
    README: Update version number reference
    doc:pci: Fix typo in Documentation/PCI
    Documentation: drm: Use '->' when describing access through pointers.
    Documentation: Remove mentioning of block barriers
    Documentation/email-clients.txt: Fix one grammar mistake, add extra info about TB
    ...

    Linus Torvalds
     

09 Apr, 2015

1 commit


27 Feb, 2015

1 commit


08 Jan, 2015

2 commits


12 Dec, 2014

1 commit

  • There are a number of situations where the mandatory barriers rmb() and
    wmb() are used to order memory/memory operations in the device drivers
    and those barriers are much heavier than they actually need to be. For
    example in the case of PowerPC wmb() calls the heavy-weight sync
    instruction when for coherent memory operations all that is really needed
    is an lsync or eieio instruction.

    This commit adds a coherent only version of the mandatory memory barriers
    rmb() and wmb(). In most cases this should result in the barrier being the
    same as the SMP barriers for the SMP case, however in some cases we use a
    barrier that is somewhere in between rmb() and smp_rmb(). For example on
    ARM the rmb barriers break down as follows:

    Barrier Call Explanation
    --------- -------- ----------------------------------
    rmb() dsb() Data synchronization barrier - system
    dma_rmb() dmb(osh) data memory barrier - outer sharable
    smp_rmb() dmb(ish) data memory barrier - inner sharable

    These new barriers are not as safe as the standard rmb() and wmb().
    Specifically they do not guarantee ordering between coherent and incoherent
    memories. The primary use case for these would be to enforce ordering of
    reads and writes when accessing coherent memory that is shared between the
    CPU and a device.

    It may also be noted that there is no dma_mb(). Most architectures don't
    provide a good mechanism for performing a coherent only full barrier without
    resorting to the same mechanism used in mb(). As such there isn't much to
    be gained in trying to define such a function.

    Cc: Frederic Weisbecker
    Cc: Mathieu Desnoyers
    Cc: Michael Ellerman
    Cc: Michael Neuling
    Cc: Russell King
    Cc: Geert Uytterhoeven
    Cc: Heiko Carstens
    Cc: Linus Torvalds
    Cc: Martin Schwidefsky
    Cc: Tony Luck
    Cc: Oleg Nesterov
    Cc: "Paul E. McKenney"
    Cc: Peter Zijlstra
    Cc: Ingo Molnar
    Cc: David Miller
    Acked-by: Benjamin Herrenschmidt
    Acked-by: Will Deacon
    Signed-off-by: Alexander Duyck
    Signed-off-by: David S. Miller

    Alexander Duyck
     

10 Dec, 2014

1 commit

  • Pull RCU updates from Ingo Molnar:
    "These are the main changes in this cycle:

    - Streamline RCU's use of per-CPU variables, shifting from "cpu"
    arguments to functions to "this_"-style per-CPU variable
    accessors.

    - signal-handling RCU updates.

    - real-time updates.

    - torture-test updates.

    - miscellaneous fixes.

    - documentation updates"

    * 'core-rcu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (34 commits)
    rcu: Fix FIXME in rcu_tasks_kthread()
    rcu: More info about potential deadlocks with rcu_read_unlock()
    rcu: Optimize cond_resched_rcu_qs()
    rcu: Add sparse check for RCU_INIT_POINTER()
    documentation: memory-barriers.txt: Correct example for reorderings
    documentation: Add atomic_long_t to atomic_ops.txt
    documentation: Additional restriction for control dependencies
    documentation: Document RCU self test boot params
    rcutorture: Fix rcu_torture_cbflood() memory leak
    rcutorture: Remove obsolete kversion param in kvm.sh
    rcutorture: Remove stale test configurations
    rcutorture: Enable RCU self test in configs
    rcutorture: Add early boot self tests
    torture: Run Linux-kernel binary out of results directory
    cpu: Avoid puts_pending overflow
    rcu: Remove "cpu" argument to rcu_cleanup_after_idle()
    rcu: Remove "cpu" argument to rcu_prepare_for_idle()
    rcu: Remove "cpu" argument to rcu_needs_cpu()
    rcu: Remove "cpu" argument to rcu_note_context_switch()
    rcu: Remove "cpu" argument to rcu_preempt_check_callbacks()
    ...

    Linus Torvalds
     

14 Nov, 2014

2 commits


21 Oct, 2014

1 commit

  • This patch extends the paragraph describing the relaxed read io accessors
    so that the relaxed accessors are defined to be:

    - Ordered with respect to each other if accessing the same peripheral

    - Unordered with respect to normal memory accesses

    - Unordered with respect to LOCK/UNLOCK operations

    Whilst many architectures will provide stricter semantics, ARM, Alpha and
    PPC can achieve significant performance gains by taking advantage of some
    or all of the above relaxations.

    Cc: Randy Dunlap
    Cc: Benjamin Herrenschmidt
    Cc: Paul E. McKenney
    Cc: David Howells
    Signed-off-by: Will Deacon

    Will Deacon
     

08 Sep, 2014

3 commits


08 Jul, 2014

2 commits


07 Jun, 2014

1 commit

  • Examples introducing neccesity of RMB+WMP pair reads as

    A=3 READ B
    www rrrrrr
    B=4 READ A

    Note the opposite order of reads vs writes.

    But the first example without barriers reads as

    A=3 READ A
    B=4 READ B

    There are 4 outcomes in the first example.

    But if someone new to the concept tries to insert barriers like this:

    A=3 READ A
    www rrrrrr
    B=4 READ B

    he will still get all 4 possible outcomes, because "READ A" is first.

    All this can be utterly confusing because barrier pair seems to be
    superfluous. In short, fixup first example to match latter examples
    with barriers.

    Signed-off-by: Alexey Dobriyan
    Cc: David Howells
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Alexey Dobriyan
     

18 Apr, 2014

1 commit

  • Update the documentation to reflect the change of barrier primitives.

    Signed-off-by: Peter Zijlstra
    Reviewed-by: Paul E. McKenney
    Acked-by: David Howells
    Link: http://lkml.kernel.org/n/tip-xslfehiga1twbk5uk94rij1e@git.kernel.org
    Cc: Linus Torvalds
    Cc: Randy Dunlap
    Cc: linux-doc@vger.kernel.org
    Cc: linux-kernel@vger.kernel.org
    Signed-off-by: Ingo Molnar

    Peter Zijlstra
     

03 Apr, 2014

1 commit

  • Pull trivial tree updates from Jiri Kosina:
    "Usual rocket science -- mostly documentation and comment updates"

    * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial:
    sparse: fix comment
    doc: fix double words
    isdn: capi: fix "CAPI_VERSION" comment
    doc: DocBook: Fix typos in xml and template file
    Bluetooth: add module name for btwilink
    driver core: unexport static function create_syslog_header
    mmc: core: typo fix in printk specifier
    ARM: spear: clean up editing mistake
    net-sysfs: fix comment typo 'CONFIG_SYFS'
    doc: Insert MODULE_ in module-signing macros
    Documentation: update URL to hfsplus Technote 1150
    gpio: update path to documentation
    ixgbe: Fix format string in ixgbe_fcoe.
    Kconfig: Remove useless "default N" lines
    user_namespace.c: Remove duplicated word in comment
    CREDITS: fix formatting
    treewide: Fix typo in Documentation/DocBook
    mm: Fix warning on make htmldocs caused by slab.c
    ata: ata-samsung_cf: cleanup in header file
    idr: remove unused prototype of idr_free()

    Linus Torvalds
     

21 Mar, 2014

1 commit


25 Feb, 2014

1 commit


18 Feb, 2014

3 commits


12 Jan, 2014

1 commit

  • The LOCK and UNLOCK barriers as described in our barrier document are
    generally known as ACQUIRE and RELEASE barriers in other literature.

    Since we plan to introduce the acquire and release nomenclature in
    generic kernel primitives we should amend the document to avoid
    confusion as to what an acquire/release means.

    Reviewed-by: "Paul E. McKenney"
    Signed-off-by: Peter Zijlstra
    Acked-by: Mathieu Desnoyers
    Cc: Benjamin Herrenschmidt
    Cc: Frederic Weisbecker
    Cc: Michael Ellerman
    Cc: Michael Neuling
    Cc: Russell King
    Cc: Geert Uytterhoeven
    Cc: Heiko Carstens
    Cc: Linus Torvalds
    Cc: Martin Schwidefsky
    Cc: Victor Kaplansky
    Cc: Tony Luck
    Cc: Oleg Nesterov
    Link: http://lkml.kernel.org/r/20131217092435.GC21999@twins.programming.kicks-ass.net
    Signed-off-by: Ingo Molnar

    Peter Zijlstra