06 Mar, 2021

1 commit

  • After reduce the panel RM67191's pixel clock from 132MHz to
    121MHz by 'commit 4193a9c3254b ("MLK-3056-2 drm/panel: rm67191:
    change clock rate to 121MHz for default mod")', the disp_apb
    clock rate needs to be configured properly to avoid the issue
    described in LF-33886 ticket with currrent disp_apb clock config
    like below:

    sys1_pll_out 5 5 0 800000000 0 0 50000
    sys1_pll_800m 5 5 0 800000000 0 0 50000
    disp_apb 1 1 0 133333334 0 0 50000
    disp_apb_root_clk 2 2 0 133333334 0 0 50000

    And configure disp_apb rate to 25MHz like below can solve this
    issue:

    sys1_pll_out 5 5 0 800000000 0 0 50000
    sys1_pll_800m 5 5 0 800000000 0 0 50000
    disp_apb 1 1 0 25000000 0 0 50000
    disp_apb_root_clk 2 2 0 25000000 0 0 50000

    Signed-off-by: Fancy Fang
    Reviewed-by: Robby Cai
    Acked-by: Jason Liu

    Fancy Fang
     

04 Mar, 2021

4 commits


03 Mar, 2021

1 commit

  • On the remove path, there is a need to teardown the IRQs and disconnect
    from the PHY only if the DPMAC is not in TYPE_FIXED.
    Update the remove path so that we do not end up accesing an invalid MC
    portal.

    Signed-off-by: Ioana Ciornei

    Ioana Ciornei
     

26 Feb, 2021

1 commit


23 Feb, 2021

3 commits

  • In sdhci_esdhc_imx_remove() the SDHCI_INT_STATUS in read. Under some
    circumstances, this may be done while the device is runtime suspended,
    triggering the below splat.

    Fix the problem by adding a pm_runtime_get_sync(), before reading the
    register, which will turn on clocks etc making the device accessible again.

    [ 1811.323148] mmc1: card aaaa removed
    [ 1811.347483] Internal error: synchronous external abort: 96000210 [#1] PREEMPT SMP
    [ 1811.354988] Modules linked in: sdhci_esdhc_imx(-) sdhci_pltfm sdhci cqhci mmc_block mmc_core [last unloaded: mmc_core]
    [ 1811.365726] CPU: 0 PID: 3464 Comm: rmmod Not tainted 5.10.1-sd-99871-g53835a2e8186 #5
    [ 1811.373559] Hardware name: Freescale i.MX8DXL EVK (DT)
    [ 1811.378705] pstate: 60000005 (nZCv daif -PAN -UAO -TCO BTYPE=--)
    [ 1811.384723] pc : sdhci_esdhc_imx_remove+0x28/0x15c [sdhci_esdhc_imx]
    [ 1811.391090] lr : platform_drv_remove+0x2c/0x50
    [ 1811.395536] sp : ffff800012c7bcb0
    [ 1811.398855] x29: ffff800012c7bcb0 x28: ffff00002c72b900
    [ 1811.404181] x27: 0000000000000000 x26: 0000000000000000
    [ 1811.409497] x25: 0000000000000000 x24: 0000000000000000
    [ 1811.414814] x23: ffff0000042b3890 x22: ffff800009127120
    [ 1811.420131] x21: ffff00002c4c9580 x20: ffff0000042d0810
    [ 1811.425456] x19: ffff0000042d0800 x18: 0000000000000020
    [ 1811.430773] x17: 0000000000000000 x16: 0000000000000000
    [ 1811.436089] x15: 0000000000000004 x14: ffff000004019c10
    [ 1811.441406] x13: 0000000000000000 x12: 0000000000000020
    [ 1811.446723] x11: 0101010101010101 x10: 7f7f7f7f7f7f7f7f
    [ 1811.452040] x9 : fefefeff6364626d x8 : 7f7f7f7f7f7f7f7f
    [ 1811.457356] x7 : 78725e6473607372 x6 : 0000000080808080
    [ 1811.462673] x5 : 0000000000000000 x4 : 0000000000000000
    [ 1811.467990] x3 : ffff800011ac1cb0 x2 : 0000000000000000
    [ 1811.473307] x1 : ffff8000091214d4 x0 : ffff8000133a0030
    [ 1811.478624] Call trace:
    [ 1811.481081] sdhci_esdhc_imx_remove+0x28/0x15c [sdhci_esdhc_imx]
    [ 1811.487098] platform_drv_remove+0x2c/0x50
    [ 1811.491198] __device_release_driver+0x188/0x230
    [ 1811.495818] driver_detach+0xc0/0x14c
    [ 1811.499487] bus_remove_driver+0x5c/0xb0
    [ 1811.503413] driver_unregister+0x30/0x60
    [ 1811.507341] platform_driver_unregister+0x14/0x20
    [ 1811.512048] sdhci_esdhc_imx_driver_exit+0x1c/0x3a8 [sdhci_esdhc_imx]
    [ 1811.518495] __arm64_sys_delete_module+0x19c/0x230
    [ 1811.523291] el0_svc_common.constprop.0+0x78/0x1a0
    [ 1811.528086] do_el0_svc+0x24/0x90
    [ 1811.531405] el0_svc+0x14/0x20
    [ 1811.534461] el0_sync_handler+0x1a4/0x1b0
    [ 1811.538474] el0_sync+0x174/0x180
    [ 1811.541801] Code: a9025bf5 f9403e95 f9400ea0 9100c000 (b9400000)
    [ 1811.547902] ---[ end trace 3fb1a3bd48ff7be5 ]---

    Signed-off-by: Frank Li
    Cc: stable@vger.kernel.org # v4.0+
    Link: https://lore.kernel.org/r/20210210181933.29263-1-Frank.Li@nxp.com
    [Ulf: Clarified the commit message a bit]
    Signed-off-by: Ulf Hansson

    Frank Li
     
  • When M4 boots from flexspi, linux should not use that, otherwise
    M4 will hang.

    Reviewed-by: Richard Zhu
    Signed-off-by: Peng Fan
    (cherry picked from commit 1f49d90ebaf77492bcb2e9f8a8e5a8d4d7aee58a)
    Acked-by: Jason Liu

    Peng Fan
     
  • when killing the vlan, the rx_clk from the phy need to be enabled.
    The patch checks the phy's status before killing the vlan. If the phy
    is stopped, enable it, remove the vlan, and then stop the phy.

    Reviewed-by: Frank Li
    Signed-off-by: Shenwei Wang
    Acked-by: Jason Liu

    Shenwei Wang
     

22 Feb, 2021

1 commit


21 Feb, 2021

3 commits


04 Feb, 2021

2 commits


03 Feb, 2021

1 commit


02 Feb, 2021

1 commit

  • Mailbox driver needs to wait and read all the words in response to a
    SCFW API call, else the protocol gets messed up and results in kernel hang.
    When the responses are longer than 3 words its possible that SCFW will
    take some time to fill up the rest of the words in the MU, a timeout of
    100us is arbritrary and too short. While waiting for Linux to consume the
    first 3 words of the response SCFW can be busy doing other stuff and hence
    Linux needs to wait for the rest of the words.
    Similar restriction applies when writing messages that are longer than
    3 words.
    This patch increases the timeout to 5secs while waiting for response
    or writing long messages to SCFW.

    Signed-off-by: Ranjani Vaidyanathan

    Ranjani Vaidyanathan
     

30 Jan, 2021

4 commits

  • Add a new member jpeg_parse_error in mxc_jpeg_src_buf, to indicate
    an error while parsing the input jpeg stream.
    Do not run the decoder when the source buffer is marked with
    jpeg_parse_error, instead mark both the source and destination
    buffer with VB2_BUF_STATE_ERROR. This will prevent an application
    getting stuck waiting to dequeue the destination buffer.

    Signed-off-by: Mirela Rabulea

    Mirela Rabulea
     
  • End of buffer was not properly detected in case of an invalid
    buffer stream, such as a stream of null bytes, for example.
    This was leading to a kernel oups.
    Let get_byte return type be int, so it can return an error for
    reaching end of stream.

    While at it, replace 0 with NULL, for null pointer initialization.

    Fixes: 36649dec0eb7 ("mxc-jpeg: Fix result independent of operands")
    Signed-off-by: Mirela Rabulea

    Mirela Rabulea
     
  • Clocks are always on when DSP PD is on. Use dummy clocks
    for minimal code impact for now.

    This is similar with the approach on i.MX8QM.

    Signed-off-by: Daniel Baluta

    Daniel Baluta
     
  • This is similar with the refactor for i.MX8MP added in commit
    ba2d283f5d9 ("LF-3026-2 ASoC: SOF: imx8m: Remove internal
    priv->suspended variable").

    Because SOF state machine assumes that even if the DSP wasn't previously
    active at a System resume, will re-load the firmware we need to make sure
    that all needed resources are active.

    Kernel core will take care of enabling the PD, we need to make sure that
    we request the MU channels.

    Signed-off-by: Daniel Baluta

    Daniel Baluta
     

29 Jan, 2021

2 commits

  • For normal case, userspace should call streamon/streamoff balance, but
    for some special case, the process will be killed or terminated and the
    streamoff ioctl will be ignored. So driver need to handle the case.

    Signed-off-by: Guoniu.zhou
    Reviewed-by: Robby Cai

    Guoniu.zhou
     
  • For some tough multi channels test, the default priority of channel0 may
    not be scheduled in 500us so that channel context can't be loaded as the
    below warning, hence sdma channel transfer will be failed. So raise up
    channel0 to the highest one since context load is important to all
    channels. Besides, enlarge 500us to 5ms for safe since many highest channel
    also may run at the same time like asrc/easrc tough test(8 channel run).

    "imx-sdma 30e10000.dma-controller: Timeout waiting for CH0 ready"

    Signed-off-by: Robin Gong
    Reviewed-by: Peng Zhang

    Robin Gong
     

28 Jan, 2021

7 commits


27 Jan, 2021

3 commits


26 Jan, 2021

6 commits