30 Mar, 2016

1 commit

  • mfio 84 to 89 are described wrongly, fix it to describe
    the right pin and add them to right pin-mux group.

    The correct order is:
    pll1_lock => mips_pll -- MFIO_83
    pll2_lock => audio_pll -- MFIO_84
    pll3_lock => rpu_v_pll -- MFIO_85
    pll4_lock => rpu_l_pll -- MFIO_86
    pll5_lock => sys_pll -- MFIO_87
    pll6_lock => wifi_pll -- MFIO_88
    pll7_lock => bt_pll -- MFIO_89

    Cc: linux-gpio@vger.kernel.org
    Cc: devicetree@vger.kernel.org
    Cc: linux-mips@linux-mips.org
    Cc: James Hartley
    Cc: # v4.2+
    Fixes: cefc03e5995e("pinctrl: Add Pistachio SoC pin control driver")
    Signed-off-by: Govindraj Raja
    Acked-by: Andrew Bresticker
    Acked-by: Rob Herring
    Signed-off-by: Linus Walleij

    Govindraj Raja
     

06 May, 2015

1 commit