31 Mar, 2011
1 commit
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Fixes generated by 'codespell' and manually reviewed.
Signed-off-by: Lucas De Marchi
11 Mar, 2011
1 commit
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Add tile support for the EDAC driver, which provides unified system
error (memory, PCI, etc.) reporting. For now, the TILEPro port
reports memory correctable error (CE) only.Signed-off-by: Chris Metcalf
07 Jan, 2011
1 commit
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AMD_NB pulls in the dependency on PCI. Clarify/fix help text while at it.
Signed-off-by: Borislav Petkov
25 Oct, 2010
1 commit
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* 'devel' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/edac: (25 commits)
i7300_edac: Properly initialize per-csrow memory size
V4L/DVB: i7300_edac: better initialize page counts
MAINTAINERS: Add maintainer for i7300-edac driver
i7300-edac: CodingStyle cleanup
i7300_edac: Improve comments
i7300_edac: Cleanup: reorganize the file contents
i7300_edac: Properly detect channel on CE errors
i7300_edac: enrich FBD error info for corrected errors
i7300_edac: enrich FBD error info for fatal errors
i7300_edac: pre-allocate a buffer used to prepare err messages
i7300_edac: Fix MTR x4/x8 detection logic
i7300_edac: Make the debug messages coherent with the others
i7300_edac: Cleanup: remove get_error_info logic
i7300_edac: Add a code to cleanup error registers
i7300_edac: Add support for reporting FBD errors
i7300_edac: Properly detect the type of error correction
i7300_edac: Detect if the device is on single mode
i7300_edac: Adds detection for enhanced scrub mode on x8
i7300_edac: Clear the error bit after reading
i7300_edac: Add error detection code for global errors
...
22 Oct, 2010
1 commit
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* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp: (21 commits)
EDAC, MCE: Fix shift warning on 32-bit
EDAC, MCE: Add a BIT_64() macro
EDAC, MCE: Enable MCE decoding on F12h
EDAC, MCE: Add F12h NB MCE decoder
EDAC, MCE: Add F12h IC MCE decoder
EDAC, MCE: Add F12h DC MCE decoder
EDAC, MCE: Add support for F11h MCEs
EDAC, MCE: Enable MCE decoding on F14h
EDAC, MCE: Fix FR MCEs decoding
EDAC, MCE: Complete NB MCE decoders
EDAC, MCE: Warn about LS MCEs on F14h
EDAC, MCE: Adjust IC decoders to F14h
EDAC, MCE: Adjust DC decoders to F14h
EDAC, MCE: Rename files
EDAC, MCE: Rework MCE injection
EDAC: Export edac sysfs class to users.
EDAC, MCE: Pass complete MCE info to decoders
EDAC, MCE: Sanitize error codes
EDAC, MCE: Remove unused function parameter
EDAC, MCE: Add HW_ERR prefix
...
21 Oct, 2010
1 commit
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Add sysfs injection facilities for testing of the MCE decoding code.
Remove large parts of amd64_edac_dbg.c, as a result, which did only
NB MCE injection anyway and the new injection code supports that
functionality already.Add an injection module so that MCE decoding code in production kernels
like those in RHEL and SLES can be tested.Signed-off-by: Borislav Petkov
21 Sep, 2010
1 commit
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The file names are somehow misleading as the code is not specific to
AMD K8 CPUs anymore. The files accomodate code for other AMD CPU
northbridges as well.Same is true for the config option which is valid for AMD CPU
northbridges in general and not specific to K8.Signed-off-by: Andreas Herrmann
LKML-Reference:
Signed-off-by: H. Peter Anvin
31 Aug, 2010
1 commit
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Signed-off-by: Mauro Carvalho Chehab
03 Aug, 2010
1 commit
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This option differs from EDAC_DEBUG only by printing the file and
line of where the debug statement is placed, which contains unneeded
information. So remove it.Signed-off-by: Borislav Petkov
Acked-by: Doug Thompson
21 Jul, 2010
1 commit
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Since commit 5753c082f66eca5be81f6bda85c1718c5eea6ada ("powerpc/85xx:
Kconfig cleanup"), there is no MPC85xx Kconfig symbol anymore, so the
driver became non-selectable.This patch fixes the issue by switching to PPC_85xx symbol.
Signed-off-by: Anton Vorontsov
Cc: Doug Thompson
Cc: Peter Tyser
Cc: Dave Jiang
Cc: Kumar Gala
Cc:
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds
10 May, 2010
3 commits
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Since mcelog is bool, edac_mce glue should also be bool, or otherwise
will not work.Signed-off-by: Mauro Carvalho Chehab
-
edac_mce module is an interface module that gets mcelog data and
forwards to any registered edac module that expects to receive data via
mce.Signed-off-by: Mauro Carvalho Chehab
-
This driver is meant to support i7 core/i7core extreme desktop
processors and Xeon 35xx/55xx series with integrated memory controller.
It is likely that it can be expanded in the future to work with other
processor series based at the same Memory Controller design.For now, it has just a few MCH status reads.
Signed-off-by: Mauro Carvalho Chehab
02 Oct, 2009
1 commit
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This converts the MCE decoding logic into a standalone config
option which can be built-in or a module, the first one being the
default for MCEs happening early on in the boot process.This, beyond being separated in a cleaner way, also saves RAM by
making the decoding logic modular.Signed-off-by: Borislav Petkov
Cc: Linus Torvalds
Cc: Andi Kleen
LKML-Reference:
Signed-off-by: Ingo Molnar
24 Sep, 2009
2 commits
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A driver for the Intel 3200 and 3210 memory controllers. It has only had
light testing so far, and currently makes no attempt to decode error
addresses at anything finer than csrow granularity.Signed-off-by: Jason Uhlenkott
Signed-off-by: Doug Thompson
Cc: Ingo Molnar
Cc: "H. Peter Anvin"
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds -
Add support for the Freescale MPC83xx memory controller to the existing
driver for the Freescale MPC85xx memory controller. The only difference
between the two processors are in the CS_BNDS register parsing code, which
has been changed so it will work on both processors.The L2 cache controller does not exist on the MPC83xx, but the OF
subsystem will not use the driver if the device is not present in the OF
device tree.I had to change the nr_pages calculation to make the math work out. I
checked it on my board and did the math by hand for a 64GB 85xx using 64K
pages. In both cases, nr_pages * PAGE_SIZE comes out to the correct
value.Signed-off-by: Ira W. Snyder
Signed-off-by: Doug Thompson
Cc: Kumar Gala
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds
16 Sep, 2009
1 commit
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-tip testing found the following build failure (config attached):
drivers/built-in.o: In function `amd64_check':
amd64_edac.c:(.text+0x3e9491): undefined reference to `amd_decode_nb_mce'
drivers/built-in.o: In function `amd64_init_2nd_stage':
amd64_edac.c:(.text+0x3e9b46): undefined reference to `amd_report_gart_errors'
amd64_edac.c:(.text+0x3e9b55): undefined reference to `amd_register_ecc_decoder'
drivers/built-in.o: In function `amd64_nbea_store':
amd64_edac_dbg.c:(.text+0x3ea22e): undefined reference to `amd_decode_nb_mce'
drivers/built-in.o: In function `amd64_remove_one_instance':
amd64_edac.c:(.devexit.text+0x3eea): undefined reference to `amd_report_gart_errors'
amd64_edac.c:(.devexit.text+0x3ef6): undefined reference to `amd_unregister_ecc_decoder'the AMD EDAC code has a dependency on CONFIG_CPU_SUP_AMD facilities. The
patch below solves the problem here.Signed-off-by: Ingo Molnar
Signed-off-by: Borislav Petkov
19 Jun, 2009
2 commits
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Fix the meaning of EDAC(Error Detection And Correction) correctly.
[akpm@linux-foundation.org: add missing space]
Signed-off-by: GeunSik Lim
Cc: Alan Cox
Acked-by: Doug Thompson
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds -
Introduce IBM CPC925 EDAC driver, which makes use of ECC, CPU and
HyperTransport Link error detections and corrections on the IBM
CPC925 Bridge and Memory Controller.[akpm@linux-foundation.org: cleanup]
Signed-off-by: Harry Ciao
Cc: Doug Thompson
Cc: Michael Ellerman
Cc: Benjamin Herrenschmidt
Cc: Kumar Gala
Cc: Paul Mackerras
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds
10 Jun, 2009
3 commits
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Prevent EDAC compilation units from being built by default and let the
user explicitly select the needed modules.Acked-by: Randy Dunlap
Tested-by: Randy Dunlap
Signed-off-by: Borislav Petkov -
While at it, fix a link failure when !K8_NB.
Acked-by: Doug Thompson
Acked-by: Randy Dunlap
Tested-by: Randy Dunlap
Signed-off-by: Borislav Petkov -
Also, link into Kbuild by adding Kconfig and Makefile entries.
Borislav:
- Kconfig/Makefile splitting
- use zero-sized arrays for the sysfs attrs if not enabled
- rename sysfs attrs to more conform values
- shorten CONFIG_ names
- make multiple structure members assignment vertically aligned
- fix/cleanup comments
- fix function return value patterns
- fix err labels
- fix a memleak bug caught by Ingo
- remove the NUMA dependency and use num_k8_northbrides for initializing
a driver instance per NB.
- do not copy the pvt contents into the mci struct in
amd64_init_2nd_stage() and save it in the mci->pvt_info void ptr
instead.
- cleanup debug calls
- simplify amd64_setup_pci_device()Reviewed-by: Mauro Carvalho Chehab
Signed-off-by: Doug Thompson
Signed-off-by: Borislav Petkov
29 May, 2009
1 commit
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The amd8111_edac.c driver will fail allmodconfig on architectures other
than PPC, introduce Kconfig dependency to avoid this, since both AMD8111
and AMD8131 chips are only adopted on Maple so far.Signed-off-by: Harry Ciao
Cc: Doug Thompson
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds
03 Apr, 2009
5 commits
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Introduce Kconfig and Makefile options for AMD8111 EDAC driver.
Signed-off-by: Harry Ciao
Cc: Doug Thompson
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds -
Introduce Kconfig and Makefile options for AMD8131 EDAC driver.
Signed-off-by: Harry Ciao
Cc: Doug Thompson
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds -
This adds support for an EDAC memory controller adaptation driver for the
"ibm,sdram-4xx-ddr2" ECC controller realized in the AMCC PowerPC 405EX[r].At present, this driver has been developed and tested against the
controller realization in the AMCC PPC405EX[r] on the AMCC Kilauea and
Haleakala boards (256 MiB w/o ECC memory soldered onto the board) and a
proprietary board based on those designs (128 MiB ECC memory, also
soldered onto the board).In the future, dynamic feature detection and handling needs to be added
for the other realizations of this controller found in the 440SP, 440SPe,
460EX, 460GT and 460SX.Eventually, this driver will likely be evolved and adapted to the above
variant realizations of this controller as well as broken apart to handle
the other known ECC-capable controllers prevalent in other PPC4xx
processors:- IBM SDRAM (405GP, 405CR and 405EP) "ibm,sdram-4xx"
- IBM DDR1 (440GP, 440GX, 440EP and 440GR) "ibm,sdram-4xx-ddr"
- Denali DDR1/DDR2 (440EPX and 440GRX) "denali,sdram-4xx-ddr2"[akpm@linux-foundation.org: coding-style fixes]
Signed-off-by: Grant Erickson
Signed-off-by: Doug Thompson
Cc: Benjamin Herrenschmidt
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds -
After 3 years, this is a patch to remove the EXPERIMENTAL tag on EDAC. We
now have many module drivers submitters in EDAC and believe EDAC is no
longer EXPERIMENTALSigned-off-by: Doug Thompson
Signed-off-by: Linus Torvalds -
A patch for making a debugging information more verbose for use in
development debugging.By enabling the new option "More verbose debugging", information about
source file and line number will be added to debugging message.This is sample output,
EDAC MC0: Giving out device to 'e7xxx_edac' 'E7205': DEV 0000:00:00.0
EDAC DEBUG: in drivers/edac/edac_pci.c, line at 48: edac_pci_alloc_ctl_info()
EDAC DEBUG: in drivers/edac/edac_pci.c, line at 334: edac_pci_add_device()
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^Signed-off-by: Hitoshi Mitake
Signed-off-by: Doug Thompson
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds
07 Jan, 2009
1 commit
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EDAC driver for i5400 MCH (Seaburg)
This driver adds support for i5400 MCH chipset.
Signed-off-by: Mauro Carvalho Chehab
Signed-off-by: Ben Woodard
Cc: Doug Thompson
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds
23 Dec, 2008
1 commit
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Since the QPACE (Chromodynamics Parallel Computing on the
Cell Broadband Engine) platform doesn't use a iommu, doesn't
have PCI devices and a MPIC much lesser setup and
configurations are needed. So far all devices are detected
as OF device. A notifier function is used to set the dma_ops
for the of_platform bus. Further this patch splits the
PPC_CELL_NATIVE into PPC_CELL_COMMON which are parts that are
shared with the QPACE platform and the rest.Signed-off-by: Benjamin Krill
Signed-off-by: Arnd Bergmann
31 Oct, 2008
1 commit
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I wrote a new module for Intel X38 chipset. This chipset is very similar
to Intel 3200 chipset, but there are some different points, so I copyed
i3200_edac.c and modified.This is Intel's web page describing this chipset.
http://www.intel.com/Products/Desktop/Chipsets/X38/X38-overview.htmI've tested this new module with broken memory, and it seems to be working
well.Signed-off-by: Hitoshi Mitake
Signed-off-by: Doug Thompson
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds
26 Jul, 2008
1 commit
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Preliminary support for the Intel 5100 MCH. CE and UE errors are reported
along with the current DIMM label information and other memory parameters.Reasons why this is preliminary:
1) This chip has 2 independent memory controllers which, for best
perforance, use interleaved accesses to the DDR2 memory. This
architecture does not map very well to the current edac data structures
which depend on symmetric channel access to the interleaved data.
Without core changes, the best I could do for now is to map both memory
controllers to different csrows (first all ranks of controller 0, then
all ranks of controller 1). Someone much more familiar with the edac
core than I will probably need to come up with a more general data
structure to handle the interleaving and de-interleaving of the two
memory controllers.2) I have not yet tackled the de-interleaving of the rank/controller
address space into the physical address space of the CPU. There is
nothing fundamentally missing, it is just ending up to be a lot of
code, and I'd rather keep it separate for now, esp since it doesn't
work yet...3) The code depends on a particular i5100 chip select to DIMM mainboard
chip select mapping. This mapping seems obvious to me in order to
support dual and single ranked memory, but it is not unique and DIMM
labels could be wrong on other mainboards. There is no way to query
this mapping that I know of.4) The code requires that the i5100 is in 32GB mode. Only 4 ranks per
controller, 2 ranks per DIMM are supported. I do not have hardware
(nor do I expect to have hardware anytime soon) for the 48GB (6 ranks
per controller) mode.5) The serial presence detect code should be broken out into a "real"
i2c driver so that decode-dimms.pl can work.Signed-off-by: Arthur Jones
Signed-off-by: Doug Thompson
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds
29 Apr, 2008
1 commit
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Add Intel 3100 chipset support to e752x EDAC driver.
Cc: Alan Cox
Signed-off-by: Andrei Konovalov
Signed-off-by: Doug Thompson
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds
08 Feb, 2008
4 commits
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Modified to run on x86_64 as well as x86
i3000_edac builds (and runs) fine on x86_64.
Signed-off-by: Jason Uhlenkott
Signed-off-by: Doug Thompson
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds -
Marvell mv64x60 SoC support for EDAC. Used on PPC and MIPS platforms.
Development and testing done on PPC Motorola prpmc2800 ATCA board.[akpm@linux-foundation.org: make mv64x60_ctl_name static]
Signed-off-by: Dave Jiang
Cc: Alan Cox
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds -
EDAC chip driver support for Freescale MPC85xx platforms. PPC based.
Signed-off-by: Dave Jiang
Cc: Alan Cox
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds -
Adds driver for the Cell memory controller when used without a Hypervisor such
as on the IBM Cell blades. There might still be some improvements to do to
this such as finding if it's possible to properly obtain more details about
the address of the error but it's good enough already to report CE counts
which is our main priority at the moment.Signed-off-by: Benjamin Herrenschmidt
Cc: Alan Cox
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds
27 Jul, 2007
2 commits
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Fixed 'depends on PPC_PASEMI' in EDAC Kconfig. Module PASEMI depends ONLY on
the PASEMI on PPC.Was previously enabled for ALL PPC
Cc: Alan Cox
Cc: Egor N. Martovetsky
Signed-off-by: Doug Thompson
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds -
drivers/edac/edac_stub.c:15:22: asm/edac.h: No such file or directory
was it even supposed to work?
Cc: Douglas Thompson
Cc: Ralf Baechle
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds
20 Jul, 2007
1 commit
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New EDAC driver for the i82975x memory controller chipset Used on ASUS
motherboards[akpm@linux-foundation.org: fix multiple coding-style bloopers]
Signed-off-by:
Signed-off-by: Ranganathan Desikan
Signed-off-by: Doug Thompson
Cc: Greg KH
Cc: Alan Cox
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds
