09 Dec, 2018
2 commits
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The 50ms debounce is too low and give ghost bounces on some
platforms. Bump it to 100ms to make it stable.Signed-off-by: Linus Walleij
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This adds the FOTG210 USB host controller to the Gemini
device trees. In the main SoC DTSI it is flagged as disabled
and then it is selectively enabled on the devices that utilize
it.Signed-off-by: Linus Walleij
15 May, 2018
1 commit
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…linusw/linux-nomadik into next/dt
DTS updates for the Gemini:
- Set righ flashes on DNS-313
- Activate ATA1 on NAS4220B
- Set right harddisk triggers on the D-Link devices
- Fix all DTC warnings* tag 'gemini-dts-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: dts: Fix DTC warnings
ARM: dts: Add second ATA to NAS4220B
ARM: dts: Fix bootargs for Gemini D-Link devices
ARM: dts: Fix the DNS-313 flash compatible
ARM: dts: Set DNS-685 LEDs to use better triggers
ARM: dtd: Set DNS-313 LEDs to use better triggers
ARM: dts: gemini: Fix "debounce-interval" property misspellingSigned-off-by: Olof Johansson <olof@lixom.net>
12 May, 2018
3 commits
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The DTC was warning a lot about unit names etc, I think I fixed
them all. Stopping to include skeleton.dtsi fixes the last one.Signed-off-by: Linus Walleij
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The NAS4220B has the second ATA interface up and running.
Activate it in the device tree.Signed-off-by: Roman Yeryomin
Signed-off-by: Linus Walleij -
"debounce_interval" was never supported.
Signed-off-by: Geert Uytterhoeven
Cc: Linus Walleij
Signed-off-by: Linus Walleij
26 Apr, 2018
1 commit
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The DTS file for the NAS4220B had the pin config for the
ethernet interface set to the pins in the SL3512 SoC while
this system is using SL3516. Fix it by referencing the
right SL3516 pins instead of the SL3512 pins.Cc: stable@vger.kernel.org
Cc: Hans Ulli Kroll
Reported-by: Andreas Fiedler
Reported-by: Roman Yeryomin
Tested-by: Roman Yeryomin
Signed-off-by: Linus Walleij
Signed-off-by: Arnd Bergmann
17 Jan, 2018
1 commit
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These platforms have the PHY defined already so we just
need to add a single device node to each of them to activate
the ethernet device.The PHY skew/delay settings for pin control is known from a
few vendor trees and old OpenWRT patch sets.Signed-off-by: Linus Walleij
17 Dec, 2017
1 commit
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These Gemini boards have Ethernet PHY on GPIO bit-banged
MDIO, clearly defined in the corresponding OpenWRT
ethernet patches since ages. Add them in accordance with
the OpenWRT patch so we can use them when we add ethernet
support.Reviewed-by: Andrew Lunn
Signed-off-by: Linus Walleij
02 Nov, 2017
1 commit
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Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.By default all files without license information are under the default
license of the kernel, which is GPL version 2.Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier. The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.How this work was done:
Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
- file had no licensing information it it.
- file was a */uapi/* one with no licensing information in it,
- file was a */uapi/* one with existing licensing information,Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne. Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed. Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.Criteria used to select files for SPDX license identifier tagging was:
- Files considered eligible had to be source code files.
- Make and config files were included as candidates if they contained >5
lines of source
- File already had some variant of a license header in it (even if
Reviewed-by: Philippe Ombredanne
Reviewed-by: Thomas Gleixner
Signed-off-by: Greg Kroah-Hartman
08 Aug, 2017
1 commit
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This adds the basic pin control muliplexing settings for the
Gemini SoC: parallel (NOR) flash, SATA, optional IDE, PCI and
UART.We also select the right GPIO groups on all applicable systems
so that GPIO keys/LEDs work smoothly.We can then build upon this for more complex systems.
Acked-by: Hans Ulli Kroll
Signed-off-by: Linus Walleij
14 Jun, 2017
1 commit
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The NAS4229B and SQ201 Gemini systems have a PATA controller
which is linked to a SATA bridge in the SoC. Enable both
platforms to use the PATA/SATA devices.Cc: John Feng-Hsin Chiang
Cc: Greentime Hu
Acked-by: Hans Ulli Kroll
Signed-off-by: Linus Walleij
12 Mar, 2017
1 commit
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This devicetree is simply based on the board file in
arch/arm/mach-gemini/board-nas4220b.c and contain the
equivalent platform data, mainly just moving the GPIOs
from the global numberspace to explicitly reference &gpio1.Cc: Janos Laube
Cc: Paulius Zaleckas
Cc: Florian Fainelli
Signed-off-by: Hans Ulli Kroll
Signed-off-by: Linus Walleij