22 May, 2019

2 commits

  • Pull SPDX update from Greg KH:
    "Here is a series of patches that add SPDX tags to different kernel
    files, based on two different things:

    - SPDX entries are added to a bunch of files that we missed a year
    ago that do not have any license information at all.

    These were either missed because the tool saw the MODULE_LICENSE()
    tag, or some EXPORT_SYMBOL tags, and got confused and thought the
    file had a real license, or the files have been added since the
    last big sweep, or they were Makefile/Kconfig files, which we
    didn't touch last time.

    - Add GPL-2.0-only or GPL-2.0-or-later tags to files where our scan
    tools can determine the license text in the file itself. Where this
    happens, the license text is removed, in order to cut down on the
    700+ different ways we have in the kernel today, in a quest to get
    rid of all of these.

    These patches have been out for review on the linux-spdx@vger mailing
    list, and while they were created by automatic tools, they were
    hand-verified by a bunch of different people, all whom names are on
    the patches are reviewers.

    The reason for these "large" patches is if we were to continue to
    progress at the current rate of change in the kernel, adding license
    tags to individual files in different subsystems, we would be finished
    in about 10 years at the earliest.

    There will be more series of these types of patches coming over the
    next few weeks as the tools and reviewers crunch through the more
    "odd" variants of how to say "GPLv2" that developers have come up with
    over the years, combined with other fun oddities (GPL + a BSD
    disclaimer?) that are being unearthed, with the goal for the whole
    kernel to be cleaned up.

    These diffstats are not small, 3840 files are touched, over 10k lines
    removed in just 24 patches"

    * tag 'spdx-5.2-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core: (24 commits)
    treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 25
    treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 24
    treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 23
    treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 22
    treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 21
    treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 20
    treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 19
    treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 18
    treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 17
    treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 15
    treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 14
    treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 13
    treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 12
    treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 11
    treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 10
    treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 9
    treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 7
    treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 5
    treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 4
    treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 3
    ...

    Linus Torvalds
     
  • Pull crypto fixes from Herbert Xu:

    - Two long-standing bugs in the powerpc assembly of vmx

    - Stack overrun caused by HASH_MAX_DESCSIZE being too small

    - Regression in caam

    * 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6:
    crypto: vmx - ghash: do nosimd fallback manually
    crypto: vmx - CTR: always increment IV as quadword
    crypto: hash - fix incorrect HASH_MAX_DESCSIZE
    crypto: caam - fix typo in i.MX6 devices list for errata

    Linus Torvalds
     

21 May, 2019

4 commits

  • Based on 1 normalized pattern(s):

    this program is free software you can redistribute it and or modify
    it under the terms of the gnu general public license as published by
    the free software foundation either version 2 of the license or at
    your option any later version this program is distributed in the
    hope that it will be useful but without any warranty without even
    the implied warranty of merchantability or fitness for a particular
    purpose see the gnu general public license for more details you
    should have received a copy of the gnu general public license along
    with this program if not write to the free software foundation 51
    franklin street fifth floor boston ma 02110 1301 usa

    extracted by the scancode license scanner the SPDX license identifier

    GPL-2.0-or-later

    has been chosen to replace the boilerplate/reference in 2 file(s).

    Signed-off-by: Thomas Gleixner
    Reviewed-by: Kate Stewart
    Reviewed-by: Steve Winslow
    Reviewed-by: Jilayne Lovejoy
    Reviewed-by: Allison Randal
    Cc: linux-spdx@vger.kernel.org
    Link: https://lkml.kernel.org/r/20190519154042.432790911@linutronix.de
    Signed-off-by: Greg Kroah-Hartman

    Thomas Gleixner
     
  • Based on 2 normalized pattern(s):

    this program is free software you can redistribute it and or modify
    it under the terms of the gnu general public license as published by
    the free software foundation either version 2 of the license or at
    your option any later version this program is distributed in the
    hope that it will be useful but without any warranty without even
    the implied warranty of merchantability or fitness for a particular
    purpose see the gnu general public license for more details you
    should have received a copy of the gnu general public license along
    with this program if not see http www gnu org licenses

    this program is free software you can redistribute it and or modify
    it under the terms of the gnu general public license as published by
    the free software foundation either version 2 of the license or at
    your option any later version this program is distributed in the
    hope that it will be useful but without any warranty without even
    the implied warranty of merchantability or fitness for a particular
    purpose see the gnu general public license for more details [based]
    [from] [clk] [highbank] [c] you should have received a copy of the
    gnu general public license along with this program if not see http
    www gnu org licenses

    extracted by the scancode license scanner the SPDX license identifier

    GPL-2.0-or-later

    has been chosen to replace the boilerplate/reference in 355 file(s).

    Signed-off-by: Thomas Gleixner
    Reviewed-by: Kate Stewart
    Reviewed-by: Jilayne Lovejoy
    Reviewed-by: Steve Winslow
    Reviewed-by: Allison Randal
    Cc: linux-spdx@vger.kernel.org
    Link: https://lkml.kernel.org/r/20190519154041.837383322@linutronix.de
    Signed-off-by: Greg Kroah-Hartman

    Thomas Gleixner
     
  • Add SPDX license identifiers to all Make/Kconfig files which:

    - Have no license information of any form

    These files fall under the project license, GPL v2 only. The resulting SPDX
    license identifier is:

    GPL-2.0-only

    Signed-off-by: Thomas Gleixner
    Signed-off-by: Greg Kroah-Hartman

    Thomas Gleixner
     
  • Add SPDX license identifiers to all files which:

    - Have no license information of any form

    - Have MODULE_LICENCE("GPL*") inside which was used in the initial
    scan/conversion to ignore the file

    These files fall under the project license, GPL v2 only. The resulting SPDX
    license identifier is:

    GPL-2.0-only

    Signed-off-by: Thomas Gleixner
    Signed-off-by: Greg Kroah-Hartman

    Thomas Gleixner
     

17 May, 2019

3 commits

  • VMX ghash was using a fallback that did not support interleaving simd
    and nosimd operations, leading to failures in the extended test suite.

    If I understood correctly, Eric's suggestion was to use the same
    data format that the generic code uses, allowing us to call into it
    with the same contexts. I wasn't able to get that to work - I think
    there's a very different key structure and data layout being used.

    So instead steal the arm64 approach and perform the fallback
    operations directly if required.

    Fixes: cc333cd68dfa ("crypto: vmx - Adding GHASH routines for VMX module")
    Cc: stable@vger.kernel.org # v4.1+
    Reported-by: Eric Biggers
    Signed-off-by: Daniel Axtens
    Acked-by: Ard Biesheuvel
    Tested-by: Michael Ellerman
    Signed-off-by: Herbert Xu

    Daniel Axtens
     
  • The kernel self-tests picked up an issue with CTR mode:
    alg: skcipher: p8_aes_ctr encryption test failed (wrong result) on test vector 3, cfg="uneven misaligned splits, may sleep"

    Test vector 3 has an IV of FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFD, so
    after 3 increments it should wrap around to 0.

    In the aesp8-ppc code from OpenSSL, there are two paths that
    increment IVs: the bulk (8 at a time) path, and the individual
    path which is used when there are fewer than 8 AES blocks to
    process.

    In the bulk path, the IV is incremented with vadduqm: "Vector
    Add Unsigned Quadword Modulo", which does 128-bit addition.

    In the individual path, however, the IV is incremented with
    vadduwm: "Vector Add Unsigned Word Modulo", which instead
    does 4 32-bit additions. Thus the IV would instead become
    FFFFFFFFFFFFFFFFFFFFFFFF00000000, throwing off the result.

    Use vadduqm.

    This was probably a typo originally, what with q and w being
    adjacent. It is a pretty narrow edge case: I am really
    impressed by the quality of the kernel self-tests!

    Fixes: 5c380d623ed3 ("crypto: vmx - Add support for VMS instructions by ASM")
    Cc: stable@vger.kernel.org
    Signed-off-by: Daniel Axtens
    Acked-by: Nayna Jain
    Tested-by: Nayna Jain
    Signed-off-by: Herbert Xu

    Daniel Axtens
     
  • Fix a typo in the list of i.MX6 devices affected by an
    issue wherein AXI bus transactions may not occur in
    the correct order.

    Fixes: 33d69455e402 ("crypto: caam - limit AXI pipeline to a depth of
    1")
    Signed-off-by: Iuliana Prodan
    Reviewed-by: Horia Geantă
    Signed-off-by: Herbert Xu

    Iuliana Prodan
     

16 May, 2019

2 commits

  • Pull ARM SoC platform updates from Olof Johansson:
    "SoC updates, mostly refactorings and cleanups of old legacy platforms.

    Major themes this release:

    - Conversion of ixp4xx to a modern platform (drivers, DT, bindings)

    - Moving some of the ep93xx headers around to get it closer to
    multiplatform enabled.

    - Cleanups of Davinci

    This also contains a few patches that were queued up as fixes before
    5.1 but I didn't get sent in before release"

    * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (123 commits)
    ARM: debug-ll: add default address for digicolor
    ARM: u300: regulator: add MODULE_LICENSE()
    ARM: ep93xx: move private headers out of mach/*
    ARM: ep93xx: move pinctrl interfaces into include/linux/soc
    ARM: ep93xx: keypad: stop using mach/platform.h
    ARM: ep93xx: move network platform data to separate header
    ARM: stm32: add AMBA support for stm32 family
    MAINTAINERS: update arch/arm/mach-davinci
    ARM: rockchip: add missing of_node_put in rockchip_smp_prepare_pmu
    ARM: dts: Add queue manager and NPE to the IXP4xx DTSI
    soc: ixp4xx: qmgr: Add DT probe code
    soc: ixp4xx: qmgr: Add DT bindings for IXP4xx qmgr
    soc: ixp4xx: npe: Add DT probe code
    soc: ixp4xx: Add DT bindings for IXP4xx NPE
    soc: ixp4xx: qmgr: Pass resources
    soc: ixp4xx: Remove unused functions
    soc: ixp4xx: Uninline several functions
    soc: ixp4xx: npe: Pass addresses as resources
    ARM: ixp4xx: Turn the QMGR into a platform device
    ARM: ixp4xx: Turn the NPE into a platform device
    ...

    Linus Torvalds
     
  • Merge in a few pending fixes from pre-5.1 that didn't get sent in:

    MAINTAINERS: update arch/arm/mach-davinci
    ARM: dts: ls1021: Fix SGMII PCS link remaining down after PHY disconnect
    ARM: dts: imx6q-logicpd: Reduce inrush current on USBH1
    ARM: dts: imx6q-logicpd: Reduce inrush current on start
    ARM: dts: imx: Fix the AR803X phy-mode
    ARM: dts: sun8i: a33: Reintroduce default pinctrl muxing
    arm64: dts: allwinner: a64: Rename hpvcc-supply to cpvdd-supply
    ARM: sunxi: fix a leaked reference by adding missing of_node_put
    ARM: sunxi: fix a leaked reference by adding missing of_node_put

    Signed-off-by: Olof Johansson

    Olof Johansson
     

15 May, 2019

1 commit

  • Pull crypto fixes from Herbert Xu:
    "This fixes a number of issues in the chelsio and caam drivers"

    * 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6:
    Revert "crypto: caam/jr - Remove extra memory barrier during job ring dequeue"
    crypto: caam - fix caam_dump_sg that iterates through scatterlist
    crypto: caam - fix DKP detection logic
    MAINTAINERS: Maintainer for Chelsio crypto driver
    crypto: chelsio - count incomplete block in IV
    crypto: chelsio - Fix softlockup with heavy I/O
    crypto: chelsio - Fix NULL pointer dereference

    Linus Torvalds
     

09 May, 2019

6 commits


07 May, 2019

2 commits

  • Pull crypto update from Herbert Xu:
    "API:
    - Add support for AEAD in simd
    - Add fuzz testing to testmgr
    - Add panic_on_fail module parameter to testmgr
    - Use per-CPU struct instead multiple variables in scompress
    - Change verify API for akcipher

    Algorithms:
    - Convert x86 AEAD algorithms over to simd
    - Forbid 2-key 3DES in FIPS mode
    - Add EC-RDSA (GOST 34.10) algorithm

    Drivers:
    - Set output IV with ctr-aes in crypto4xx
    - Set output IV in rockchip
    - Fix potential length overflow with hashing in sun4i-ss
    - Fix computation error with ctr in vmx
    - Add SM4 protected keys support in ccree
    - Remove long-broken mxc-scc driver
    - Add rfc4106(gcm(aes)) cipher support in cavium/nitrox"

    * 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (179 commits)
    crypto: ccree - use a proper le32 type for le32 val
    crypto: ccree - remove set but not used variable 'du_size'
    crypto: ccree - Make cc_sec_disable static
    crypto: ccree - fix spelling mistake "protedcted" -> "protected"
    crypto: caam/qi2 - generate hash keys in-place
    crypto: caam/qi2 - fix DMA mapping of stack memory
    crypto: caam/qi2 - fix zero-length buffer DMA mapping
    crypto: stm32/cryp - update to return iv_out
    crypto: stm32/cryp - remove request mutex protection
    crypto: stm32/cryp - add weak key check for DES
    crypto: atmel - remove set but not used variable 'alg_name'
    crypto: picoxcell - Use dev_get_drvdata()
    crypto: crypto4xx - get rid of redundant using_sd variable
    crypto: crypto4xx - use sync skcipher for fallback
    crypto: crypto4xx - fix cfb and ofb "overran dst buffer" issues
    crypto: crypto4xx - fix ctr-aes missing output IV
    crypto: ecrdsa - select ASN1 and OID_REGISTRY for EC-RDSA
    crypto: ux500 - use ccflags-y instead of CFLAGS_.o
    crypto: ccree - handle tee fips error during power management resume
    crypto: ccree - add function to handle cryptocell tee fips error
    ...

    Linus Torvalds
     
  • Pull mmiowb removal from Will Deacon:
    "Remove Mysterious Macro Intended to Obscure Weird Behaviours (mmiowb())

    Remove mmiowb() from the kernel memory barrier API and instead, for
    architectures that need it, hide the barrier inside spin_unlock() when
    MMIO has been performed inside the critical section.

    The only relatively recent changes have been addressing review
    comments on the documentation, which is in a much better shape thanks
    to the efforts of Ben and Ingo.

    I was initially planning to split this into two pull requests so that
    you could run the coccinelle script yourself, however it's been plain
    sailing in linux-next so I've just included the whole lot here to keep
    things simple"

    * tag 'arm64-mmiowb' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (23 commits)
    docs/memory-barriers.txt: Update I/O section to be clearer about CPU vs thread
    docs/memory-barriers.txt: Fix style, spacing and grammar in I/O section
    arch: Remove dummy mmiowb() definitions from arch code
    net/ethernet/silan/sc92031: Remove stale comment about mmiowb()
    i40iw: Redefine i40iw_mmiowb() to do nothing
    scsi/qla1280: Remove stale comment about mmiowb()
    drivers: Remove explicit invocations of mmiowb()
    drivers: Remove useless trailing comments from mmiowb() invocations
    Documentation: Kill all references to mmiowb()
    riscv/mmiowb: Hook up mmwiob() implementation to asm-generic code
    powerpc/mmiowb: Hook up mmwiob() implementation to asm-generic code
    ia64/mmiowb: Add unconditional mmiowb() to arch_spin_unlock()
    mips/mmiowb: Add unconditional mmiowb() to arch_spin_unlock()
    sh/mmiowb: Add unconditional mmiowb() to arch_spin_unlock()
    m68k/io: Remove useless definition of mmiowb()
    nds32/io: Remove useless definition of mmiowb()
    x86/io: Remove useless definition of mmiowb()
    arm64/io: Remove useless definition of mmiowb()
    ARM/io: Remove useless definition of mmiowb()
    mmiowb: Hook up mmiowb helpers to spinlocks and generic I/O accessors
    ...

    Linus Torvalds
     

03 May, 2019

16 commits

  • We build an explicit little endian value from the IDR register
    values. Use a proper le32 type to mark the var as such to
    satisfy Sparse.

    Signed-off-by: Gilad Ben-Yossef
    Reported-by: kbuild test robot
    Fixes: dcf6285d18ea1 ("crypto: ccree - add CID and PID support")
    Signed-off-by: Herbert Xu

    Gilad Ben-Yossef
     
  • Fixes gcc '-Wunused-but-set-variable' warning:

    drivers/crypto/ccree/cc_cipher.c: In function cc_setup_key_desc:
    drivers/crypto/ccree/cc_cipher.c:645:15: warning: variable du_size set but not used [-Wunused-but-set-variable]

    It is never used since introduction in
    commit dd8486c75085 ("crypto: ccree - move key load desc. before flow desc.")

    Signed-off-by: YueHaibing
    Signed-off-by: Herbert Xu

    YueHaibing
     
  • Fix sparse warning:

    drivers/crypto/ccree/cc_driver.c:37:6: warning:
    symbol 'cc_sec_disable' was not declared. Should it be static?

    Signed-off-by: YueHaibing
    Signed-off-by: Herbert Xu

    YueHaibing
     
  • There is a spelling mistake in a dev_dbg message, fix it.

    Signed-off-by: Colin Ian King
    Acked-By: Gilad Ben-Yossef
    Signed-off-by: Herbert Xu

    Colin Ian King
     
  • Commit 307244452d3d ("crypto: caam - generate hash keys in-place")
    fixed ahash implementation in caam/jr driver such that user-provided key
    buffer is not DMA mapped, since it's not guaranteed to be DMAable.

    Apply a similar fix for caam/qi2 driver.

    Cc: # v4.20+
    Fixes: 3f16f6c9d632 ("crypto: caam/qi2 - add support for ahash algorithms")
    Signed-off-by: Horia Geantă
    Signed-off-by: Herbert Xu

    Horia Geantă
     
  • Commits c19650d6ea99 ("crypto: caam - fix DMA mapping of stack memory")
    and 65055e210884 ("crypto: caam - fix hash context DMA unmap size")
    fixed the ahash implementation in caam/jr driver such that req->result
    is not DMA-mapped (since it's not guaranteed to be DMA-able).

    Apply a similar fix for ahash implementation in caam/qi2 driver.

    Cc: # v4.20+
    Fixes: 3f16f6c9d632 ("crypto: caam/qi2 - add support for ahash algorithms")
    Signed-off-by: Horia Geantă
    Signed-off-by: Herbert Xu

    Horia Geantă
     
  • Commit 04e6d25c5bb2 ("crypto: caam - fix zero-length buffer DMA mapping")
    fixed an issue in caam/jr driver where ahash implementation was
    DMA mapping a zero-length buffer.

    Current commit applies a similar fix for caam/qi2 driver.

    Cc: # v4.20+
    Fixes: 3f16f6c9d632 ("crypto: caam/qi2 - add support for ahash algorithms")
    Signed-off-by: Horia Geantă
    Signed-off-by: Herbert Xu

    Horia Geantă
     
  • The kernel crypto API request output the next IV data to
    IV buffer for CBC implementation.

    Signed-off-by: Lionel Debieve
    Signed-off-by: Herbert Xu

    Lionel Debieve
     
  • Mutex is badly used between threaded irq and driver.
    This mutex must be removed as the framework must ensure
    that requests must be serialized to avoid issue. Rework
    req to avoid crash during finalize by fixing the NULL
    pointer issue.

    Signed-off-by: Lionel Debieve
    Signed-off-by: Herbert Xu

    Lionel Debieve
     
  • Add weak key test for des functions calling the generic
    des_ekey.

    Signed-off-by: Lionel Debieve
    Signed-off-by: Herbert Xu

    Lionel Debieve
     
  • Fixes gcc '-Wunused-but-set-variable' warning:

    drivers/crypto/atmel-tdes.c: In function 'atmel_tdes_setkey':
    drivers/crypto/atmel-tdes.c:803:14: warning: variable 'alg_name' set but not used [-Wunused-but-set-variable]

    It is not used any more since
    commit 52ea3cd2917b ("crypto: atmel - Forbid 2-key 3DES in FIPS mode")

    Signed-off-by: YueHaibing
    Reviewed-by: Nicolas Ferre
    Reviewed-by: Tudor Ambarus
    Signed-off-by: Herbert Xu

    YueHaibing
     
  • Using dev_get_drvdata directly.

    Cc: Jamie Iles
    Cc: Herbert Xu
    Cc: "David S. Miller"
    Cc: linux-crypto@vger.kernel.org
    Cc: linux-arm-kernel@lists.infradead.org
    Signed-off-by: Kefeng Wang
    Signed-off-by: Herbert Xu

    Kefeng Wang
     
  • using_sd is used as a stand-in for sa_command_0.bf.scatter
    that we need to set anyway, so we might as well just prevent
    double-accounting.

    Signed-off-by: Christian Lamparter
    Signed-off-by: Herbert Xu

    Christian Lamparter
     
  • This replaces struct crypto_skcipher and the extra request size
    with struct crypto_sync_skcipher and SYNC_SKCIPHER_REQUEST_ON_STACK(),
    which uses a fixed stack size.

    Signed-off-by: Christian Lamparter
    Signed-off-by: Herbert Xu

    Christian Lamparter
     
  • Currently, crypto4xx CFB and OFB AES ciphers are
    failing testmgr's test vectors.

    |cfb-aes-ppc4xx encryption overran dst buffer on test vector 3, cfg="in-place"
    |ofb-aes-ppc4xx encryption overran dst buffer on test vector 1, cfg="in-place"

    This is because of a very subtile "bug" in the hardware that
    gets indirectly mentioned in 18.1.3.5 Encryption/Decryption
    of the hardware spec:

    the OFB and CFB modes for AES are listed there as operation
    modes for >>> "Block ciphers" <<num_gd
    and pd_uinfo->num_sd setters since the value has already been
    set before.

    Cc: stable@vger.kernel.org
    Fixes: f2a13e7cba9e ("crypto: crypto4xx - enable AES RFC3686, ECB, CFB and OFB offloads")
    Signed-off-by: Christian Lamparter
    Signed-off-by: Herbert Xu

    Christian Lamparter
     
  • Commit 8efd972ef96a ("crypto: testmgr - support checking skcipher output IV")
    caused the crypto4xx driver to produce the following error:

    | ctr-aes-ppc4xx encryption test failed (wrong output IV)
    | on test vector 0, cfg="in-place"

    This patch fixes this by reworking the crypto4xx_setkey_aes()
    function to:

    - not save the iv for ECB (as per 18.2.38 CRYP0_SA_CMD_0:
    "This bit mut be cleared for DES ECB mode or AES ECB mode,
    when no IV is used.")

    - instruct the hardware to save the generated IV for all
    other modes of operations that have IV and then supply
    it back to the callee in pretty much the same way as we
    do it for cbc-aes already.

    - make it clear that the DIR_(IN|OUT)BOUND is the important
    bit that tells the hardware to encrypt or decrypt the data.
    (this is cosmetic - but it hopefully prevents me from
    getting confused again).

    - don't load any bogus hash when we don't use any hash
    operation to begin with.

    Cc: stable@vger.kernel.org
    Fixes: f2a13e7cba9e ("crypto: crypto4xx - enable AES RFC3686, ECB, CFB and OFB offloads")
    Signed-off-by: Christian Lamparter
    Signed-off-by: Herbert Xu

    Christian Lamparter
     

25 Apr, 2019

4 commits