21 May, 2019
1 commit
-
Add SPDX license identifiers to all Make/Kconfig files which:
- Have no license information of any form
These files fall under the project license, GPL v2 only. The resulting SPDX
license identifier is:GPL-2.0-only
Signed-off-by: Thomas Gleixner
Signed-off-by: Greg Kroah-Hartman
18 Mar, 2019
2 commits
-
In kernel API of Linux FireWire subsystem, handlers of isochronous
receive (IR) context can get context headers as an argument of
callback. When 4 byte header is used, the context header includes
isochronous packet header for each packet. When 8 byte header is
used, it includes isochronous cycle as well.ALSA IEC 61883-1/6 engine uses 4 byte header, and computes isochronous
cycle from the cycle of interrupt. The usage of 8 byte header can
obsolete the computation.Furthermore, this change works well for a case that a series of
packet in one interrupt includes skipped isochronous cycle,This commit uses 8 byte header to handle isochronous cycle.
Signed-off-by: Takashi Sakamoto
Signed-off-by: Takashi Iwai -
This commit adds support for MOTU 8pre FireWire, which was shipped 2007
and nowadays already discontinued. Userspace applications can transmit
and receive PCM frames and MIDI messages for this model via ALSA PCM
interface and RawMidi/Sequencer interfaces.Like the other models of MOTU FireWire series, this model has many
quirks in its CIP.At first, data channels for two pairs of optical interfaces. At lower
sampling transmission frequency, i.e. 44.1 and 48.0 kHz, one pair is
available for ADAT data, thus 8 data chunks are transferred by CIP.
At middle sampling transmission frequency, i.e. 88.2 and 96.0 kHz,
two pairs are available to keep 8 chunks for ADAT data, thus CIP
still includes 8 data chunks.Apart from data chunks for optical interface, CIP includes fixed number
of data chunks. In tx stream, two chunks for status message, eight
chunks for samples from analog 1-8 input, two chunks for mix-return.
In rx stream, two chunks for control message, two chunks for main 1-2
output, two chunks for phone 1-2 output, two chunks for dummy 1-2.CIP header in tx stream includes quirks for its dbs and dbc fields.
The value of dbs field is fixed to 0x13, against its actual size.
The value of dbc field is firstly updated to 0x07 from zero, then
it's incremented continuously according to actual number of data h
blocks.Finally, the model has own bits to disable frame fetch.
This commit uses several options to absorb the above quirks.
$ python2 crpp < /sys/bus/firewire/devices/fw1/config_rom
ROM header and bus information block
-----------------------------------------------------------------
400 0410b57d bus_info_length 4, crc_length 16, crc 46461
404 31333934 bus_name "1394"
408 20001000 irmc 0, cmc 0, isc 1, bmc 0, cyc_clk_acc 0, max_rec 1 (4)
40c 0001f200 company_id 0001f2 |
410 00083dfb device_id 0000083dfb | EUI-64 0001f20000083dfbroot directory
-----------------------------------------------------------------
414 0004c65c directory_length 4, crc 50780
418 030001f2 vendor
41c 0c0083c0 node capabilities per IEEE 1394
420 8d000006 --> eui-64 leaf at 438
424 d1000001 --> unit directory at 428unit directory at 428
-----------------------------------------------------------------
428 0003991c directory_length 3, crc 39196
42c 120001f2 specifier id
430 1300000f version
434 17103800 modeleui-64 leaf at 438
-----------------------------------------------------------------
438 00022681 leaf_length 2, crc 9857
43c 0001f200 company_id 0001f2 |
440 00083dfb device_id 0000083dfb | EUI-64 0001f20000083dfbSigned-off-by: Takashi Sakamoto
Signed-off-by: Takashi Iwai
17 Mar, 2019
1 commit
-
Current ALSA firewire-motu driver uses the value of 'model' field
of unit directory in configuration ROM for modalias for MOTU
FireWire models. However, as long as I checked, Pre8 and
828mk3(Hybrid) have the same value for the field (=0x100800).unit | version | model
--------------- | --------- | ----------
828mkII | 0x000003 | 0x101800
Traveler | 0x000009 | 0x107800
Pre8 | 0x00000f | 0x100800
Cc: # v4.19+
Signed-off-by: Takashi Iwai
26 Feb, 2019
2 commits
-
In data blocks of common isochronous packet for MOTU devices, PCM
frames are multiplexed in a shape of '24 bit * 4 Audio Pack', described
in IEC 61883-6. The frames are not aligned to quadlet.For capture PCM substream, ALSA firewire-motu driver constructs PCM
frames by reading data blocks byte-by-byte. However this operation
includes bug for lower byte of the PCM sample. This brings invalid
content of the PCM samples.This commit fixes the bug.
Reported-by: Peter Sjöberg
Cc: # v4.12+
Fixes: 4641c9394010 ("ALSA: firewire-motu: add MOTU specific protocol layer")
Signed-off-by: Takashi Sakamoto
Signed-off-by: Takashi Iwai -
ALSA bebob driver has an entry for Focusrite Saffire Pro 10 I/O. The
entry matches vendor_id in root directory and model_id in unit
directory of configuration ROM for IEEE 1394 bus.On the other hand, configuration ROM of Focusrite Liquid Saffire 56
has the same vendor_id and model_id. This device is an application of
TCAT Dice (TCD2220 a.k.a Dice Jr.) however ALSA bebob driver can be
bound to it randomly instead of ALSA dice driver. At present, drivers
in ALSA firewire stack can not handle this situation appropriately.This commit uses more identical mod_alias for Focusrite Saffire Pro 10
I/O in ALSA bebob driver.$ python2 crpp < /sys/bus/firewire/devices/fw1/config_rom
ROM header and bus information block
-----------------------------------------------------------------
400 042a829d bus_info_length 4, crc_length 42, crc 33437
404 31333934 bus_name "1394"
408 f0649222 irmc 1, cmc 1, isc 1, bmc 1, pmc 0, cyc_clk_acc 100,
max_rec 9 (1024), max_rom 2, gen 2, spd 2 (S400)
40c 00130e01 company_id 00130e |
410 000606e0 device_id 01000606e0 | EUI-64 00130e01000606e0root directory
-----------------------------------------------------------------
414 0009d31c directory_length 9, crc 54044
418 04000014 hardware version
41c 0c0083c0 node capabilities per IEEE 1394
420 0300130e vendor
424 81000012 --> descriptor leaf at 46c
428 17000006 model
42c 81000016 --> descriptor leaf at 484
430 130120c2 version
434 d1000002 --> unit directory at 43c
438 d4000006 --> dependent info directory at 450unit directory at 43c
-----------------------------------------------------------------
43c 0004707c directory_length 4, crc 28796
440 1200a02d specifier id: 1394 TA
444 13010001 version: AV/C
448 17000006 model
44c 81000013 --> descriptor leaf at 498dependent info directory at 450
-----------------------------------------------------------------
450 000637c7 directory_length 6, crc 14279
454 120007f5 specifier id
458 13000001 version
45c 3affffc7 (immediate value)
460 3b100000 (immediate value)
464 3cffffc7 (immediate value)
468 3d600000 (immediate value)descriptor leaf at 46c
-----------------------------------------------------------------
46c 00056f3b leaf_length 5, crc 28475
470 00000000 textual descriptor
474 00000000 minimal ASCII
478 466f6375 "Focu"
47c 73726974 "srit"
480 65000000 "e"descriptor leaf at 484
-----------------------------------------------------------------
484 0004a165 leaf_length 4, crc 41317
488 00000000 textual descriptor
48c 00000000 minimal ASCII
490 50726f31 "Pro1"
494 30494f00 "0IO"descriptor leaf at 498
-----------------------------------------------------------------
498 0004a165 leaf_length 4, crc 41317
49c 00000000 textual descriptor
4a0 00000000 minimal ASCII
4a4 50726f31 "Pro1"
4a8 30494f00 "0IO"$ python2 crpp < /sys/bus/firewire/devices/fw1/config_rom
ROM header and bus information block
-----------------------------------------------------------------
400 040442e4 bus_info_length 4, crc_length 4, crc 17124
404 31333934 bus_name "1394"
408 e0ff8112 irmc 1, cmc 1, isc 1, bmc 0, pmc 0, cyc_clk_acc 255,
max_rec 8 (512), max_rom 1, gen 1, spd 2 (S400)
40c 00130e04 company_id 00130e |
410 018001e9 device_id 04018001e9 | EUI-64 00130e04018001e9root directory
-----------------------------------------------------------------
414 00065612 directory_length 6, crc 22034
418 0300130e vendor
41c 8100000a --> descriptor leaf at 444
420 17000006 model
424 8100000e --> descriptor leaf at 45c
428 0c0087c0 node capabilities per IEEE 1394
42c d1000001 --> unit directory at 430unit directory at 430
-----------------------------------------------------------------
430 000418a0 directory_length 4, crc 6304
434 1200130e specifier id
438 13000001 version
43c 17000006 model
440 8100000f --> descriptor leaf at 47cdescriptor leaf at 444
-----------------------------------------------------------------
444 00056f3b leaf_length 5, crc 28475
448 00000000 textual descriptor
44c 00000000 minimal ASCII
450 466f6375 "Focu"
454 73726974 "srit"
458 65000000 "e"descriptor leaf at 45c
-----------------------------------------------------------------
45c 000762c6 leaf_length 7, crc 25286
460 00000000 textual descriptor
464 00000000 minimal ASCII
468 4c495155 "LIQU"
46c 49445f53 "ID_S"
470 41464649 "AFFI"
474 52455f35 "RE_5"
478 36000000 "6"descriptor leaf at 47c
-----------------------------------------------------------------
47c 000762c6 leaf_length 7, crc 25286
480 00000000 textual descriptor
484 00000000 minimal ASCII
488 4c495155 "LIQU"
48c 49445f53 "ID_S"
490 41464649 "AFFI"
494 52455f35 "RE_5"
498 36000000 "6"Cc: # v3.16+
Fixes: 25784ec2d034 ("ALSA: bebob: Add support for Focusrite Saffire/SaffirePro series")
Signed-off-by: Takashi Sakamoto
Signed-off-by: Takashi Iwai
07 Feb, 2019
1 commit
-
The calls of snd_info_register() are superfluous and should be avoided
at the procfs creation time. They are called at the end of the whole
initialization via snd_card_register(). This patch drops such
superfluous calls.Reviewed-by: Takashi Sakamoto
Tested-by: Takashi Sakamoto
Signed-off-by: Takashi Iwai
28 Jan, 2019
1 commit
-
Duende Classic was produced by Solid State Logic in 2006, as a
first model of Duende DSP series. The following model, Duende Mini
was produced in 2008. They are designed to receive isochronous
packets for PCM frames via IEEE 1394 bus, perform signal processing by
downloaded program, then transfer isochronous packets for converted
PCM frames.These two models includes the same embedded board, consists of several
ICs below:
- Texus Instruments Inc, TSB41AB3 for physical layer of IEEE 1394 bus
- WaveFront semiconductor, DICE II STD ASIC for link/protocol layer
- Altera MAX 3000A CPLD for programs
- Analog devices, SHARC ADSP-21363 for signal processing (4 chips)This commit adds support for the two models to ALSA dice driver. Like
support for the other devices, packet streaming is just available.
Userspace applications should be developed if full features became
available; e.g. program uploader and parameter controller.$ ./hinawa-config-rom-printer /dev/fw1
{ 'bus-info': { 'adj': False,
'bmc': False,
'chip_ID': 349771402425,
'cmc': True,
'cyc_clk_acc': 255,
'generation': 1,
'imc': True,
'isc': True,
'link_spd': 2,
'max_ROM': 1,
'max_rec': 512,
'name': '1394',
'node_vendor_ID': 20674,
'pmc': False},
'root-directory': [ ['VENDOR', 20674],
['DESCRIPTOR', 'Solid State Logic'],
['MODEL', 112],
['DESCRIPTOR', 'Duende board'],
[ 'NODE_CAPABILITIES',
{ 'addressing': {'64': True, 'fix': True, 'prv': True},
'misc': {'int': False, 'ms': False, 'spt': True},
'state': { 'atn': False,
'ded': False,
'drq': True,
'elo': False,
'init': False,
'lst': True,
'off': False},
'testing': {'bas': False, 'ext': False}}],
[ 'UNIT',
[ ['SPECIFIER_ID', 20674],
['VERSION', 1],
['MODEL', 112],
['DESCRIPTOR', 'Duende board']]]]}Signed-off-by: Takashi Sakamoto
Signed-off-by: Takashi Iwai
25 Jan, 2019
1 commit
-
The > should be >= or otherwise we potentially read one element beyond
the end of the ff->tx_midi_substreams[] array.Fixes: 73f5537fb209 ("ALSA: fireface: support tx MIDI functionality of Fireface UCX")
Signed-off-by: Dan Carpenter
Reviewed-by: Takashi Sakamoto
Signed-off-by: Takashi Iwai
24 Jan, 2019
1 commit
-
In Fireface series, registration of higher 4 bytes of destination
address for asynchronous transaction of MIDI messages is done by
a write transaction to model-specific register.On the other hand, registration of lower 4 bytes of the address is
selectable from 4 options. A register for this registration includes
the other purpose options such as input attenuation. Thus this
driver expects userspace applications to configure the register.Actual behaviour for the asynchronous transaction is different
depending on protocols. In former protocol, destination offset
of each transaction is the same as the registered address even if
it is block request. In latter models, destination offset of each
transaction is the offset of previous transaction plus 4 byte
and the transaction is quadlet request.This commit cleanups comments about the above mechanism.
Signed-off-by: Takashi Sakamoto
Signed-off-by: Takashi Iwai
23 Jan, 2019
6 commits
-
In latter model of Fireface series, asynchronous transaction includes
a prefix byte to indicate the way to decode included MIDI bytes.Upper 4 bits of the prefix byte indicates port number, and the rest 4
bits indicate the way to decode rest of bytes for MIDI messages.Basically the rest bits indicates the number of bytes for MIDI message.
However, if the last byte of each MIDi message is included, the rest
bits are 0xf. For example:message: f0 00 00 66 14 20 00 00 f7
offset: content (big endian, port 0)
'0030: 0x02f00000
'0030: 0x03006614
'0030: 0x03200000
'0030: 0x0ff70000This commit supports encoding scheme for the above and allows
applications to transfer MIDI messages via ALSA rawmidi interface.
An unused member (running_status) is reused to keep state of
transmission of system exclusive messages.For your information, this is a dump of config rom.
$ sudo ./hinawa-config-rom-printer /dev/fw1
{ 'bus-info': { 'bmc': False,
'chip_ID': 13225063715,
'cmc': False,
'cyc_clk_acc': 0,
'imc': False,
'isc': True,
'max_rec': 512,
'name': '1394',
'node_vendor_ID': 2613},
'root-directory': [ [ 'NODE_CAPABILITIES',
{ 'addressing': {'64': True, 'fix': True, 'prv': False},
'misc': {'int': False, 'ms': False, 'spt': True},
'state': { 'atn': False,
'ded': False,
'drq': True,
'elo': False,
'init': False,
'lst': True,
'off': False},
'testing': {'bas': False, 'ext': False}}],
['VENDOR', 2613],
['DESCRIPTOR', 'RME!'],
['EUI_64', 2873037108442403],
[ 'UNIT',
[ ['SPECIFIER_ID', 2613],
['VERSION', 4],
['MODEL', 1054720],
['DESCRIPTOR', 'Fireface UCX']]]]}Signed-off-by: Takashi Sakamoto
Signed-off-by: Takashi Iwai -
Between former and latter models, content of asynchronous transaction
for MIDI messages from driver to device is different.This commit is a preparation to support latter models. A protocol-specific
operation is added to encode MIDI messages to the transaction.Signed-off-by: Takashi Sakamoto
Signed-off-by: Takashi Iwai -
…action for MIDI messages
Between former and latter models, destination address to receive
asynchronous transactions for MIDI messages is different.This commit adds model-dependent parameter for the addresses.
Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
Signed-off-by: Takashi Iwai <tiwai@suse.de> -
Fireface UCX transfers asynchronous transactions for MIDI messages.
One transaction includes quadlet data therefore it can transfer 3
message bytes as maximum. Base address of the destination is
configured by two settings; a register for higher 8 byte of the
address, and a bitflag to option register indicates lower 8byte.The register for higher address is 0x'ffff'0000'0034. Unfortunately,
firmware v24 includes a bug to ignore registered value for the
destination address and transfers to 0x0001xxxxxxxx always. This
driver doesn't work well if the bug exists, therefore users should
install the latest firmware (v27).The bitflag is a part of value to be written to option register
(0x'ffff'0000'0014).lower addr: bitflag (little endian)
'0000'0000: 0x00002000
'0000'0080: 0x00004000
'0000'0100: 0x00008000
'0000'0180: 0x00010000This register includes more options but they are not relevant to
packet streaming or MIDI functionality. This driver don't touch it.Furthermore, the transaction is sent to address offset incremented
by 4 byte to the offset in previous time. When it reaches base address
plus 0x7c, next offset is the base address.Content of the transaction includes a prefix byte. Upper 4 bits of
the byte indicates port number, and the rest 4 bits indicate the way
to decode rest of bytes for MIDI message.Except for system exclusive messages, the rest bits are the same as
status bits of the message without channel bits. For system exclusive
messages, the rest bits are encoded according to included message bytes.
For example:message: f0 7e 7f 09 01 f7
offset: content (little endian, port 0)
'0000: 0x04f07e7f
'0004: 0x070901f7message: f0 00 00 66 14 20 00 00 00 f7
offset: content (little endian, port 1)
'0014: 0x14f00000
'0018: 0x14661420
'001c: 0x14000000
'0020: 0x15f70000message: f0 00 00 66 14 20 00 00 f7
offset: content (little endian, port 0)
'0078: 0x04f00000
'007c: 0x04661420
'0000: 0x070000f7This commit supports decoding scheme for the above and allows
applications to receive MIDI messages via ALSA rawmidi interface.
The lower 8 bytes of destination address is fixed to 0x'0000'0000,
thus this driver expects userspace applications to configure option
register with bitflag 0x00002000 in advance.Signed-off-by: Takashi Sakamoto
Signed-off-by: Takashi Iwai -
In Fireface series, drivers can register destination address for
asynchronous transaction which transfers MIDI messages from device.In former models, all of the transactions arrive at the registered
address without any offset. In latter models, each of the transaction
arrives at the registered address with sequential offset within 0x00
to 0x7f. This seems to be for discontinuity detection.This commit adds model-dependent member for the address range.
Signed-off-by: Takashi Sakamoto
Signed-off-by: Takashi Iwai -
In a series of Fireface, devices transfer asynchronous transaction with
MIDI messages. In the transaction, content is different depending on
models. ALSA fireface driver has protocol-dependent handler to pick up
MIDI messages from the content.In latter models of the series, the transaction is transferred to range
of address sequentially. This seems to check continuity of transferred
messages.This commit changes prototype of the handler to receive offset of
address for received transactions.Signed-off-by: Takashi Sakamoto
Signed-off-by: Takashi Iwai
21 Jan, 2019
9 commits
-
Fireface UFX was shipped by RME GmbH in 2012. This model supports later
protocol for management of isochronous communication and synchronization
of sampling transmission frequency.This commit adds support for the model. At present, it's not clear how
to encode MIDI messages and decide destination address for asynchronous
transaction, thus this commit adds support for isochronous communication
for PCM frames only.Signed-off-by: Takashi Sakamoto
Signed-off-by: Takashi Iwai -
A procedure to retrieve clock configuration is used by two callers.
Each of caller has duplicated code to parse bits.This commit adds refactoring to remove the duplicated code.
Signed-off-by: Takashi Sakamoto
Signed-off-by: Takashi Iwai -
This commit adds refactoring for dump of sync status by adding
tables for check bits.Signed-off-by: Takashi Sakamoto
Signed-off-by: Takashi Iwai -
This commit adds a member for a callback function to get clock status
to former protocol.Signed-off-by: Takashi Sakamoto
Signed-off-by: Takashi Iwai -
This commit adds a member for a callback function to switch frame
fetching mode to former protocol.Signed-off-by: Takashi Sakamoto
Signed-off-by: Takashi Iwai -
This commit adds a member for a callback function to dump status and
move existing code to former protocol.Signed-off-by: Takashi Sakamoto
Signed-off-by: Takashi Iwai -
In a series of Fireface, latter protocol has no way for drivers to
retrieve current clock configuration. On the other hand, this driver
has proc node for it.This commit removes a proc node to dump both clock configuration
and synchronization status in one proc node.Signed-off-by: Takashi Sakamoto
Signed-off-by: Takashi Iwai -
This commit moves codes for Fireface 400 to a file of former protocol.
Signed-off-by: Takashi Sakamoto
Signed-off-by: Takashi Iwai -
In a series of Fireface, later model supports different protocol
from former models.This commit is a preparation to support both of protocols.
Signed-off-by: Takashi Sakamoto
Signed-off-by: Takashi Iwai
19 Dec, 2018
1 commit
-
This commit fixes hard-coded model-id for an unit of Apogee Ensemble with
a correct value. This unit uses DM1500 ASIC produced ArchWave AG (formerly
known as BridgeCo AG).I note that this model supports three modes in the number of data channels
in tx/rx streams; 8 ch pairs, 10 ch pairs, 18 ch pairs. The mode is
switched by Vendor-dependent AV/C command, like:$ cd linux-firewire-utils
$ ./firewire-request /dev/fw1 fcp 0x00ff000003dbeb0600000000 (8ch pairs)
$ ./firewire-request /dev/fw1 fcp 0x00ff000003dbeb0601000000 (10ch pairs)
$ ./firewire-request /dev/fw1 fcp 0x00ff000003dbeb0602000000 (18ch pairs)When switching between different mode, the unit disappears from IEEE 1394
bus, then appears on the bus with different combination of stream formats.
In a mode of 18 ch pairs, available sampling rate is up to 96.0 kHz, else
up to 192.0 kHz.$ ./hinawa-config-rom-printer /dev/fw1
{ 'bus-info': { 'adj': False,
'bmc': True,
'chip_ID': 21474898341,
'cmc': True,
'cyc_clk_acc': 100,
'generation': 2,
'imc': True,
'isc': True,
'link_spd': 2,
'max_ROM': 1,
'max_rec': 512,
'name': '1394',
'node_vendor_ID': 987,
'pmc': False},
'root-directory': [ ['HARDWARE_VERSION', 19],
[ 'NODE_CAPABILITIES',
{ 'addressing': {'64': True, 'fix': True, 'prv': False},
'misc': {'int': False, 'ms': False, 'spt': True},
'state': { 'atn': False,
'ded': False,
'drq': True,
'elo': False,
'init': False,
'lst': True,
'off': False},
'testing': {'bas': False, 'ext': False}}],
['VENDOR', 987],
['DESCRIPTOR', 'Apogee Electronics'],
['MODEL', 126702],
['DESCRIPTOR', 'Ensemble'],
['VERSION', 5297],
[ 'UNIT',
[ ['SPECIFIER_ID', 41005],
['VERSION', 65537],
['MODEL', 126702],
['DESCRIPTOR', 'Ensemble']]],
[ 'DEPENDENT_INFO',
[ ['SPECIFIER_ID', 2037],
['VERSION', 1],
[(58, 'IMMEDIATE'), 16777159],
[(59, 'IMMEDIATE'), 1048576],
[(60, 'IMMEDIATE'), 16777159],
[(61, 'IMMEDIATE'), 6291456]]]]}Signed-off-by: Takashi Sakamoto
Signed-off-by: Takashi Iwai
16 Dec, 2018
9 commits
-
As a result of investigation for Fireface 800, 'struct snd_ff_spec.regs'
is just for higher address to receive tx asynchronous packets of MIDI
messages, thus it can be simplified.This commit simplifies it.
Signed-off-by: Takashi Sakamoto
Signed-off-by: Takashi Iwai -
This commit adds a functionality to multiplex PCM frames into isochronous
packets and demultiplex PCM frames from isochronous packets for ALSA PCM
applications.Fireface 800 voluntarily maintains resources for tx isochronous
communication. It performs reservation of isochronous channel and
allocation/update of bandwidth in some cases below:
- at a first request to allocation after bus resets
- at requests to allocation when further bandwidth is requiredWhen request is grant and the unit is prepared, read data from
0x0000801c0008 represents isochronous channel for tx stream, then
the unit can handle requests to start communication. If driver
send the request without checking the register, the unit takes
panic to continue bus resets. The unit starts transmission of
tx packets after receiving several rx packets from driver.I note that the unit can process tx/rx packets and generate/record
sound regardless of HOST LED.Signed-off-by: Takashi Sakamoto
Signed-off-by: Takashi Iwai -
The way to maintain isochronous resources on bus is different between
Fireface 400/800.This commit is a preparation. This commit moves a function to allocate resource to
model-dependent implementation.Signed-off-by: Takashi Sakamoto
Signed-off-by: Takashi Iwai -
Fireface 400/800 use three modes against the number of data channels in
data block for both tx/rx packets.This commit adds refactoring for it. Some enumerators are added to
represent each of mode and a function is added to calculate the mode
from sampling frequency code (sfc).Signed-off-by: Takashi Sakamoto
Signed-off-by: Takashi Iwai -
Both of Fireface 400/800 have the same register to switch frame fetching
mode regardless of difference of available number of PCM frames in
rx isochronous packet.This commit moves a helper function from model-dependent implementation.
Signed-off-by: Takashi Sakamoto
Signed-off-by: Takashi Iwai -
According to my memo at hand and saved records, writing 0x00000001 to
SND_FF_REG_FETCH_PCM_FRAMES disables fetching PCM frames in corresponding
channel, however current implement uses reversed logic. This results in
muted volume in device side during playback.This commit corrects the bug.
Cc: # v4.12+
Fixes: 76fdb3a9e13a ('ALSA: fireface: add support for Fireface 400')
Signed-off-by: Takashi Sakamoto
Signed-off-by: Takashi Iwai -
An initial commit to add tracepoints for packets without CIP headers
uses different print formats for added tracepoints. However this is not
convenient for users/developers to prepare debug tools.This commit uses the same format for the two tracepoints.
Cc: # v4.12+
Fixes: b164d2fd6e49 ('ALSA: firewire_lib: add tracepoints for packets without CIP headers')
Signed-off-by: Takashi Sakamoto
Signed-off-by: Takashi Iwai -
An initial commit to add tracepoints for packets without CIP headers
introduces a wrong assignment to 'data_blocks' value of
'out_packet_without_header' tracepoint.This commit fixes the bug.
Cc: # v4.12+
Fixes: b164d2fd6e49 ('ALSA: firewire_lib: add tracepoints for packets without CIP headers')
Signed-off-by: Takashi Sakamoto
Signed-off-by: Takashi Iwai -
In IEC 61883-1/6 engine of ALSA firewire stack, a packet handler has a
second argument for 'the number of bytes in payload of isochronous
packet'. However, an incoming packet handler without CIP header uses the
value as 'the number of quadlets in the payload'. This brings userspace
applications to receive the number of PCM frames as four times against
real time.This commit fixes the bug.
Cc: # v4.12+
Fixes: 3b196c394dd ('ALSA: firewire-lib: add no-header packet processing')
Signed-off-by: Takashi Sakamoto
Signed-off-by: Takashi Iwai
11 Dec, 2018
5 commits
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Fireface 800 is a flagship model of RME GmbH for audio and music units
on IEEE 1394 bus, shipped 2004. This model consists of four chips:
- TI TSB81BA3D for physical layer on cable environment of EEE 1394 bus
- TI TSB82AA2 for link layer for 1394 OHCI bus bridge to PCI bus
- Xilinx Spartan-3 FPGA XC3S400
- Xilinx High-Performance CPLD XC9572XLThis commit adds support Fireface 800. In this time, the support is
restricted to its MIDI functionality, thus this commit adds some
condition statements to avoid touching streaming functionality.Unlike Fireface 400, Fireface 800 has no functionality to suppress
asynchronous transactions for MIDI messages except for unregister of
listen address in controller side, thus the feature is available as is.Signed-off-by: Takashi Sakamoto
Signed-off-by: Takashi Iwai -
Content of asynchronous transaction for MIDI messages differs between
Fireface 400 and 800.This commit adds a model-specific handler for the transaction and adds
arrangement.Signed-off-by: Takashi Sakamoto
Signed-off-by: Takashi Iwai -
Fireface 400 and 800 have the same mechanism to decide address to which
asynchronous transactions are sent for MIDI messages, however they use
different registers for controllers to notify higher 4 byte of the
address.This commit adds a model-specific parameter to represent the address.
Additionally, it corrects some comments. I note that these two models have
a difference to enable/disable the transaction.Signed-off-by: Takashi Sakamoto
Signed-off-by: Takashi Iwai -
As long as investigating packet dumps from Fireface 400/800, a register
to receive asynchronous transactions for MIDI messages is the same. For
Fireface 800, minor register is used.This commit declares macros for the transactions and obsoletes
model-specific parameters.Signed-off-by: Takashi Sakamoto
Signed-off-by: Takashi Iwai -
Unlike Fireface 400, Fireface 800 have two pair of optical interface
for ADAT signal and S/PDIF signal. ADAT signals for the interface
are handled for sampling clock source separately.This commit modifies a parser for clock configuration to distinguish
these two ADAT signals.Signed-off-by: Takashi Sakamoto
Signed-off-by: Takashi Iwai