08 Oct, 2017

1 commit

  • [ Upstream commit 6205406cf6f282d622f31de25036e6d1ab3a2ff5 ]

    Init field must be cleared in driver probe as this structure is not
    dinamically allocated. If not, wrong flags can be passed to core.

    Signed-off-by: Jose Abreu
    Cc: Carlos Palminha
    Cc: Stephen Boyd
    Cc: Michael Turquette
    Cc: linux-clk@vger.kernel.org
    Cc: linux-kernel@vger.kernel.org
    Fixes: 923587aafc2c ("clk/axs10x: Add I2S PLL clock driver")
    Signed-off-by: Michael Turquette
    Link: lkml.kernel.org/r/040cc9afdfa0e95ce7a01c406ff427ef7dc0c0fd.1481540717.git.joabreu@synopsys.com
    Signed-off-by: Sasha Levin
    Signed-off-by: Greg Kroah-Hartman

    Jose Abreu
     

07 May, 2016

1 commit

  • The ARC SDP I2S clock can be programmed using a
    specific PLL.

    This patch has the goal of adding a clock driver
    that programs this PLL.

    At this moment the rate values are hardcoded in
    a table but in the future it would be ideal to
    use a function which determines the PLL values
    given the desired rate.

    Signed-off-by: Jose Abreu
    Acked-by: Rob Herring
    Signed-off-by: Stephen Boyd

    Jose Abreu