15 Nov, 2005

22 commits

  • I got some questions on this, so just fix up the documentation.

    Signed-off-by: Andi Kleen
    Signed-off-by: Linus Torvalds

    Andi Kleen
     
  • Minor victory on the continuous quest against all stray extern.

    Signed-off-by: Andi Kleen
    Signed-off-by: Linus Torvalds

    Andi Kleen
     
  • Minor cleanup - remove obsolete extern

    Signed-off-by: Andi Kleen
    Signed-off-by: Linus Torvalds

    Andi Kleen
     
  • Adding __initdata_* to asm-generic/sections.h
    Replaces a lot of open coded externs in arch/x86_64/*
    I had to change __bss_end to __bss_stop to match the other architectures.

    Signed-off-by: Andi Kleen
    Signed-off-by: Linus Torvalds

    Andi Kleen
     
  • It is for physical addresses, not for PFNs.

    Pointed out by Tejun Heo.

    Cc: htejun@gmail.com

    Signed-off-by: Andi Kleen
    Signed-off-by: Linus Torvalds

    Andi Kleen
     
  • We should zap the low mappings, as soon as possible, so that we can catch
    kernel bugs more effectively. Previously early boot had NULL mapped
    and didn't trap on NULL references.

    This patch introduces boot_level4_pgt, which will always have low identity
    addresses mapped. Druing boot, all the processors will use this as their
    level4 pgt. On BP, we will switch to init_level4_pgt as soon as we enter C
    code and zap the low mappings as soon as we are done with the usage of
    identity low mapped addresses. On AP's we will zap the low mappings as
    soon as we jump to C code.

    Signed-off-by: Suresh Siddha
    Signed-off-by: Ashok Raj
    Signed-off-by: Andi Kleen
    Signed-off-by: Linus Torvalds

    Siddha, Suresh B
     
  • Not go from the CPU number to an mapping array.
    Mode number is often used now in fast paths.

    This also adds a generic numa_node_id to all the topology includes

    Suggested by Eric Dumazet

    Signed-off-by: Andi Kleen
    Signed-off-by: Linus Torvalds

    Andi Kleen
     
  • Fix

    arch/x86_64/kernel/aperture.c: In function #iommu_hole_init#:
    arch/x86_64/kernel/aperture.c:199: warning: #aper_order# may be used uninitialized in this function

    Signed-off-by: Andi Kleen
    Signed-off-by: Linus Torvalds

    Andi Kleen
     
  • According to cpuid instruction in IA32 SDM-Vol2, when computing cpu model,
    we need to consider extended model ID for family 0x6 also.

    AK: Also added fixes/simplifcation from Petr Vandrovec

    Signed-off-by: Suresh Siddha
    Signed-off-by: Andi Kleen
    Signed-off-by: Linus Torvalds

    Suresh Siddha
     
  • Remove duplicate __cpuinit in smp.c. Already defined in init.h which is
    already included.

    Signed-off-by: Ashok Raj
    Signed-off-by: Andi Kleen
    Signed-off-by: Linus Torvalds

    Ashok Raj
     
  • Signed-off-by: Andi Kleen
    Signed-off-by: Linus Torvalds

    Andi Kleen
     
  • Has been introduced for x86-64 at some point to save memory
    in struct page, but has been obsolete for some time. Just
    remove it.

    Signed-off-by: Andi Kleen
    Signed-off-by: Linus Torvalds

    Andi Kleen
     
  • pfn_to_page really requires pfn_valid to be true now, no question.
    Some people stumbled over it, but it was misleading and wrong.

    Signed-off-by: Andi Kleen
    Signed-off-by: Linus Torvalds

    Andi Kleen
     
  • Here's a patch that builds on Natalie Protasevich's IRQ compression
    patch and tries to work for MPS boots as well as ACPI. It is meant for
    a 4-node IBM x460 NUMA box, which was dying because it had interrupt
    pins with GSI numbers > NR_IRQS and thus overflowed irq_desc.

    The problem is that this system has 270 GSIs (which are 1:1 mapped with
    I/O APIC RTEs) and an 8-node box would have 540. This is much bigger
    than NR_IRQS (224 for both i386 and x86_64). Also, there aren't enough
    vectors to go around. There are about 190 usable vectors, not counting
    the reserved ones and the unused vectors at 0x20 to 0x2F. So, my patch
    attempts to compress the GSI range and share vectors by sharing IRQs.

    Cc: "Protasevich, Natalie"

    Signed-off-by: Andi Kleen
    Signed-off-by: Linus Torvalds

    James Cleverdon
     
  • MC4_MISC - DRAM Errors Threshold Register realized under AMD K8 Rev F.
    This register is used to count correctable and uncorrectable ECC errors that occur during DRAM read operations.
    The user may interface through sysfs files in order to change the threshold configuration.

    bank%d/error_count - reads current error count, write to clear.
    bank%d/interrupt_enable - set/clear interrupt enable.
    bank%d/threshold_limit - read/write the threshold limit.

    APIC vector 0xF9 in hw_irq.h.
    5 software defined bank ids in mce.h.
    new apic.c function to setup threshold apic lvt.
    defaults to interrupt off, count enabled, and threshold limit max.
    sysfs interface created on /sys/devices/system/threshold.

    AK: added some ifdefs to make it compile on UP

    Signed-off-by: Jacob Shin
    Signed-off-by: Andi Kleen
    Signed-off-by: Linus Torvalds

    Jacob Shin
     
  • Signed-off-by: Jan Beulich
    Signed-off-by: Andi Kleen
    Signed-off-by: Linus Torvalds

    Jan Beulich
     
  • The VM needs to know about lost memory in zones to accurately
    balance dirty pages. This patch accounts mem_map in there too,
    which fixes a constant errror of a few percent. Also some
    other misc mappings and the kernel text itself are accounted
    too.

    Signed-off-by: Andi Kleen
    Signed-off-by: Linus Torvalds

    Andi Kleen
     
  • Signed-off-by: Andi Kleen
    Signed-off-by: Linus Torvalds

    Andi Kleen
     
  • The code should deal with an additional empty zone, so fix up the
    #error.

    Signed-off-by: Andi Kleen
    Signed-off-by: Linus Torvalds

    Andi Kleen
     
  • IA64 traditionally had a 4GB DMA32 zone. Set the compatibility flag
    to keep old drivers working.

    For new drivers it would be better to use ZONE_DMA32 now.

    Cc: tony.luck@intel.com
    Signed-off-by: Andi Kleen
    Signed-off-by: Linus Torvalds

    Andi Kleen
     
  • Add a new 4GB GFP_DMA32 zone between the GFP_DMA and GFP_NORMAL zones.

    As a bit of historical background: when the x86-64 port
    was originally designed we had some discussion if we should
    use a 16MB DMA zone like i386 or a 4GB DMA zone like IA64 or
    both. Both was ruled out at this point because it was in early
    2.4 when VM is still quite shakey and had bad troubles even
    dealing with one DMA zone. We settled on the 16MB DMA zone mainly
    because we worried about older soundcards and the floppy.

    But this has always caused problems since then because
    device drivers had trouble getting enough DMA able memory. These days
    the VM works much better and the wide use of NUMA has proven
    it can deal with many zones successfully.

    So this patch adds both zones.

    This helps drivers who need a lot of memory below 4GB because
    their hardware is not accessing more (graphic drivers - proprietary
    and free ones, video frame buffer drivers, sound drivers etc.).
    Previously they could only use IOMMU+16MB GFP_DMA, which
    was not enough memory.

    Another common problem is that hardware who has full memory
    addressing for >4GB misses it for some control structures in memory
    (like transmit rings or other metadata). They tended to allocate memory
    in the 16MB GFP_DMA or the IOMMU/swiotlb then using pci_alloc_consistent,
    but that can tie up a lot of precious 16MB GFPDMA/IOMMU/swiotlb memory
    (even on AMD systems the IOMMU tends to be quite small) especially if you have
    many devices. With the new zone pci_alloc_consistent can just put
    this stuff into memory below 4GB which works better.

    One argument was still if the zone should be 4GB or 2GB. The main
    motivation for 2GB would be an unnamed not so unpopular hardware
    raid controller (mostly found in older machines from a particular four letter
    company) who has a strange 2GB restriction in firmware. But
    that one works ok with swiotlb/IOMMU anyways, so it doesn't really
    need GFP_DMA32. I chose 4GB to be compatible with IA64 and because
    it seems to be the most common restriction.

    The new zone is so far added only for x86-64.

    For other architectures who don't set up this
    new zone nothing changes. Architectures can set a compatibility
    define in Kconfig CONFIG_DMA_IS_DMA32 that will define GFP_DMA32
    as GFP_DMA. Otherwise it's a nop because on 32bit architectures
    it's normally not needed because GFP_NORMAL (=0) is DMA able
    enough.

    One problem is still that GFP_DMA means different things on different
    architectures. e.g. some drivers used to have #ifdef ia64 use GFP_DMA
    (trusting it to be 4GB) #elif __x86_64__ (use other hacks like
    the swiotlb because 16MB is not enough) ... . This was quite
    ugly and is now obsolete.

    These should be now converted to use GFP_DMA32 unconditionally. I haven't done
    this yet. Or best only use pci_alloc_consistent/dma_alloc_coherent
    which will use GFP_DMA32 transparently.

    Signed-off-by: Andi Kleen
    Signed-off-by: Linus Torvalds

    Andi Kleen
     
  • Rerun and enable autofs 4, relayfs and softdog

    Signed-off-by: Andi Kleen
    Signed-off-by: Linus Torvalds

    Andi Kleen
     

05 Nov, 2005

18 commits