24 Feb, 2011

1 commit

  • In commit e616c591405c168f6dc3dfd1221e105adfe49b8d, highmem support was
    deactivated for SMP platforms without hardware TLB ops broadcast because
    usage of kmap_high_get() requires that IRQs be disabled when kmap_lock
    is locked which is incompatible with the IPI mechanism used by the
    software TLB ops broadcast invoked through flush_all_zero_pkmaps().

    The reason for kmap_high_get() is to ensure that the currently kmap'd
    page usage count does not decrease to zero while we're using its
    existing virtual mapping in an atomic context. With a VIVT cache this
    is essential to do due to cache coherency issues, but with a VIPT cache
    this is only an optimization so not to pay the price of establishing a
    second mapping if an existing one can be used. However, on VIPT
    platforms without hardware TLB maintenance we can give up on that
    optimization in order to be able to use highmem.

    From ARMv7 onwards the TLB ops are broadcasted in hardware, so let's
    disable ARCH_NEEDS_KMAP_HIGH_GET only when CONFIG_SMP and
    CONFIG_CPU_TLB_V6 are defined.

    Signed-off-by: Nicolas Pitre
    Tested-by: Saeed Bishara
    Signed-off-by: Russell King

    Nicolas Pitre
     

07 Jan, 2011

1 commit


22 Dec, 2010

3 commits


27 Nov, 2010

2 commits


04 Nov, 2010

1 commit

  • This patch removes the domain switching functionality via the set_fs and
    __switch_to functions on cores that have a TLS register.

    Currently, the ioremap and vmalloc areas share the same level 1 page
    tables and therefore have the same domain (DOMAIN_KERNEL). When the
    kernel domain is modified from Client to Manager (via the __set_fs or in
    the __switch_to function), the XN (eXecute Never) bit is overridden and
    newer CPUs can speculatively prefetch the ioremap'ed memory.

    Linux performs the kernel domain switching to allow user-specific
    functions (copy_to/from_user, get/put_user etc.) to access kernel
    memory. In order for these functions to work with the kernel domain set
    to Client, the patch modifies the LDRT/STRT and related instructions to
    the LDR/STR ones.

    The user pages access rights are also modified for kernel read-only
    access rather than read/write so that the copy-on-write mechanism still
    works. CPU_USE_DOMAINS gets disabled only if the hardware has a TLS register
    (CPU_32v6K is defined) since writing the TLS value to the high vectors page
    isn't possible.

    The user addresses passed to the kernel are checked by the access_ok()
    function so that they do not point to the kernel space.

    Tested-by: Anton Vorontsov
    Cc: Tony Lindgren
    Signed-off-by: Catalin Marinas
    Signed-off-by: Russell King

    Catalin Marinas
     

28 Oct, 2010

4 commits

  • Use memblock information to setup lowmem mappings rather than the
    membank array.

    This allows platforms to manipulate the memblock information during
    initialization to reserve (and remove) memory from the kernel's view
    of memory - and thus allowing platforms to setup their own private
    mappings for this memory without causing problems with multiple
    aliasing mappings:

    size = min(size, SZ_2M);
    base = memblock_alloc(size, min(align, SZ_2M));
    memblock_free(base, size);
    memblock_remove(base, size);

    This is needed because multiple mappings of regions with differing
    attributes (sharability, type, cache) are not permitted with ARMv6
    and above.

    Signed-off-by: Russell King

    Russell King
     
  • This was missing from the noMMU code, so there was the possibility
    of things not working as expected if out of order memory information
    was passed.

    Signed-off-by: Russell King

    Russell King
     
  • Will says:
    | Commit e63075a3 removed the explicit MEMBLOCK_REAL_LIMIT #define
    | and introduced the requirement that arch code calls
    | memblock_set_current_limit to ensure that the __va macro can
    | be used on physical addresses returned from memblock_alloc.

    Unfortunately, ARM was missed out of this change. Fix this.

    Reported-by: Will Deacon
    Signed-off-by: Russell King

    Russell King
     
  • After Santosh's fixup of the generic MT_MEMORY and
    MT_MEMORY_NONCACHED I add this fix to the TCM memory types.
    The main change is that the ITCM memory is L_PTE_WRITE and
    DOMAIN_KERNEL which works just fine. The changed to the DTCM
    is just cosmetic to fit with surrounding code.

    Cc: Santosh Shilimkar
    Cc: Rickard Andersson
    Signed-off-by: Linus Walleij
    Signed-off-by: Russell King

    Linus Walleij
     

20 Oct, 2010

1 commit


05 Oct, 2010

2 commits

  • UP systems do not implement all the instructions that SMP systems have,
    so in order to boot a SMP kernel on a UP system, we need to rewrite
    parts of the kernel.

    Do this using an 'alternatives' scheme, where the kernel code and data
    is modified prior to initialization to replace the SMP instructions,
    thereby rendering the problematical code ineffectual. We use the linker
    to generate a list of 32-bit word locations and their replacement values,
    and run through these replacements when we detect a UP system.

    Signed-off-by: Russell King

    Russell King
     
  • The commit f1a2481c0 sets up the default flags for MT_MEMORY and
    MT_MEMORY_NONCACHED memory types. L_PTE_USER flag is wrongly
    set as default for these entries so remove it. Also adding
    the 'L_PTE_WRITE' flag so that these pages become read-write
    instead of just being read-only

    [this stops them being exposed to userspace, which is the main
    concern here --rmk]

    Reported-by: Catalin Marinas
    Signed-off-by: Santosh Shilimkar
    Acked-by: Catalin Marinas
    Signed-off-by: Russell King

    Santosh Shilimkar
     

25 Sep, 2010

1 commit

  • This patch populates the L1 entries for MT_MEMORY and MT_MEMORY_NONCACHED
    types so that at boot-up, we can map memories outside system memory
    at page level granularity

    Previously the mapping was limiting to section level, which creates
    unnecessary additional mapping for which physical memory may not
    present. On the newer ARM with speculation, this is dangerous and can
    result in untraceable aborts.

    Signed-off-by: Santosh Shilimkar
    Signed-off-by: Russell King

    Santosh Shilimkar
     

19 Sep, 2010

1 commit

  • ARMv7 onwards requires that there are no aliases to the same physical
    location using different memory types (i.e. Normal vs Strongly Ordered).
    Access to SO mappings when the unaligned accesses are handled in
    hardware is also Unpredictable (pgprot_noncached() mappings in user
    space).

    The /dev/mem driver requires uncached mappings with O_SYNC. The patch
    implements the phys_mem_access_prot() function which generates Strongly
    Ordered memory attributes if !pfn_valid() (independent of O_SYNC) and
    Normal Noncacheable (writecombine) if O_SYNC.

    Signed-off-by: Catalin Marinas
    Signed-off-by: Russell King

    Catalin Marinas
     

31 Jul, 2010

1 commit


27 Jul, 2010

3 commits


19 Jul, 2010

1 commit

  • The earlier TCM memory regions were mapped as MT_MEMORY_UNCACHED
    which doesn't really work on platforms supporting the new v6
    features like the NX bit. Add unique MT_MEMORY_[I|D]TCM types
    instead.

    Cc: Nicolas Pitre
    Signed-off-by: Linus Walleij
    Signed-off-by: Russell King

    Linus Walleij
     

16 Jul, 2010

4 commits


20 May, 2010

1 commit

  • * 'for-linus/samsung4' of git://git.fluff.org/bjdooks/linux: (98 commits)
    Input: s3c24xx_ts - depend on SAMSUNG_DEV_TS and update menu entry
    Input: s3c24xx_ts - Add FEAT for Samsung touchscreen support
    Input: s3c24xx_ts - Implement generic GPIO configuration callback
    ARM: SAMSUNG: Move s3c64xx dev-ts.c to plat-samsung and rename configuration
    ARM: SAMSUNG: Implements cfg_gpio function for Samsung touchscreen
    ARM: S3C64XX: Add touchscreen platform device definition
    ARM: SAMSUNG: Move mach/ts.h to plat/ts.h
    ARM: S5PC100: Move i2c helpers from plat-s5pc1xx to mach-s5pc100
    ARM: S5PC100: Move frame buffer helpers from plat-s5pc1xx to mach-s5pc100
    ARM: S5PC100: gpio.h cleanup
    ARM: S5PC100: Move gpio support from plat-s5pc1xx to mach-s5pc100
    ARM: S5PC100: Use common functions for gpiolib implementation
    drivers: serial: S5PC100 serial driver cleanup
    ARM: S5PC100: Pre-requisite clock patch for plat-s5pc1xx to plat-s5p move
    ARM: SAMSUNG: Copy common I2C0 device helpers to machine directories
    ARM: SAMSUNG: move driver strength gpio configuration helper to common dir
    ARM: S5PV210: Add GPIOlib support
    ARM: SAMSUNGy: fix broken timer irq base
    ARM: SMDK6440: Add audio devices on board
    ARM: S5P6440: Add audio platform devices
    ...

    Linus Torvalds
     

18 May, 2010

1 commit


15 May, 2010

2 commits


12 May, 2010

1 commit


14 Apr, 2010

1 commit


09 Apr, 2010

1 commit


26 Feb, 2010

1 commit


16 Feb, 2010

1 commit

  • The ARM setup code includes its own parser for early params, there's
    also one in the generic init code.

    This patch removes __early_init (and related code) from
    arch/arm/kernel/setup.c, and changes users to the generic early_init
    macro instead.

    The generic macro takes a char * argument, rather than char **, so we
    need to update the parser functions a little.

    Signed-off-by: Jeremy Kerr
    Signed-off-by: Russell King

    Jeremy Kerr
     

20 Jan, 2010

1 commit


24 Dec, 2009

1 commit

  • PAGE_KERNEL should not be executable; any area marked executable can
    be prefetched into the instruction cache. We don't want vmalloc areas
    to be read in this way.

    Signed-off-by: Russell King

    Russell King
     

05 Dec, 2009

1 commit


02 Dec, 2009

1 commit


01 Dec, 2009

1 commit