12 Feb, 2018
1 commit
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Convert to generalized SPI controller API introduced by the
commit 8caab75fd2c2 ("spi: Generalize SPI "master" to "controller"").
Inside driver variable name "master" is still used to indicate the driver
is master only.Signed-off-by: Jarkko Nikula
Signed-off-by: Mark Brown
04 Jan, 2017
1 commit
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The commit a3ff9582369e ("spi: dw-mid: switch to new dmaengine_terminate_*
API") converted mid_spi_dma_exit() but missed mid_spi_dma_stop().This is follow up to convert the rest.
Fixes: a3ff9582369e ("spi: dw-mid: switch to new dmaengine_terminate_* API")
Signed-off-by: Andy Shevchenko
Signed-off-by: Mark Brown
06 Feb, 2016
1 commit
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Convert dmaengine_terminate_all() calls to synchronous versions.
Signed-off-by: Andy Shevchenko
Signed-off-by: Mark Brown
30 Nov, 2015
1 commit
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The dw_spi_dma_ops structure is never modified, so declare it as const.
Done with the help of Coccinelle.
Signed-off-by: Julia Lawall
Acked-by: Andy Shevchenko
Signed-off-by: Mark Brown
17 Mar, 2015
1 commit
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Altera's Arria10 SoC interconnect requires a 32-bit write for APB
peripherals. The current spi-dw driver uses 16-bit accesses in
some locations. This patch converts all the 16-bit reads and
writes to 32-bit reads and writes.Additional Documentation to Support this Change:
The DW_apb_ssi databook states:
"All registers in the DW_apb_ssi are addressed at 32-bit boundaries
to remain consistent with the AHB bus. Where the physical size of
any register is less than 32-bits wide, the upper unused bits of
the 32-bit boundary are reserved. Writing to these bits has no
effect; reading from these bits returns 0." [1][1] Section 6.1 of dw_apb_ssi.pdf (version 3.22a)
Request for test with platforms using the DesignWare SPI IP.
Tested On:
Altera CycloneV development kit
Altera Arria10 development kit
Compile tested for build errors on x86_64 (allyesconfigs)Signed-off-by: Thor Thayer
Reviewed-and-tested-by: Andy Shevchenko
Signed-off-by: Mark Brown
10 Mar, 2015
7 commits
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intel_mid_dma seems to be unmaintained for a long time. Moreover, the IP block
of DMA itself is the same in both dw_dmac and intel_mid_dma. This patch moves
spi-dw-midpci to use dw_dmac driver.Signed-off-by: Andy Shevchenko
Signed-off-by: Mark Brown -
SPI core has a comprehensive function set to map and unmap a message when it's
needed. This patch converts driver to use that advantage.Signed-off-by: Andy Shevchenko
Signed-off-by: Mark Brown -
This patch shuts up any ongoing DMA transfer in case of error.
Signed-off-by: Andy Shevchenko
Signed-off-by: Mark Brown -
In according to documentation SPI in DMA mode may encounter underrun/overrun
failures in rare cases. When such failure occurs, an error recovery protocol is
expected to be implemented in the device driver so that the failed transaction
can be restarted.This patch enables FIFO overrun / underrun interrupts in DMA case and adds a
handler for that.Signed-off-by: Andy Shevchenko
Signed-off-by: Mark Brown -
The patch splits DMA preparatory code to dma_setup() callback. The change also
converts transfer_one() to program DMA whenever the transfer is DMA mapped. The
change is a follow up of the converion to use SPI core transfer_one_message().
Since the DMA mapped transfers can be interleaved with PIO ones the DMA related
configuration should respect that.Signed-off-by: Andy Shevchenko
Signed-off-by: Mark Brown -
DMAEngine has a specific type to be used for bus width. This patch converts the
code to use the values of the specific type when configure DMA transfer.Signed-off-by: Andy Shevchenko
Signed-off-by: Mark Brown
07 Mar, 2015
2 commits
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The logic of DMA completion is broken now since test_and_clear_bit() never
returns the other bit is set. It means condition are always false and we have
spi_finalize_current_transfer() called per each DMA completion which is wrong.The patch fixes logic by clearing BUSY bit first and then check for the other
one.Fixes: 30c8eb52cc4a (spi: dw-mid: split rx and tx callbacks when DMA)
Signed-off-by: Andy Shevchenko
Signed-off-by: Mark Brown
Cc: stable@vger.kernel.org -
This patch removes a lot of duplicate code since SPI core provides a nice
message handling.Signed-off-by: Andy Shevchenko
Signed-off-by: Mark Brown
06 Mar, 2015
1 commit
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When DMA descriptor allocation fails we should not try to assign any fields in
the bad descriptor. The patch adds the necessary checks for that.Fixes: 7063c0d942a1 (spi/dw_spi: add DMA support)
Signed-off-by: Andy Shevchenko
Signed-off-by: Mark Brown
Cc: stable@vger.kernel.org
27 Jan, 2015
1 commit
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The clock information is being kept in the custom register on Intel MID
platforms. Each controller has its own dedicated custom register for that.
Thus, to get a proper frequency we have to read value from the specific offset
to the register block. This patch makes this happen.Fixes: d58cf5ff6500 (spi: dw-pci: describe Intel MID controllers better)
Signed-off-by: Andy Shevchenko
Signed-off-by: Mark Brown
08 Jan, 2015
1 commit
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There are more that one SPI controller on the Intel MID boards. This patch
describes the status and IDs of them. From now on we also have to care about
bus number that must be unique per host.According to the specification the SPI1 has 5 bits for chip selects and SPI2
only 2 bits. The patch makes it depend to PCI ID.The first controller (SPI1) is DMA capable, meanwhile SPI2 can share same
channels (via software switch) such functionality is not in the scope of this
patch. Thus, attempt to init DMA for SPI2 will always fail for now.Signed-off-by: Andy Shevchenko
Signed-off-by: Mark Brown
06 Jan, 2015
1 commit
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The FIFO size is 40 accordingly to the specifications, but this means 0x40,
i.e. 64 bytes. This patch fixes the typo and enables FIFO size autodetection
for Intel MID devices.Fixes: 7063c0d942a1 (spi/dw_spi: add DMA support)
Signed-off-by: Andy Shevchenko
Signed-off-by: Mark Brown
Cc: stable@vger.kernel.org
29 Oct, 2014
2 commits
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Currently driver wouldn't work properly if user asked for simplex transfer. The
patch separates DMA rx and tx callbacks and finishes transfer correctly in any
case.Signed-off-by: Andy Shevchenko
Signed-off-by: Mark Brown -
This patch splits few helpers, namely dw_spi_dma_prepare_rx(),
dw_spi_dma_prepare_tx(), and dw_spi_dma_setup() which will be useful for the
consequent improvements.There is no functional change.
Signed-off-by: Andy Shevchenko
Signed-off-by: Mark Brown
03 Oct, 2014
3 commits
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Though intel-mid-dma does not follow a new DMA workflow (*) let's prepare SPI
DW driver for that.(*) The client is obliged to call dma_async_issue_pending() which starts the
actual transfers. Old DMA drivers do not follow this, since requirement was
introduced in the discussion of [1].[1] http://www.spinics.net/lists/arm-kernel/msg125987.html
Signed-off-by: Andy Shevchenko
Signed-off-by: Mark Brown -
Instead of direct dereference to dmaengine callbacks we are going to use
DMAengine wrappers.Signed-off-by: Andy Shevchenko
Signed-off-by: Mark Brown -
Instead of using magic numbers in the code we create a bit map definition of
the DMACR register and use it.There is no functional change.
Signed-off-by: Andy Shevchenko
Signed-off-by: Mark Brown
24 Sep, 2014
2 commits
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Do full clean up at exit, means terminate all ongoing DMA transfers.
Signed-off-by: Andy Shevchenko
Signed-off-by: Mark Brown
Cc: stable@vger.kernel.org -
In case of 8 bit mode and DMA usage we end up with every second byte written as
0. We have to respect bits_per_word settings what this patch actually does.Signed-off-by: Andy Shevchenko
Signed-off-by: Mark Brown
Cc: stable@vger.kernel.org
14 Sep, 2014
4 commits
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The FSF address is subject to change, thus remove it from the file. While here,
update a copyright line.Signed-off-by: Andy Shevchenko
Signed-off-by: Mark Brown -
Instead of using that member we prefer to use dma_dev which represents actual
struct device of the DMA device.Signed-off-by: Andy Shevchenko
Signed-off-by: Mark Brown -
The support of the Moorestown was removed [1] from kernel long time ago. This
is just a follow up of that change.[1] http://www.spinics.net/lists/platform-driver-x86/msg02948.html
Signed-off-by: Andy Shevchenko
Signed-off-by: Mark Brown -
If the driver was compiled with DMA support, but DMA channels weren't acquired
by some reason, mid_spi_dma_exit() will crash the kernel.Fixes: 7063c0d942a1 (spi/dw_spi: add DMA support)
Signed-off-by: Andy Shevchenko
Signed-off-by: Mark Brown
15 Nov, 2013
1 commit
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Remove no longer needed DMA unmap flags:
- DMA_COMPL_SKIP_SRC_UNMAP
- DMA_COMPL_SKIP_DEST_UNMAP
- DMA_COMPL_SRC_UNMAP_SINGLE
- DMA_COMPL_DEST_UNMAP_SINGLECc: Vinod Koul
Cc: Tomasz Figa
Cc: Dave Jiang
Signed-off-by: Bartlomiej Zolnierkiewicz
Signed-off-by: Kyungmin Park
Acked-by: Jon Mason
Acked-by: Mark Brown
[djbw: clean up straggling skip unmap flags in ntb]
Signed-off-by: Dan Williams
21 Mar, 2012
1 commit
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Add inline wrappers for device_prep_slave_sg() and device_prep_dma_cyclic()
interfaces to hide new parameter from current users of affected interfaces.
Convert current users to use new wrappers instead of direct calls.
Suggested by Russell King [https://lkml.org/lkml/2012/2/3/269].Signed-off-by: Alexandre Bounine
Signed-off-by: Vinod Koul
22 Feb, 2012
1 commit
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.device_fc is added in struct dma_slave_config recently. All user drivers, which
want DMA to be the flow controller must pass this field as false. As earlier
driver don't look to use this feature, mark it false for now.Signed-off-by: Viresh Kumar
Acked-by: Linus Walleij
Signed-off-by: Vinod Koul
17 Nov, 2011
1 commit
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resolved conflicts:
drivers/media/video/mx3_camera.c
31 Oct, 2011
1 commit
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fixup usage of dma direction by introducing dma_transfer_direction,
this patch moves spi, serial drivers to use new enumSigned-off-by: Vinod Koul
Cc: Grant Likely
Cc: Alan Cox
Acked-by: Mika Westerberg
21 Sep, 2011
1 commit
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The dw_{read,write}[lw] macros produce sparse warnings everytime they
are used. The "read" ones cause:warning: cast removes address space of expression
warning: incorrect type in argument 1 (different address spaces)
expected void const volatile [noderef] *addr
got unsigned int *And the "write" ones:
warning: cast removes address space of expression
warning: incorrect type in argument 2 (different address spaces)
expected void volatile [noderef] *addr
got unsigned int *Fix this by removing struct dw_spi_reg and converting all the register
offsets to #defines. Then convert the macros into inlined functions so
that proper type checking can occur.While here, also fix the three sparse warnings in spi-dw-mid.c due to
the return value of ioremap_nocache being stored in a u32 * not a
void __iomem *.With these changes the spi-dw* files all build with no sparse warnings.
Signed-off-by: H Hartley Sweeten
Acked-by: Feng Tang
Signed-off-by: Grant Likely
06 Jun, 2011
1 commit
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Sort the SPI makefile and enforce the naming convention spi_*.c for
spi drivers.This change also rolls the contents of atmel_spi.h into the .c file
since there is only one user of that particular include file.v2: - Use 'spi-' prefix instead of 'spi_' to match what seems to be
be the predominant pattern for subsystem prefixes.
- Clean up filenames in Kconfig and header comment blocksSigned-off-by: Grant Likely
Acked-by: Wolfram Sang
Acked-by: Linus Walleij
