21 Mar, 2018
40 commits
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register rpmsg codec after the rpmsg-audio-channel is
ready.Signed-off-by: Shengjiu Wang
Reviewed-by: Daniel Baluta -
This codec is accessed by rpmsg. As the wm8960 is controlled
mainly by M4, so we only add volume in this rpmsg_wm8960 codec.Signed-off-by: Shengjiu Wang
Reviewed-by: Daniel Baluta -
rpmsg provide command for A7 side to set the codec value and get
codec value by i2c. In this case, the A7 can control the codec.Signed-off-by: Shengjiu Wang
Reviewed-by: Daniel Baluta -
This is dts is for demo SAI + codec in A7 domain, which need to
do i2c hardware rework, connect the wm8960 to i2c7.
for this is for demo usage, so don't need the headphone plug/unplug
event, so remove the iomux for this case.Signed-off-by: Shengjiu Wang
Reviewed-by: Daniel Baluta -
ULP B0 integrate the latest SAI IP, there is version id and
parameter id register in the beginning, so update the offset
for ULP B0Signed-off-by: Shengjiu Wang
Reviewed-by: Daniel Baluta -
Syncs with the following change in scfw.
Author: Chuck Cannon
Date: Mon Mar 5 07:44:27 2018 -0600SCF-22: Move SCU controls to SYSTEM. Allows AP to use SCU temp
sensor.BuildInfo:
- SCFW e56d4c0a, IMX-MKIMAGE d4e440b2, ATF 4af5ca0
- U-Boot 2017.03-imx_v2017.03_4.9.51_imx8_beta2+gf195c38Tested-by: Anson Huang
Reviewed-by: Nitin Garg
Signed-off-by: Adriana Reus -
The following commit:
af01350 - MLK-17634-18: drm: imx: dcss: optimize context loading and DDR
bus loadintroduced a regression. During my attempts to fix various green screen
issues, I modified the DTRC start routine by enabling the other register
bank, not the current one.Unfortunately, this was committed by mistake...
Signed-off-by: Laurentiu Palcu
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HDR metadata infoframe was sent only when doing a mode set. However,
kmssink is using the same device as Weston and mode setting messes up
with Weston's plane state.This patch allows for the HDR metadata to be sent out to the sink when
the property is set. Hence, no need for a mode set.Also, the older functionality allowed only for 4K@60 to be used for HDR.
However, HDR is not about resolution. This patch will also allow to go
to HDR mode in other resolutions as well.Signed-off-by: Laurentiu Palcu
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Since DCSS was moved to use VIDEO2_PLL clock, HDMI phy clock is not used
anymore. Hence, this delay here is not necessary. It's been added inside
DCSS driver.Signed-off-by: Laurentiu Palcu
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DCSS needs some time to stabilize after switching to a new pixel clock.
All interrupts will delayed till the clock stabilizes and we'll end up
getting warnings about VBLANK interrupt taking more than 50ms to arrive.This patch adds a 500ms delay after switching to a new clock. This will
allow DCSS to stabilize before enabling CRTC and DTG channels.Signed-off-by: Laurentiu Palcu
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Currently, the default clock configuration for DCSS configures the pixel
clock to be sourced from VIDEO_PLL2, but this source cannot be used by
the DSI PHY_REF clock.
So, in order to make DCSS working with DSI, we need to have them both
(DCSS and DSI PHY) use the same clock source: VIDEO_PLL1.Signed-off-by: Robert Chiras
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Fix the clock source selection for MIPI use-case.
Signed-off-by: Robert Chiras
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Enable CCI400 PMU config
Signed-off-by: Frank Li
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perf list
CCI_400_r1/cycles/ [Kernel PMU event]
CCI_400_r1/mi_retry_speculative_fetch,source=?/ [Kernel PMU event]
CCI_400_r1/mi_rrq_stall_barrier_hazard,source=?/ [Kernel PMU event]
CCI_400_r1/mi_rrq_stall_hi_prio_rtq_full,source=?/ [Kernel PMU event]
CCI_400_r1/mi_rrq_stall_low_prio_rtq_full,source=?/ [Kernel PMU event]
CCI_400_r1/mi_rrq_stall_master_id_hazard,source=?/ [Kernel PMU event]
CCI_400_r1/mi_rrq_stall_mid_prio_rtq_full,source=?/ [Kernel PMU event]
CCI_400_r1/mi_rrq_stall_qvn_vn0,source=?/ [Kernel PMU event]
CCI_400_r1/mi_rrq_stall_qvn_vn1,source=?/ [Kernel PMU event]
CCI_400_r1/mi_rrq_stall_qvn_vn2,source=?/ [Kernel PMU event]
CCI_400_r1/mi_rrq_stall_qvn_vn3,source=?/ [Kernel PMU event]Signed-off-by: Frank Li
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The resources for a plane group are shared by the two display streams
of one DPU. Thus, the two Framegen(fg) instances of one DPU should be
in the plane group resource. The resource users may find the fg instance
onto which the resources are built via the stream id. This patch corrects
the number of fg instances in a plane group resource from one to two.Signed-off-by: Liu Ying
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With the current multipliers SAI isn't able to derive a correct bitclk.
e.g: When playing at 786Khz with current multiplier
MCLK = 22579200, requested freq 22579200 but SAI wants:
MCLK = (DIV + 1) * 2 * freq [SAI TCR2], so an acceptable solution
is to add a 2x factor to mclk.Signed-off-by: Viorel Suman
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Since f7b48681ec68 ("MLK-16137 video: fbdev: add defer probe for mxs framebuffer")
the mxsfb_dispdrv_init function will return -EPROBE_DEFER on all
mxc_dispdrv_gethandle failures. That makes sense because all
mxc_dispdrv_entry are registered in their respective probe functions and
an absent entry should result in probing mxsfb later.However in some cases an the disp_dev is empty and those configurations
now result in enless EPROBE_DEFER loops. Fix this by accepting empty
disp_dev at the start of mxsfb_dispdrv_init.Signed-off-by: Leonard Crestez
Reviewed-by: Robert Chiras -
This is a large leak and repeated probing can even exhaust CMA
Signed-off-by: Leonard Crestez
Reviewed-by: Robert Chiras -
The MU works just fine without interrupts because sc_call_rpc will poll
waiting for a response. Make this explicit because it allows easier
emulation for virtualization.The request_irq error is just reported but doesn't fail the probe,
however failing to set that irq as a wake source is fatal.This was introduced recently:
commit 3b20aa779f33 ("MLK-17072-1: soc: imx: sc: ipc: enable MU
interrupt as wakeup source")Signed-off-by: Leonard Crestez
Acked-by: Peng Fan -
Since the ADV7535 address for DSI-CEC can be configured from DTS file,
update the ADV7535 specific files in order to remove the disabling
camera node and update the ADV7535 node to use a different i2c address.
Currently 0x3c was used, conflicting with camera. Now, program ADV7535
to use 0x3b for the DSI-CEC memory map.Signed-off-by: Robert Chiras
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The DSI-HDMI converter, ADV7535, driver uses four i2c memory maps: MAIN,
DSI-CEC, EDID and PACKET.
While the MAIN address is hard-coded in the ROM chip, the other three
can be programmed into the MAIN memory map.
Currently, the three memory maps addresses, that can be programmed, are
hard-coded into the code.
In order to avoid conflicts with other i2c clients on the bus, update
the driver to use configurable addresses specified in DTS file.Signed-off-by: Robert Chiras
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Upstream reports below race condition:
When device boots with T > T_trip_1 and requests interrupt,
the race condition takes place. The interrupt comes before
THERMAL_DEVICE_ENABLED is set. This leads to an attempt to
reading sensor value from irq and disabling the sensor,
based on the data->mode field, which expected to be
THERMAL_DEVICE_ENABLED, but still stays as THERMAL_DEVICE_DISABLED.
Afher this issue sensor is never re-enabled, as the driver state is wrong.Fix this problem by setting the 'data' members prior to requesting
the interrupts.Signed-off-by: Mikhail Lappo
Signed-off-by: Fabio Estevam
Signed-off-by: Anson Huang
Reviewed-by: Bai Ping -
We don't want fbcon to get used on non-desktop dislays,
don't pass them as enabled connectors to the fb helper setup.This prevents my HMD from getting disorted fbcon, and from
affecting other displays console.v2: Change description from non-standard to non-desktop
Reviewed-by: Keith Packard
Signed-off-by: Dave Airlie
Signed-off-by: Marius Vlad(cherry-picked b5f053882ff19a8ce from git://people.freedesktop.org/~airlied/linux)
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This adds the infrastructure needed to quirk displays
using edid and to mark them a non-desktop.A non-desktop display is one which shouldn't normally be included
as a part of a desktop environment.This is meant to cover head mounted devices like HTC Vive.
v2: Change description from non-standard to non-desktop, add docs
Reviewed-by: Keith Packard
Signed-off-by: Dave Airlie
Signed-off-by: Marius Vlad(Ported 66660d4cf21b7dfcb25 from git://people.freedesktop.org/~airlied/linux)
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enable spdif rx for HDMI ARC
Signed-off-by: Shengjiu Wang
Reviewed-by: Daniel Baluta -
Define __ARC_CONFIG__ to enable HDMI ARC
Signed-off-by: Shengjiu Wang
Reviewed-by: Sandor Yu -
The problem arised because of a combination of 2 commits:
Commit 1:
"2a70f32 - MLK-17232-2: drm: imx: dcss: ignore SB_PEND_DISP_ACTIVE
interrupt"disabled the SB_PEND_DISP_ACTIVE interrupt because of a problem in SOC.
However, it did not remove the flag from CTXLD_IRQ_ERROR macro.Commit 2:
"f0e3911 - MLK-17459-1: drm: imx: dcss: change ctxld irq handling"
moved the bottom half interrupt handling to top half. By doing that, the
top half did not exit immediately if IRQ_COMPLETION condition was met
and continued evaluating if any interrupts in CTXLD_IRQ_ERROR flags
were triggered.This patch removes SB_PEND_DISP_ACTIVE interrupt flag from
CTXLD_IRQ_ERROR macro.Signed-off-by: Laurentiu Palcu
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Signed-off-by: Laurentiu Palcu
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This will lower the amount of ctxld entries sent, if configuration has
not changed much. Also, disable channel 0 if alpha is 0 and global alpha
is used. This will lower the DDR load, depending on graphics channel
resolution.Signed-off-by: Laurentiu Palcu
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Signed-off-by: Laurentiu Palcu
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Signed-off-by: Laurentiu Palcu
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Signed-off-by: Laurentiu Palcu
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This patch adds basic HDR10 support. However, full support depends on
subsequent patches.Signed-off-by: Laurentiu Palcu
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The tables header is no longer necessary as dcss.fw file will be used
from now on to store LUT and CSC tables.Signed-off-by: Laurentiu Palcu
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If the HDR metadata proprety is set, then the metadata will be sent
to the sink at the next mode set.Signed-off-by: Laurentiu Palcu
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This clock is needed by HDR10 so this patch makes DCSS use VIDEO2_PLL2
for the rest of the resolutions as well.Signed-off-by: Laurentiu Palcu
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The SSCG PLL2 is identical to PLL1, hence make the rounding/setting
functions reflect that.Signed-off-by: Laurentiu Palcu
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Signed-off-by: Laurentiu Palcu
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Signed-off-by: Laurentiu Palcu
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Signed-off-by: Laurentiu Palcu
