15 Jan, 2011
1 commit
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This reverts commit dfe63bb0ad9810db13aab0058caba97866e0a681.
This commit was causing nouveau not to work properly, for -rc1 I'd
prefer it worked and we can look if this is useful for 2.6.39.Cc: James Simmons
Signed-off-by: Dave Airlie
Signed-off-by: Linus Torvalds
10 Jan, 2011
1 commit
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* 'drm-radeon-ni' of ../drm-radeon-next: (30 commits)
radeon: consolidate asic-specific function decls for pre-r600
drm/radeon/kms: add NI pci ids
drm/radeon/kms: don't enable pcie gen2 on NI yet
drm/radeon/kms: add radeon_asic struct for NI asics
drm/radeon/kms/ni: load default sclk/mclk/vddc at pm init
drm/radeon/kms: add ucode loader for NI
drm/radeon/kms: add support for DCE5 display LUTs
drm/radeon/kms: add ni_reg.h
drm/radeon/kms: add bo blit support for NI
drm/radeon/kms: always use writeback/events for fences on NI
drm/radeon/kms: adjust default clock/vddc tracking for pm on DCE5
drm/radeon/kms: add backend map workaround for barts
drm/radeon/kms: fill gpu init for NI asics
drm/radeon/kms: add disabled vbios accessor for NI asics
drm/radeon/kms: handle NI thermal controller
drm/radeon/kms: parse DCE5 encoder caps when setting up encoders
drm/radeon/kms: dvo dpms updates for DCE5
drm/radeon/kms: dac dpms updates for DCE5
drm/radeon/kms: DCE5 atom dig encoder updates
drm/radeon/kms: DCE5 atom transmitter control updates
...
07 Jan, 2011
2 commits
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Signed-off-by: Alex Deucher
Signed-off-by: Dave Airlie -
If you change the color depth via fbset or some other framebuffer aware
userland application struct fb_fix_screeninfo is not updated to this new
information. This patch fixes this issue. Also the function is changed to
just pass in struct drm_framebuffer so in the future we could use more
fields. I'm hoping some day fix->smem* could be set here :-)Signed-off-by: James Simmons
Signed-off-by: Dave Airlie
06 Jan, 2011
1 commit
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The CMASK RAM is for colorbuffer compression (used in conjunction
with MSAA). Only one user (filp) can access it.The CMASK RAM access is managed in the same way as Hyper-Z, but there is
a separate ioctl, because an app that uses MSAA does not necessarily
have to use zbuffering.Signed-off-by: Marek Olšák
Signed-off-by: Dave Airlie
05 Jan, 2011
1 commit
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We need to track the state of the switch in drivers, so that after s/r
we don't resume the card we've explicitly switched off before. Also
don't allow a userspace open to occur if we've switched the gpu off.Signed-off-by: Dave Airlie
20 Dec, 2010
1 commit
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The relative-to-general state default is useless as it means having to
rewrite the streaming kernels for each batch. Relative-to-surface is
more useful, as that stream usually needs to be rewritten for each
batch. And absolute addressing mode, vital if you start streaming
state, is also only available by adjusting the register...Signed-off-by: Chris Wilson
17 Dec, 2010
1 commit
05 Dec, 2010
2 commits
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Immediate merge for the conflicting introduction of HAS_COHERENT_RINGS.
Conflicts:
drivers/gpu/drm/i915/i915_dma.c
include/drm/i915_drm.h -
Otherwise we can't really fix the abi-braindeadness of forcing
libva to manually wait for rendering when switching rings. Which
in turn makes implementing hw semaphores a pointless exercise
(at least for ironlake).[Also added the relaxed fencing param to explain the jump in
numbering - relaxed fencing is in -next.]Signed-off-by: Daniel Vetter
Signed-off-by: Chris Wilson
03 Dec, 2010
4 commits
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These have been unused since UMS support was ripped out, so lets remove
them completely.Signed-off-by: Ben Skeggs
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nv0x-nv4x should be mostly fine, nv50 doesn't work yet.
Signed-off-by: Francisco Jerez
Signed-off-by: Ben Skeggs -
No other driver uses this, and userspace should be responsible for handling
locking between them if they share BOs.Signed-off-by: Ben Skeggs
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* 'drm-radeon-fusion' of ../drm-radeon-next:
drm/radeon/kms: add Ontario APU ucode loading support
drm/radeon/kms: add Ontario Fusion APU pci ids
drm/radeon/kms: enable MSIs on fusion APUs
drm/radeon/kms: add power table parsing support for Ontario fusion APUs
drm/radeon/kms: refactor atombios power state fetching
drm/radeon/kms: add bo blit support for Ontario fusion APUs
drm/radeon/kms: add thermal sensor support for fusion APUs
drm/radeon/kms: fill in GPU init for AMD Ontario Fusion APUs
drm/radeon/kms: add radeon_asic struct for AMD Ontario fusion APUs
drm/radeon/kms: evergreen.c updates for fusion
drm/radeon/kms: MC setup changes for fusion APUs
drm/radeon/kms: move r7xx/evergreen to its own vram_gtt setup function
drm/radeon/kms: add support for ss overrides on Fusion APUs
drm/radeon/kms: Add support for external encoders on fusion APUs
drm/radeon/kms: atom changes for DCE4.1 devices
drm/radeon/kms: add new family id for AMD Ontario APUs
drm/radeon/kms: upstream power table updates
drm/radeon/kms: upstream atombios.h updates
drm/radeon/kms: upstream ObjectID.h updates
drm/radeon/kms: setup mc chremap properly on r7xx/evergreen
24 Nov, 2010
4 commits
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Just some minor shuffling to get rid of any agp traces in the
exported functions.Signed-off-by: Daniel Vetter
Signed-off-by: Chris Wilson -
No longer used.
Cc: Dave Airlie
Signed-off-by: Daniel Vetter
Signed-off-by: Chris Wilson -
Signed-off-by: Daniel Vetter
Signed-off-by: Chris Wilson -
... and a few other defines.
Signed-off-by: Daniel Vetter
Signed-off-by: Chris Wilson
23 Nov, 2010
2 commits
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Signed-off-by: Chris Wilson
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Signed-off-by: Alex Deucher
Signed-off-by: Dave Airlie
22 Nov, 2010
8 commits
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Conflicts:
drivers/gpu/drm/i915/i915_gem.c -
This patch attempts to fix up shortcomings with the current calling
sequences.1) There's a fastpath where no locking occurs and only io_mem_reserved is
called to obtain needed info for mapping. The fastpath is set per
memory type manager.
2) If the fastpath is disabled, io_mem_reserve and io_mem_free will be exactly
balanced and not called recursively for the same struct ttm_mem_reg.
3) Optionally the driver can choose to enable a per memory type manager LRU
eviction mechanism that, when io_mem_reserve returns -EAGAIN will attempt
to kill user-space mappings of memory in that manager to free up needed
resourcesSigned-off-by: Thomas Hellstrom
Reviewed-by: Ben Skeggs
Signed-off-by: Dave Airlie -
Rather than having the driver supply the validation sequence, leave that
responsibility to TTM. This saves some confusion and a function argument.Signed-off-by: Thomas Hellstrom
Signed-off-by: Dave Airlie -
Drastically reduce the number of spin lock / unlock operations by performing
unreserving and fencing under global locks.Signed-off-by: Thomas Hellstrom
Reviewed-by: Jerome Glisse
Signed-off-by: Dave Airlie -
The bo lock used only to protect the bo sync object members, and since it
is a per bo lock, fencing a buffer list will see a lot of locks and unlocks.
Replace it with a per-device lock that protects the sync object members on
*all* bos. Reading and setting these members will always be very quick, so
the risc of heavy lock contention is microscopic. Note that waiting for
sync objects will always take place outside of this lock.The bo device fence lock will eventually be replaced with a seqlock /
rcu mechanism so we can determine that a bo is idle under a
rcu / read seqlock.However this change will allow us to batch fencing and unreserving of
buffers with a minimal amount of locking.Signed-off-by: Thomas Hellstrom
Reviewed-by: Jerome Glisse
Signed-off-by: Dave Airlie -
Add an aid for the driver to detect deadlocks on multi-bo reservations
Update documentation.Signed-off-by: Thomas Hellstrom
Reviewed-by: Jerome Glisse
Signed-off-by: Dave Airlie -
Makes it possible to reserve a list of buffer objects with a single
spin lock / unlock if there is no contention.
Should improve cpu usage on SMP kernels.v2: Initialize private list members on reserve and don't call
ttm_bo_list_ref_sub() with zero put_count.Signed-off-by: Thomas Hellstrom
Signed-off-by: Dave Airlie -
The DRI2 swap & sync implementation needs precise
vblank counts and precise timestamps corresponding
to those vblank counts. For conformance to the OpenML
OML_sync_control extension specification the DRM
timestamp associated with a vblank count should
correspond to the start of video scanout of the first
scanline of the video frame following the vblank
interval for that vblank count.Therefore we need to carry around precise timestamps
for vblanks. Currently the DRM and KMS drivers generate
timestamps ad-hoc via do_gettimeofday() in some
places. The resulting timestamps are sometimes not
very precise due to interrupt handling delays, they
don't conform to OML_sync_control and some are wrong,
as they aren't taken synchronized to the vblank.This patch implements support inside the drm core
for precise and robust timestamping. It consists
of the following interrelated pieces.1. Vblank timestamp caching:
A per-crtc ringbuffer stores the most recent vblank
timestamps corresponding to vblank counts.The ringbuffer can be read out lock-free via the
accessor function:struct timeval timestamp;
vblankcount = drm_vblank_count_and_time(dev, crtcid, ×tamp).The function returns the current vblank count and
the corresponding timestamp for start of video
scanout following the vblank interval. It can be
used anywhere between enclosing drm_vblank_get(dev, crtcid)
and drm_vblank_put(dev,crtcid) statements. It is used
inside the drmWaitVblank ioctl and in the vblank event
queueing and handling. It should be used by kms drivers for
timestamping of bufferswap completion.The timestamp ringbuffer is reinitialized each time
vblank irq's get reenabled in drm_vblank_get()/
drm_update_vblank_count(). It is invalidated when
vblank irq's get disabled.The ringbuffer is updated inside drm_handle_vblank()
at each vblank irq.2. Calculation of precise vblank timestamps:
drm_get_last_vbltimestamp() is used to compute the
timestamp for the end of the most recent vblank (if
inside active scanout), or the expected end of the
current vblank interval (if called inside a vblank
interval). The function calls into a new optional kms
driver entry point dev->driver->get_vblank_timestamp()
which is supposed to provide the precise timestamp.
If a kms driver doesn't implement the entry point or
if the call fails, a simple do_gettimeofday() timestamp
is returned as crude approximation of the true vblank time.A new drm module parameter drm.timestamp_precision_usec
allows to disable high precision timestamps (if set to
zero) or to specify the maximum acceptable error in
the timestamps in microseconds.Kms drivers could implement their get_vblank_timestamp()
function in a gpu specific way, as long as returned
timestamps conform to OML_sync_control, e.g., by use
of gpu specific hardware timestamps.Optionally, kms drivers can simply wrap and use the new
utility function drm_calc_vbltimestamp_from_scanoutpos().
This function calls a new optional kms driver function
dev->driver->get_scanout_position() which returns the
current horizontal and vertical video scanout position
of the crtc. The scanout position together with the
drm_display_timing of the current video mode is used
to calculate elapsed time relative to start of active scanout
for the current video frame. This elapsed time is subtracted
from the current do_gettimeofday() time to get the timestamp
corresponding to start of video scanout. Currently
non-interlaced, non-doublescan video modes, with or
without panel scaling are handled correctly. Interlaced/
doublescan modes are tbd in a future patch.3. Filtering of redundant vblank irq's and removal of
some race-conditions in the vblank irq enable/disable path:Some gpu's (e.g., Radeon R500/R600) send spurious vblank
irq's outside the vblank if vblank irq's get reenabled.
These get detected by use of the vblank timestamps and
filtered out to avoid miscounting of vblanks.Some race-conditions between the vblank irq enable/disable
functions, the vblank irq handler and the gpu itself (updating
its hardware vblank counter in the "wrong" moment) are
fixed inside vblank_disable_and_save() and
drm_update_vblank_count() by use of the vblank timestamps and
a new spinlock dev->vblank_time_lock.The time until vblank irq disable is now configurable via
a new drm module parameter drm.vblankoffdelay to allow
experimentation with timeouts that are much shorter than
the current 5 seconds and should allow longer vblank off
periods for better power savings.Followup patches will use these new functions to
implement precise timestamping for the intel and radeon
kms drivers.Signed-off-by: Mario Kleiner
Signed-off-by: Dave Airlie
18 Nov, 2010
1 commit
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This will be needed for Z compression and to take smarter placement
decisions.Signed-off-by: Francisco Jerez
Acked-by: Ben Skeggs
Signed-off-by: Ben Skeggs
15 Nov, 2010
1 commit
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Conflicts:
drivers/gpu/drm/i915/i915_gem.c
drivers/gpu/drm/i915/intel_ringbuffer.c
10 Nov, 2010
1 commit
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Call destroy() on _all_ ttm_bo_init() failures, and make sure that
behavior is documented in the function description.Signed-off-by: Thomas Hellstrom
Signed-off-by: Dave Airlie
09 Nov, 2010
1 commit
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Remove an obsolete comment about mm nodes.
Document the new bo range manager interface.Signed-off-by: Thomas Hellstrom
Signed-off-by: Dave Airlie
01 Nov, 2010
1 commit
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... and into a local structure scoped for the single function in which
it is used.Signed-off-by: Chris Wilson
29 Oct, 2010
1 commit
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So long as we adhere to the fence registers rules for alignment and no
overlaps (including with unfenced accesses to linear memory) and account
for the tiled access in our size allocation, we do not have to allocate
the full fenced region for the object. This allows us to fight the bloat
tiling imposed on pre-i965 chipsets and frees up RAM for real use. [Inside
the GTT we still suffer the additional alignment constraints, so it doesn't
magic allow us to render larger scenes without stalls -- we need the
expanded GTT and fence pipelining to overcome those...]Signed-off-by: Chris Wilson
28 Oct, 2010
1 commit
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Signed-off-by: Daniel Vetter
Signed-off-by: Chris Wilson
26 Oct, 2010
1 commit
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* 'intel/drm-intel-next' of ../drm-next: (63 commits)
drm/i915: Move gpu_write_list to per-ring
drm/i915: Invalidate the to-ring, flush the old-ring when updating domains
drm/i915/ringbuffer: Write the value passed in to the tail register
agp/intel: Restore valid PTE bit for Sandybridge after bdd3072
drm/i915: Fix flushing regression from 9af90d19f
drm/i915/sdvo: Remove unused encoding member
i915: enable AVI infoframe for intel_hdmi.c [v4]
drm/i915: Fix current fb blocking for page flip
drm/i915: IS_IRONLAKE is synonymous with gen == 5
drm/i915: Enable SandyBridge blitter ring
drm/i915/ringbuffer: Remove broken intel_fill_struct()
drm/i915/ringbuffer: Fix emit batch buffer regression from 8187a2b
drm/i915: Copy the updated reloc->presumed_offset back to the user
drm/i915: Track objects in global active list (as well as per-ring)
drm/i915: Simplify most HAS_BSD() checks
drm/i915: cache the last object lookup during pin_and_relocate()
drm/i915: Do interrupible mutex lock first to avoid locking for unreference
drivers: gpu: drm: i915: Fix a typo.
agp/intel: Also add B43.1 to list of supported devices
drm/i915: rearrange mutex acquisition for pread
...
22 Oct, 2010
1 commit
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Based on an original patch by Zhenyu Wang, this initializes the BLT ring for
SandyBridge and enables support for user execbuffers.Cc: Zhenyu Wang
Signed-off-by: Chris Wilson
21 Oct, 2010
1 commit
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Release the lru spinlock early.
Signed-off-by: Thomas Hellstrom
Signed-off-by: Dave Airlie
19 Oct, 2010
2 commits
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To help to determine if digital display port needs to enable
audio output or not. This one adds a helper to get monitor's
audio capability via EDID CEA extension block.Tested-by: Wu Fengguang
Signed-off-by: Zhenyu Wang
Reviewed-by: Adam Jackson
Signed-off-by: Chris Wilson
