04 Aug, 2016

1 commit

  • The use of config_enabled() against config options is ambiguous. In
    practical terms, config_enabled() is equivalent to IS_BUILTIN(), but the
    author might have used it for the meaning of IS_ENABLED(). Using
    IS_ENABLED(), IS_BUILTIN(), IS_MODULE() etc. makes the intention
    clearer.

    This commit replaces config_enabled() with IS_ENABLED() where possible.
    This commit is only touching bool config options.

    I noticed two cases where config_enabled() is used against a tristate
    option:

    - config_enabled(CONFIG_HWMON)
    [ drivers/net/wireless/ath/ath10k/thermal.c ]

    - config_enabled(CONFIG_BACKLIGHT_CLASS_DEVICE)
    [ drivers/gpu/drm/gma500/opregion.c ]

    I did not touch them because they should be converted to IS_BUILTIN()
    in order to keep the logic, but I was not sure it was the authors'
    intention.

    Link: http://lkml.kernel.org/r/1465215656-20569-1-git-send-email-yamada.masahiro@socionext.com
    Signed-off-by: Masahiro Yamada
    Acked-by: Kees Cook
    Cc: Stas Sergeev
    Cc: Matt Redfearn
    Cc: Joshua Kinard
    Cc: Jiri Slaby
    Cc: Bjorn Helgaas
    Cc: Borislav Petkov
    Cc: Markos Chandras
    Cc: "Dmitry V. Levin"
    Cc: yu-cheng yu
    Cc: James Hogan
    Cc: Brian Gerst
    Cc: Johannes Berg
    Cc: Peter Zijlstra
    Cc: Al Viro
    Cc: Will Drewry
    Cc: Nikolay Martynov
    Cc: Huacai Chen
    Cc: "H. Peter Anvin"
    Cc: Thomas Gleixner
    Cc: Daniel Borkmann
    Cc: Leonid Yegoshin
    Cc: Rafal Milecki
    Cc: James Cowgill
    Cc: Greg Kroah-Hartman
    Cc: Ralf Baechle
    Cc: Alex Smith
    Cc: Adam Buchbinder
    Cc: Qais Yousef
    Cc: Jiang Liu
    Cc: Mikko Rapeli
    Cc: Paul Gortmaker
    Cc: Denys Vlasenko
    Cc: Brian Norris
    Cc: Hidehiro Kawai
    Cc: "Luis R. Rodriguez"
    Cc: Andy Lutomirski
    Cc: Ingo Molnar
    Cc: Dave Hansen
    Cc: "Kirill A. Shutemov"
    Cc: Roland McGrath
    Cc: Paul Burton
    Cc: Kalle Valo
    Cc: Viresh Kumar
    Cc: Tony Wu
    Cc: Huaitong Han
    Cc: Sumit Semwal
    Cc: Alexei Starovoitov
    Cc: Juergen Gross
    Cc: Jason Cooper
    Cc: "David S. Miller"
    Cc: Oleg Nesterov
    Cc: Andrea Gelmini
    Cc: David Woodhouse
    Cc: Marc Zyngier
    Cc: Rabin Vincent
    Cc: "Maciej W. Rozycki"
    Cc: David Daney
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Masahiro Yamada
     

24 Jun, 2016

1 commit


25 May, 2016

1 commit

  • Pull MTD updates from Brian Norris:
    "First cycle with Boris as NAND maintainer! Many (most) bullets stolen
    from him.

    Generic:
    - Migrated NAND LED trigger to be a generic MTD trigger

    NAND:
    - Introduction of the "ECC algorithm" concept, to avoid overloading
    the ECC mode field too much more
    - Replaced the nand_ecclayout infrastructure with something a little
    more flexible (finally!) and future proof
    - Rework of the OMAP GPMC and NAND drivers; the TI folks pulled some
    of this into their own tree as well
    - Prepare the sunxi NAND driver to receive DMA support
    - Handle bitflips in erased pages on GPMI revisions that do not
    support this in hardware.

    SPI NOR:
    - Start using the spi_flash_read() API for SPI drivers that support
    it (i.e., SPI drivers with special memory-mapped flash modes)

    And other small scattered improvments"

    * tag 'for-linus-20160523' of git://git.infradead.org/linux-mtd: (155 commits)
    mtd: spi-nor: support GigaDevice gd25lq64c
    mtd: nand_bch: fix spelling of "probably"
    mtd: brcmnand: respect ECC algorithm set by NAND subsystem
    gpmi-nand: Handle ECC Errors in erased pages
    Documentation: devicetree: deprecate "soft_bch" nand-ecc-mode value
    mtd: nand: add support for "nand-ecc-algo" DT property
    mtd: mtd: drop NAND_ECC_SOFT_BCH enum value
    mtd: drop support for NAND_ECC_SOFT_BCH as "soft_bch" mapping
    mtd: nand: read ECC algorithm from the new field
    mtd: nand: fsmc: validate ECC setup by checking algorithm directly
    mtd: nand: set ECC algorithm to Hamming on fallback
    staging: mt29f_spinand: set ECC algorithm explicitly
    CRIS v32: nand: set ECC algorithm explicitly
    mtd: nand: atmel: set ECC algorithm explicitly
    mtd: nand: davinci: set ECC algorithm explicitly
    mtd: nand: bf5xx: set ECC algorithm explicitly
    mtd: nand: omap2: Fix high memory dma prefetch transfer
    mtd: nand: omap2: Start dma request before enabling prefetch
    mtd: nandsim: add __init attribute
    mtd: nand: move of_get_nand_xxx() helpers into nand_base.c
    ...

    Linus Torvalds
     

14 May, 2016

2 commits

  • The DT fragment will select the ohci-platform driver, since that can
    handle the JZ4740 OHCI just fine. While I don't have a JZ4740-based
    board with anything connected to the USB host controller, I did test
    the generic OHCI driver successfully on a JZ4770-based board.

    The device is disabled by default; boards that want to use it can
    override the "status" property. The mass-production Qi LB60 boards
    don't use the USB host controller.

    Signed-off-by: Maarten ter Huurne
    Cc: Lars-Peter Clausen
    Cc: Paul Cercueil
    Cc: linux-mips@linux-mips.org
    Cc: linux-kernel@vger.kernel.org
    Patchwork: https://patchwork.linux-mips.org/patch/13104/
    Signed-off-by: Ralf Baechle

    Maarten ter Huurne
     
  • AVT2 was a prototype board of which about 5 were made, none of which
    are in use anymore.

    Signed-off-by: Maarten ter Huurne
    Acked-by: Lars-Peter Clausen
    Cc: Paul Cercueil
    Cc: linux-mips@linux-mips.org
    Cc: linux-kernel@vger.kernel.org
    Patchwork: https://patchwork.linux-mips.org/patch/13103/
    Signed-off-by: Ralf Baechle

    Maarten ter Huurne
     

06 May, 2016

1 commit


19 Feb, 2016

2 commits


26 Oct, 2015

2 commits

  • The board code never sets up a leds-pwm device, so including the header
    is not necessary.

    Signed-off-by: Thierry Reding
    Acked-by: Lars-Peter Clausen
    Cc: Lars-Peter Clausen
    Cc: linux-mips@linux-mips.org
    Cc: linux-kernel@vger.kernel.org
    Patchwork: https://patchwork.linux-mips.org/patch/11262/
    Signed-off-by: Ralf Baechle

    Thierry Reding
     
  • Associate the PWM with the pwm-beeper device using a PWM lookup table.
    This will eventually allow the legacy function calls to pwm_request() to
    be removed from all consumer drivers.

    Signed-off-by: Thierry Reding
    Cc: Lars-Peter Clausen
    Cc: linux-mips@linux-mips.org
    Cc: linux-kernel@vger.kernel.org
    Patchwork: https://patchwork.linux-mips.org/patch/11261/
    Signed-off-by: Ralf Baechle

    Thierry Reding
     

01 Oct, 2015

1 commit

  • Somehow the wrong version of the patch to remove the use of custom
    gpio.h on mips has been merged. This patch add the missing fixes for a
    build error on jz4740 because linux/gpio.h doesn't provide any machine
    specfics definitions anymore.

    Signed-off-by: Alban Bedel
    Cc: Paul Burton
    Cc: Lars-Peter Clausen
    Cc: Brian Norris
    Cc: Thomas Gleixner
    Cc: Linus Walleij
    Cc: linux-mips@linux-mips.org
    Cc: linux-kernel@vger.kernel.org
    Patchwork: https://patchwork.linux-mips.org/patch/11089/
    Signed-off-by: Ralf Baechle

    Alban Bedel
     

16 Sep, 2015

1 commit

  • Most interrupt flow handlers do not use the irq argument. Those few
    which use it can retrieve the irq number from the irq descriptor.

    Remove the argument.

    Search and replace was done with coccinelle and some extra helper
    scripts around it. Thanks to Julia for her help!

    Signed-off-by: Thomas Gleixner
    Cc: Julia Lawall
    Cc: Jiang Liu

    Thomas Gleixner
     

03 Sep, 2015

2 commits

  • Currently CONFIG_ARCH_HAVE_CUSTOM_GPIO_H is defined for all MIPS
    machines, and each machine type provides its own gpio.h. However
    only a handful really implement the GPIO API, most just forward
    everythings to gpiolib.

    The Alchemy machine is notable as it provides a system to allow
    implementing the GPIO API at the board level. But it is not used by
    any board currently supported, so it can also be removed.

    For most machine types we can just remove the custom gpio.h, as well
    as the custom wrappers if some exists. Some of the code found in
    the wrappers must be moved to the respective GPIO driver.

    A few more fixes are need in some drivers as they rely on linux/gpio.h
    to provides some machine specific definitions, or used asm/gpio.h
    instead of linux/gpio.h for the gpio API.

    Signed-off-by: Alban Bedel
    Reviewed-by: Linus Walleij
    Cc: linux-mips@linux-mips.org
    Cc: Hauke Mehrtens
    Cc: Rafał Miłecki
    Cc: Bartlomiej Zolnierkiewicz
    Cc: Tejun Heo
    Cc: Alexandre Courbot
    Cc: Dmitry Torokhov
    Cc: Florian Fainelli
    Cc: Manuel Lauss
    Cc: Joe Perches
    Cc: Daniel Walter
    Cc: Sergey Ryazanov
    Cc: Huacai Chen
    Cc: James Hartley
    Cc: Andrew Bresticker
    Cc: Paul Burton
    Cc: Jiri Kosina
    Cc: Bjorn Helgaas
    Cc: Wolfram Sang
    Cc: Randy Dunlap
    Cc: Varka Bhadram
    Cc: Masanari Iida
    Cc: Tomi Valkeinen
    Cc: Michael Buesch
    Cc: abdoulaye berthe
    Cc: linux-kernel@vger.kernel.org
    Cc: linux-ide@vger.kernel.org
    Cc: linux-gpio@vger.kernel.org
    Cc: linux-input@vger.kernel.org
    Cc: netdev@vger.kernel.org
    Patchwork: https://patchwork.linux-mips.org/patch/10828/
    Signed-off-by: Ralf Baechle

    Alban Bedel
     
  • Migrate jz4740 driver to the new 'set-state' interface provided by
    clockevents core, the earlier 'set-mode' interface is marked obsolete
    now.

    This also enables us to implement callbacks for new states of clockevent
    devices, for example: ONESHOT_STOPPED.

    Signed-off-by: Viresh Kumar
    Cc: Paul Burton
    Cc: Deng-Cheng Zhu
    Cc: Daniel Lezcano
    Cc: linux-mips@linux-mips.org
    Cc: linaro-kernel@lists.linaro.org
    Cc: Thomas Gleixner
    Patchwork: https://patchwork.linux-mips.org/patch/10601/
    Signed-off-by: Ralf Baechle

    Viresh Kumar
     

26 Aug, 2015

1 commit

  • Chained irq handlers usually set up handler data as well. We now have
    a function to set both under irq_desc->lock. Replace the two calls
    with one.

    Search and conversion was done with coccinelle.

    Reported-by: Russell King
    Signed-off-by: Thomas Gleixner
    Cc: Julia Lawall
    Cc: linux-mips@linux-mips.org
    Cc: LKML
    Cc: Jiang Liu
    Patchwork: https://patchwork.linux-mips.org/patch/10695/
    Signed-off-by: Ralf Baechle

    Thomas Gleixner
     

22 Jun, 2015

25 commits

  • Add an initial device tree for the Ingenic JZ4780 based MIPS Creator
    CI20 board.

    Signed-off-by: Paul Burton
    Cc: Ian Campbell
    Cc: Kumar Gala
    Cc: Lars-Peter Clausen
    Cc: Mark Rutland
    Cc: Pawel Moll
    Cc: Rob Herring
    Cc: devicetree@vger.kernel.org
    Cc: linux-mips@linux-mips.org
    Cc: Andrew Bresticker
    Cc: linux-kernel@vger.kernel.org
    Patchwork: https://patchwork.linux-mips.org/patch/10162/
    Signed-off-by: Ralf Baechle

    Paul Burton
     
  • Support the Ingenic JZ4780 SoC using the existing code under
    arch/mips/jz4740 now that it has been generalised sufficiently.

    Signed-off-by: Paul Burton
    Cc: Ian Campbell
    Cc: Kumar Gala
    Cc: Lars-Peter Clausen
    Cc: Mark Rutland
    Cc: Pawel Moll
    Cc: Rob Herring
    Cc: devicetree@vger.kernel.org
    Cc: linux-mips@linux-mips.org
    Cc: Joshua Kinard
    Cc: Leonid Yegoshin
    Cc: Deng-Cheng Zhu
    Cc: linux-kernel@vger.kernel.org
    Cc: Markos Chandras
    Cc: Andreas Herrmann
    Patchwork: https://patchwork.linux-mips.org/patch/10164/
    Signed-off-by: Ralf Baechle

    Paul Burton
     
  • Remove the serial support from arch/mips/jz4740 & make use of the new
    Ingenic SoC UART driver. This is done for both regular & early console
    output.

    Signed-off-by: Paul Burton
    Cc: Ian Campbell
    Cc: Kumar Gala
    Cc: Lars-Peter Clausen
    Cc: Mark Rutland
    Cc: Pawel Moll
    Cc: Rob Herring
    Cc: devicetree@vger.kernel.org
    Cc: linux-mips@linux-mips.org
    Cc: Linus Walleij
    Cc: Stephen Warren
    Cc: linux-kernel@vger.kernel.org
    Cc: Brian Norris
    Cc: Apelete Seketeli
    Cc: Alexandre Courbot
    Patchwork: https://patchwork.linux-mips.org/patch/10160/
    Signed-off-by: Ralf Baechle

    Paul Burton
     
  • Allow a devicetree to specify the memory present in the system rather
    than probing it from the memory controller. This both saves the probing
    for systems where the amount of memory is fixed, and will simplify the
    bringup of later Ingenic SoCs where the memory controller register
    layout differs.

    Signed-off-by: Paul Burton
    Cc: Lars-Peter Clausen
    Cc: linux-mips@linux-mips.org
    Cc: linux-kernel@vger.kernel.org
    Patchwork: https://patchwork.linux-mips.org/patch/10163/
    Signed-off-by: Ralf Baechle

    Paul Burton
     
  • The only thing remaining in arch/mips/jz4740/clock.h is declarations of
    the jz4740_clock_{suspend,resume} functions. Move these to
    arch/mips/include/asm/mach-jz4740/clock.h for consistency with similar
    functions, and remove the redundant arch/mips/jz4740/clock.h header.

    Signed-off-by: Paul Burton
    Cc: Lars-Peter Clausen
    Cc: linux-mips@linux-mips.org
    Cc: linux-kernel@vger.kernel.org
    Patchwork: https://patchwork.linux-mips.org/patch/10156/
    Signed-off-by: Ralf Baechle

    Paul Burton
     
  • The jz4740-cgu driver already has access to the CGU, so it makes sense
    to move the few remaining accesses to the CGU from arch/mips/jz4740
    there too. Move the jz4740_clock_{suspend,resume} functions there for
    such consistency. The arch/mips/jz4740/clock.c file now contains nothing
    more of use & so is removed.

    Signed-off-by: Paul Burton
    Cc: Lars-Peter Clausen
    Cc: Mike Turquette
    Cc: Stephen Boyd
    Cc: linux-clk@vger.kernel.org
    Cc: linux-mips@linux-mips.org
    Cc: Deng-Cheng Zhu
    Cc: linux-kernel@vger.kernel.org
    Patchwork: https://patchwork.linux-mips.org/patch/10158/
    Signed-off-by: Ralf Baechle

    Paul Burton
     
  • The jz4740-cgu driver already has access to the CGU, so it makes sense
    to move the few remaining accesses to the CGU from arch/mips/jz4740
    there too. Move the jz4740_clock_udc_{dis,en}able_auto_suspend functions
    there for such consistency.

    Signed-off-by: Paul Burton
    Cc: Lars-Peter Clausen
    Cc: Mike Turquette
    Cc: Stephen Boyd
    Cc: linux-clk@vger.kernel.org
    Cc: linux-mips@linux-mips.org
    Cc: linux-kernel@vger.kernel.org
    Patchwork: https://patchwork.linux-mips.org/patch/10154/
    Signed-off-by: Ralf Baechle

    Paul Burton
     
  • The jz4740-cgu driver already has access to the CGU, so it makes sense
    to move the few remaining accesses to the CGU from arch/mips/jz4740
    there too. Move jz4740_clock_set_wait_mode for such consistency.

    Signed-off-by: Paul Burton
    Cc: Lars-Peter Clausen
    Cc: Mike Turquette
    Cc: Stephen Boyd
    Cc: linux-clk@vger.kernel.org
    Cc: linux-mips@linux-mips.org
    Cc: linux-kernel@vger.kernel.org
    Patchwork: https://patchwork.linux-mips.org/patch/10153/
    Signed-off-by: Ralf Baechle

    Paul Burton
     
  • Migrate the JZ4740 & the qi_lb60 board to use common clock framework
    via the new Ingenic SoC CGU driver. Note that the JZ4740-specific
    debugfs code is removed since common clock framework provides its own
    debug capabilities.

    Signed-off-by: Paul Burton
    Co-authored-by: Paul Cercueil
    Cc: Ian Campbell
    Cc: Kumar Gala
    Cc: Lars-Peter Clausen
    Cc: Mark Rutland
    Cc: Mike Turquette
    Cc: Pawel Moll
    Cc: Rob Herring
    Cc: Stephen Boyd
    Cc: devicetree@vger.kernel.org
    Cc: linux-clk@vger.kernel.org
    Cc: linux-mips@linux-mips.org
    Cc: Fabian Frederick
    Cc: Deng-Cheng Zhu
    Cc: Linus Walleij
    Cc: Stephen Warren
    Cc: linux-kernel@vger.kernel.org
    Cc: Brian Norris
    Patchwork: https://patchwork.linux-mips.org/patch/10151/
    Signed-off-by: Ralf Baechle

    Paul Burton
     
  • Replace uses of the jz4740_clock_bdata struct with calls to clk_get_rate
    for the appropriate clock. This is in preparation for migrating the
    clocks towards common clock framework & devicetree.

    Signed-off-by: Paul Burton
    Cc: Lars-Peter Clausen
    Cc: linux-mips@linux-mips.org
    Cc: Deng-Cheng Zhu
    Cc: linux-kernel@vger.kernel.org
    Cc: Apelete Seketeli
    Patchwork: https://patchwork.linux-mips.org/patch/10149/
    Signed-off-by: Ralf Baechle

    Paul Burton
     
  • Call jz4740_clock_init before any uses of jz4740_clock_bdata occur. This
    is in preparation for replacing uses of that struct with calls to
    clk_get_rate, which will allow the clocks to be migrated towards common
    clock framework & devicetree.

    Signed-off-by: Paul Burton
    Cc: Lars-Peter Clausen
    Cc: linux-mips@linux-mips.org
    Cc: Deng-Cheng Zhu
    Cc: linux-kernel@vger.kernel.org
    Patchwork: https://patchwork.linux-mips.org/patch/10148/
    Signed-off-by: Ralf Baechle

    Paul Burton
     
  • Move the driver for Ingenic SoC interrupt controllers into
    drivers/irqchip where it belongs.

    Signed-off-by: Paul Burton
    Cc: Lars-Peter Clausen
    Cc: Thomas Gleixner
    Cc: Jason Cooper
    Cc: linux-mips@linux-mips.org
    Cc: linux-kernel@vger.kernel.org
    Cc: Brian Norris
    Patchwork: https://patchwork.linux-mips.org/patch/10147/
    Signed-off-by: Ralf Baechle

    Paul Burton
     
  • Allow the interrupt controllers of the JZ4770, JZ4775 & JZ4780 SoCs to
    be probed via devicetree, supporting the 64 interrupts they provide.

    Signed-off-by: Paul Burton
    Cc: Lars-Peter Clausen
    Cc: Thomas Gleixner
    Cc: Jason Cooper
    Cc: linux-mips@linux-mips.org
    Cc: linux-kernel@vger.kernel.org
    Cc: Brian Norris
    Patchwork: https://patchwork.linux-mips.org/patch/10155/
    Signed-off-by: Ralf Baechle

    Paul Burton
     
  • Rename the functions including jz4740 in their names to be more generic
    in preparation for supporting further SoCs, and for moving this
    interrupt controller code to drivers/irqchip.

    Signed-off-by: Paul Burton
    Cc: linux-mips@linux-mips.org
    Cc: linux-kernel@vger.kernel.org
    Cc: Brian Norris
    Cc: Lars-Peter Clausen
    Patchwork: https://patchwork.linux-mips.org/patch/10146/
    Signed-off-by: Ralf Baechle

    Paul Burton
     
  • Read the base address of the SoC interrupt controller from the device
    tree rather than relying upon the JZ4740_INTC_BASE_ADDR macro, in order
    to remove the dependency on the asm/mach-jz4740/base.h header.

    Signed-off-by: Paul Burton
    Cc: Lars-Peter Clausen
    Cc: Thomas Gleixner
    Cc: Jason Cooper
    Cc: linux-mips@linux-mips.org
    Cc: linux-kernel@vger.kernel.org
    Cc: Brian Norris
    Patchwork: https://patchwork.linux-mips.org/patch/10145/
    Signed-off-by: Ralf Baechle

    Paul Burton
     
  • On newer Ingenic SoCs the interrupt controller supports more than 32
    interrupts, which it does by duplicating the registers at intervals
    of 0x20 bytes within its address space. Add support for an arbitrary
    number of interrupts using multiple generic chips, and provide the
    number of chips to register from the interrupt controller probe
    function.

    Signed-off-by: Paul Burton
    Cc: Lars-Peter Clausen
    Cc: Thomas Gleixner
    Cc: Jason Cooper
    Cc: linux-mips@linux-mips.org
    Cc: linux-kernel@vger.kernel.org
    Cc: Brian Norris
    Patchwork: https://patchwork.linux-mips.org/patch/10141/
    Signed-off-by: Ralf Baechle

    Paul Burton
     
  • Avoid the need for the global variable jz_intc_base by introducing a
    struct ingenic_intc_data and passing it around as the IRQ handler data.

    Signed-off-by: Paul Burton
    Cc: Lars-Peter Clausen
    Cc: Thomas Gleixner
    Cc: Jason Cooper
    Cc: linux-mips@linux-mips.org
    Cc: linux-kernel@vger.kernel.org
    Cc: Brian Norris
    Patchwork: https://patchwork.linux-mips.org/patch/10144/
    Signed-off-by: Ralf Baechle

    Paul Burton
     
  • The debugfs code becomes a nuisance when attempting to avoid globals,
    since the interrupt controller probe function run too early for it to be
    safe to create the debugfs files. Drop it.

    Signed-off-by: Paul Burton
    Cc: Lars-Peter Clausen
    Cc: Thomas Gleixner
    Cc: Jason Cooper
    Cc: linux-mips@linux-mips.org
    Cc: linux-kernel@vger.kernel.org
    Cc: Brian Norris
    Patchwork: https://patchwork.linux-mips.org/patch/10139/
    Acked-by: Lars-Peter Clausen
    Signed-off-by: Ralf Baechle

    Paul Burton
     
  • When probing the interrupt controller, register an IRQ domain such
    that the interrupts can be translated by devicetree code & thus used
    from devicetree.

    Signed-off-by: Paul Burton
    Cc: Lars-Peter Clausen
    Cc: Thomas Gleixner
    Cc: Jason Cooper
    Cc: linux-mips@linux-mips.org
    Cc: linux-kernel@vger.kernel.org
    Cc: Brian Norris
    Patchwork: https://patchwork.linux-mips.org/patch/10140/
    Signed-off-by: Ralf Baechle

    Paul Burton
     
  • Rather than hardcoding the IRQ number used to cascade interrupts from
    the SoC interrupt controller to the CPU interrupt controller, read that
    IRQ number from the DT describing the system.

    Signed-off-by: Paul Burton
    Cc: Lars-Peter Clausen
    Cc: Thomas Gleixner
    Cc: Jason Cooper
    Cc: linux-mips@linux-mips.org
    Cc: linux-kernel@vger.kernel.org
    Cc: Brian Norris
    Patchwork: https://patchwork.linux-mips.org/patch/10137/
    Signed-off-by: Ralf Baechle

    Paul Burton
     
  • Declare the JZ4740 interrupt controller for probe via DT using the
    standard irqchip_init function, and make use of that function to probe
    the controller by adding the appropriate node to the JZ4740 dtsi.

    Signed-off-by: Paul Burton
    Cc: Ian Campbell
    Cc: Jason Cooper
    Cc: Kumar Gala
    Cc: Lars-Peter Clausen
    Cc: Mark Rutland
    Cc: Pawel Moll
    Cc: Rob Herring
    Cc: Thomas Gleixner
    Cc: devicetree@vger.kernel.org
    Cc: linux-mips@linux-mips.org
    Cc: linux-kernel@vger.kernel.org
    Cc: Brian Norris
    Patchwork: https://patchwork.linux-mips.org/patch/10135/
    Signed-off-by: Ralf Baechle

    Paul Burton
     
  • In preparation for moving the JZ4740 interrupt controller driver to
    drivers/irqchip, move arch_init_irq into setup.c such that everything
    remaining in irq.c is related to said JZ4740 interrupt controller.

    Signed-off-by: Paul Burton
    Cc: Lars-Peter Clausen
    Cc: linux-mips@linux-mips.org
    Cc: linux-kernel@vger.kernel.org
    Cc: Brian Norris
    Patchwork: https://patchwork.linux-mips.org/patch/10136/
    Signed-off-by: Ralf Baechle

    Paul Burton
     
  • Make use of the generic plat_irq_dispatch function introduced by commit
    85f7cdacbb81 "MIPS: Provide a generic plat_irq_dispatch", in order to
    reduce unnecessary code duplication.

    Signed-off-by: Paul Burton
    Cc: Lars-Peter Clausen
    Cc: linux-mips@linux-mips.org
    Cc: linux-kernel@vger.kernel.org
    Cc: Brian Norris
    Patchwork: https://patchwork.linux-mips.org/patch/10138/
    Signed-off-by: Ralf Baechle

    Paul Burton
     
  • Use the generic irqchip_init function to probe irqchip drivers using DT,
    and add the appropriate node to the JZ4740 devicetree in place of the
    call to mips_cpu_irq_init.

    Signed-off-by: Paul Burton
    Cc: Ian Campbell
    Cc: Kumar Gala
    Cc: Lars-Peter Clausen
    Cc: Mark Rutland
    Cc: Pawel Moll
    Cc: Rob Herring
    Cc: devicetree@vger.kernel.org
    Cc: linux-mips@linux-mips.org
    Cc: linux-kernel@vger.kernel.org
    Cc: Brian Norris
    Cc: Sergei Shtylyov
    Patchwork: https://patchwork.linux-mips.org/patch/10166/
    Signed-off-by: Ralf Baechle

    Paul Burton
     
  • Require a DT for JZ4740 based systems, and add a stub one for the
    qi_lb60 (Ben NanoNote) board. Devices will be migrated to being probed
    via this DT over time.

    Signed-off-by: Paul Burton
    Cc: Ian Campbell
    Cc: Kumar Gala
    Cc: Lars-Peter Clausen
    Cc: Mark Rutland
    Cc: Pawel Moll
    Cc: Rob Herring
    Cc: devicetree@vger.kernel.org
    Cc: linux-mips@linux-mips.org
    Cc: Andrew Bresticker
    Cc: linux-kernel@vger.kernel.org
    Patchwork: https://patchwork.linux-mips.org/patch/10132/
    Signed-off-by: Ralf Baechle

    Paul Burton