19 Aug, 2018
1 commit
-
Pull char/misc driver updates from Greg KH:
"Here is the bit set of char/misc drivers for 4.19-rc1There is a lot here, much more than normal, seems like everyone is
writing new driver subsystems these days... Anyway, major things here
are:- new FSI driver subsystem, yet-another-powerpc low-level hardware
bus- gnss, finally an in-kernel GPS subsystem to try to tame all of the
crazy out-of-tree drivers that have been floating around for years,
combined with some really hacky userspace implementations. This is
only for GNSS receivers, but you have to start somewhere, and this
is great to see.Other than that, there are new slimbus drivers, new coresight drivers,
new fpga drivers, and loads of DT bindings for all of these and
existing drivers.All of these have been in linux-next for a while with no reported
issues"* tag 'char-misc-4.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (255 commits)
android: binder: Rate-limit debug and userspace triggered err msgs
fsi: sbefifo: Bump max command length
fsi: scom: Fix NULL dereference
misc: mic: SCIF Fix scif_get_new_port() error handling
misc: cxl: changed asterisk position
genwqe: card_base: Use true and false for boolean values
misc: eeprom: assignment outside the if statement
uio: potential double frees if __uio_register_device() fails
eeprom: idt_89hpesx: clean up an error pointer vs NULL inconsistency
misc: ti-st: Fix memory leak in the error path of probe()
android: binder: Show extra_buffers_size in trace
firmware: vpd: Fix section enabled flag on vpd_section_destroy
platform: goldfish: Retire pdev_bus
goldfish: Use dedicated macros instead of manual bit shifting
goldfish: Add missing includes to goldfish.h
mux: adgs1408: new driver for Analog Devices ADGS1408/1409 mux
dt-bindings: mux: add adi,adgs1408
Drivers: hv: vmbus: Cleanup synic memory free path
Drivers: hv: vmbus: Remove use of slow_virt_to_phys()
Drivers: hv: vmbus: Reset the channel callback in vmbus_onoffer_rescind()
...
27 Jul, 2018
1 commit
-
…ll/linux into aarch64/for-next/core
Pull in arm perf updates, including support for 64-bit (chained) event
counters and some non-critical fixes for some of the system PMU drivers.Signed-off-by: Will Deacon <will.deacon@arm.com>
26 Jul, 2018
1 commit
-
Instead of checking the return value of platform_get_resource(), we can
use devm_ioremap_resource() which has the NULL pointer check and the
memory region requesting. devm_ioremap_resource is designed to replace
calls to devm_request_mem_region followed by devm_ioremap, so let's use
the same.Cc: Will Deacon
Cc: Mark Rutland
Signed-off-by: Sudeep Holla
Signed-off-by: Will Deacon
24 Jul, 2018
1 commit
-
MT bit in MPIDR_EL1 is now supported in certain HiSilicon platforms, so
the mapping between sccl_id/ccl_id and affinity level needs to be updated
from the generic encoding we originally used.Cc: John Garry
Cc: Will Deacon
Cc: Mark Rutland
Signed-off-by: Shaokun Zhang
[will: fixed comment]
Signed-off-by: Will Deacon
16 Jul, 2018
1 commit
-
We want the char-misc fixes in here as well.
Signed-off-by: Greg Kroah-Hartman
11 Jul, 2018
4 commits
-
Add support for 64bit event by using chained event counters
and 64bit cycle counters.PMUv3 allows chaining a pair of adjacent 32-bit counters, effectively
forming a 64-bit counter. The low/even counter is programmed to count
the event of interest, and the high/odd counter is programmed to count
the CHAIN event, taken when the low/even counter overflows.For CPU cycles, when 64bit mode is requested, the cycle counter
is used in 64bit mode. If the cycle counter is not available,
falls back to chaining.Cc: Will Deacon
Acked-by: Mark Rutland
Signed-off-by: Suzuki K Poulose
Signed-off-by: Will Deacon -
The armpmu uses get_event_idx callback to allocate an event
counter for a given event, which marks the selected counter
as "used". Now, when we delete the counter, the arm_pmu goes
ahead and clears the "used" bit and then invokes the "clear_event_idx"
call back, which kind of splits the job between the core code
and the backend. To keep things tidy, mandate the implementation
of clear_event_idx() and add it for exisiting backends.
This will be useful for adding the chained event support, where
we leave the event idx maintenance to the backend.Also, when an event is removed from the PMU, reset the hw.idx
to indicate that a counter is not allocated for this event,
to help the backends do better checks. This will be also used
for the chain counter support.Cc: Will Deacon
Cc: Mark Rutland
Reviewed-by: Julien Thierry
Signed-off-by: Suzuki K Poulose
Signed-off-by: Will Deacon -
Each PMU has a set of 32bit event counters. But in some
special cases, the events could be counted using counters
which are effectively 64bit wide.e.g, Arm V8 PMUv3 has a 64 bit cycle counter which can count
only the CPU cycles. Also, the PMU can chain the event counters
to effectively count as a 64bit counter.Add support for tracking the events that uses 64bit counters.
This only affects the periods set for each counter in the core
driver.Cc: Will Deacon
Reviewed-by: Julien Thierry
Acked-by: Mark Rutland
Signed-off-by: Suzuki K Poulose
Signed-off-by: Will Deacon -
Each PMU defines their max_period of the counter as the maximum
value that can be counted. Since all the PMU backends support
32bit counters by default, let us remove the redundant field.No functional changes.
Cc: Will Deacon
Acked-by: Mark Rutland
Reviewed-by: Julien Thierry
Signed-off-by: Suzuki K Poulose
Signed-off-by: Will Deacon
07 Jul, 2018
1 commit
-
At over 4000 #includes, is the 9th most
#included header file in the Linux kernel. It does not need
, so drop that header and explicitly add
to source files that need it.4146 #include
After this patch, there are 225 files that use ,
for a reduction of around 3900 times that
does not have to be read & parsed.225 #include
This patch was build-tested on 20 different arch-es.
It also makes these drivers SubmitChecklist#1 compliant.
Signed-off-by: Randy Dunlap
Reported-by: kbuild test robot # drivers/media/platform/vimc/
Reported-by: kbuild test robot # drivers/pinctrl/pinctrl-u300.c
Signed-off-by: Greg Kroah-Hartman
04 Jul, 2018
1 commit
-
If a PMU doesn't have any IRQs, we should return 0 from
armpmu_request_irqs(), rather than uninitialised stack.Signed-off-by: Will Deacon
02 Jul, 2018
1 commit
-
In the quest to remove all stack VLA usage from the kernel[1], this
removes the VLA in favor of a maximum size and adds a sanity check
at registration time. The sizes are all explicitly enumerated already,
so this just collects them into macros.[1] https://lkml.kernel.org/r/CA+55aFzCG-zNmZwX4A2FQpadafLfEzK6CC=qPXydAacU1RqZWA@mail.gmail.com
Signed-off-by: Kees Cook
Signed-off-by: Will Deacon
19 Jun, 2018
1 commit
-
This patch fixes the below parser error of the IOB SLOW PMU.
# perf stat -a -e iob-slow0/cycle-count/ sleep 1
evenf syntax error: 'iob-slow0/cycle-count/'
\___ parser errorIt replaces the "-" character by "_" character inside the PMU name.
Signed-off-by: Hoan Tran
Signed-off-by: Will Deacon
29 May, 2018
1 commit
-
When the arm-cci driver is enabled, but both CONFIG_ARM_CCI5xx_PMU and
CONFIG_ARM_CCI400_PMU are not, we get a warning about how parts of
the driver are never used:drivers/perf/arm-cci.c:1454:29: error: 'cci_pmu_models' defined but not used [-Werror=unused-variable]
drivers/perf/arm-cci.c:693:16: error: 'cci_pmu_event_show' defined but not used [-Werror=unused-function]
drivers/perf/arm-cci.c:685:16: error: 'cci_pmu_format_show' defined but not used [-Werror=unused-function]Marking all three functions as __maybe_unused avoids the warnings in
randconfig builds. I'm doing this lacking any ideas for a better fix.Fixes: 3de6be7a3dd8 ("drivers/bus: Split Arm CCI driver")
Reviewed-by: Robin Murphy
Signed-off-by: Arnd Bergmann
Signed-off-by: Will Deacon
23 May, 2018
1 commit
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Since commit bddb9b68d3fb ("drivers/perf: commonise PERF_EVENTS
dependency"), all perf drivers depend on PERF_EVENTS config under a
common menu.Config ARM_SPE_PMU still declares explicitly a dependency on
PERF_EVENTS, which is unneeded, so remove it.Acked-by: Mark Rutland
Signed-off-by: John Garry
Signed-off-by: Will Deacon
22 May, 2018
7 commits
-
The ARM CCN PMU driver uses dev_warn() to complain about parameters in
the user-provided perf_event_attr. This means that under normal
operation (e.g. a single invocation of the perf tool), a number of
messages warnings may be logged to dmesg.Tools may issue multiple syscalls to probe for feature support, and
multiple applications (from multiple users) can attempt to open events
simultaneously, so this is not very helpful, even if a user happens to
have access to dmesg. Worse, this can push important information out of
the dmesg ring buffer, and can significantly slow down syscall fuzzers,
vastly increasing the time it takes to find critical bugs.Demote the dev_warn() instances to dev_dbg(), as is the case for all
other PMU drivers under drivers/perf/. Users who wish to debug PMU event
initialisation can enable dynamic debug to receive these messages.Signed-off-by: Mark Rutland
Cc: Pawel Moll
Cc: Will Deacon
Signed-off-by: Will Deacon -
Fill in the few extra bits and annotations needed to make the driver
work properly as a module, and jiggle the Kconfig to expose the
driver-level ARM_CCI_PMU option.Signed-off-by: Robin Murphy
Signed-off-by: Will Deacon -
The CCI PMU driver bears some legacy remnants of the arm_pmu framework
from when it was split in c6f85cb4305b ("bus: cci: move away from
arm_pmu framework"). In particular this perf_pmu_{dis,en}able() dance
around pmu->add which was fixed for arm_pmu in a9e469d1c89b
("drivers/perf: arm_pmu: remove pointless PMU disabling").For the exact same reasons (i.e. perf core already does this around the
call anyway), give cci_pmu_add() the exact same change, which also
prevents having to export those core functions to build it as a module.Acked-by: Mark Rutland
Signed-off-by: Robin Murphy
Signed-off-by: Will Deacon -
The CCI/CCN drivers are licensed under GPLv2, but the MODULE_LICENSE()
tags are using the bare "GPL" string implying GPLv2 or later. Fix them
to match their actual file license.Acked-by: Pawel Moll
Acked-by: Suzuki K Poulose
Signed-off-by: Robin Murphy
Signed-off-by: Will Deacon -
The arm_pmu::handle_irq() callback has the same prototype as a generic
IRQ handler, taking the IRQ number and a void pointer argument which it
must convert to an arm_pmu pointer.This means that all arm_pmu::handle_irq() take an IRQ number they never
use, and all must explicitly cast the void pointer to an arm_pmu
pointer.Instead, let's change arm_pmu::handle_irq to take an arm_pmu pointer,
allowing these casts to be removed. The redundant IRQ number parameter
is also removed.Suggested-by: Hoeun Ryu
Signed-off-by: Mark Rutland
Cc: Will Deacon
Signed-off-by: Will Deacon -
Since sampling events are rejected up-front by cci_pmu_event_init(), it
doesn't make much sense to go fiddling with the sampling period later.
This would seem to be just another leftover artefact of the arm_pmu
framwork, and as such can go.Acked-by: Mark Rutland
Signed-off-by: Robin Murphy
Signed-off-by: Will Deacon -
We should get drvdata from struct device directly. Going via
platform_device is an unneeded step back and forth.Signed-off-by: Wolfram Sang
Signed-off-by: Will Deacon
06 Apr, 2018
1 commit
-
Pull ARM SoC driver updates from Arnd Bergmann:
"The main addition this time around is the new ARM "SCMI" framework,
which is the latest in a series of standards coming from ARM to do
power management in a platform independent way.This has been through many review cycles, and it relies on a rather
interesting way of using the mailbox subsystem, but in the end I
agreed that Sudeep's version was the best we could do after all.Other changes include:
- the ARM CCN driver is moved out of drivers/bus into drivers/perf,
which makes more sense. Similarly, the performance monitoring
portion of the CCI driver are moved the same way and cleaned up a
little more.- a series of updates to the SCPI framework
- support for the Mediatek mt7623a SoC in drivers/soc
- support for additional NVIDIA Tegra hardware in drivers/soc
- a new reset driver for Socionext Uniphier
- lesser bug fixes in drivers/soc, drivers/tee, drivers/memory, and
drivers/firmware and drivers/reset across platforms"* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (87 commits)
reset: uniphier: add ethernet reset control support for PXs3
reset: stm32mp1: Enable stm32mp1 reset driver
dt-bindings: reset: add STM32MP1 resets
reset: uniphier: add Pro4/Pro5/PXs2 audio systems reset control
reset: imx7: add 'depends on HAS_IOMEM' to fix unmet dependency
reset: modify the way reset lookup works for board files
reset: add support for non-DT systems
clk: scmi: use devm_of_clk_add_hw_provider() API and drop scmi_clocks_remove
firmware: arm_scmi: prevent accessing rate_discrete uninitialized
hwmon: (scmi) return -EINVAL when sensor information is unavailable
amlogic: meson-gx-socinfo: Update soc ids
soc/tegra: pmc: Use the new reset APIs to manage reset controllers
soc: mediatek: update power domain data of MT2712
dt-bindings: soc: update MT2712 power dt-bindings
cpufreq: scmi: add thermal dependency
soc: mediatek: fix the mistaken pointer accessed when subdomains are added
soc: mediatek: add SCPSYS power domain driver for MediaTek MT7623A SoC
soc: mediatek: avoid hardcoded value with bus_prot_mask
dt-bindings: soc: add header files required for MT7623A SCPSYS dt-binding
dt-bindings: soc: add SCPSYS binding for MT7623 and MT7623A SoC
...
05 Apr, 2018
1 commit
-
Pull arm64 updates from Will Deacon:
"Nothing particularly stands out here, probably because people were
tied up with spectre/meltdown stuff last time around. Still, the main
pieces are:- Rework of our CPU features framework so that we can whitelist CPUs
that don't require kpti even in a heterogeneous system- Support for the IDC/DIC architecture extensions, which allow us to
elide instruction and data cache maintenance when writing out
instructions- Removal of the large memory model which resulted in suboptimal
codegen by the compiler and increased the use of literal pools,
which could potentially be used as ROP gadgets since they are
mapped as executable- Rework of forced signal delivery so that the siginfo_t is
well-formed and handling of show_unhandled_signals is consolidated
and made consistent between different fault types- More siginfo cleanup based on the initial patches from Eric
Biederman- Workaround for Cortex-A55 erratum #1024718
- Some small ACPI IORT updates and cleanups from Lorenzo Pieralisi
- Misc cleanups and non-critical fixes"
* tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (70 commits)
arm64: uaccess: Fix omissions from usercopy whitelist
arm64: fpsimd: Split cpu field out from struct fpsimd_state
arm64: tlbflush: avoid writing RES0 bits
arm64: cmpxchg: Include linux/compiler.h in asm/cmpxchg.h
arm64: move percpu cmpxchg implementation from cmpxchg.h to percpu.h
arm64: cmpxchg: Include build_bug.h instead of bug.h for BUILD_BUG
arm64: lse: Include compiler_types.h and export.h for out-of-line LL/SC
arm64: fpsimd: include in fpsimd.h
drivers/perf: arm_pmu_platform: do not warn about affinity on uniprocessor
perf: arm_spe: include linux/vmalloc.h for vmap()
Revert "arm64: Revert L1_CACHE_SHIFT back to 6 (64-byte cache line size)"
arm64: cpufeature: Avoid warnings due to unused symbols
arm64: Add work around for Arm Cortex-A55 Erratum 1024718
arm64: Delay enabling hardware DBM feature
arm64: Add MIDR encoding for Arm Cortex-A55 and Cortex-A35
arm64: capabilities: Handle shared entries
arm64: capabilities: Add support for checks based on a list of MIDRs
arm64: Add helpers for checking CPU MIDR against a range
arm64: capabilities: Clean up midr range helpers
arm64: capabilities: Change scope of VHE to Boot CPU feature
...
27 Mar, 2018
2 commits
-
If there is exactly one CPU present, there is no ambiguity: do not warn
that PMU setup would need to guess IRQ affinity.Cc: Mark Rutland
Cc: Will Deacon
Signed-off-by: Alexander Monakov
Signed-off-by: Will Deacon -
On linux-next, I get a build failure in some configurations:
drivers/perf/arm_spe_pmu.c: In function 'arm_spe_pmu_setup_aux':
drivers/perf/arm_spe_pmu.c:857:14: error: implicit declaration of function 'vmap'; did you mean 'swap'? [-Werror=implicit-function-declaration]
buf->base = vmap(pglist, nr_pages, VM_MAP, PAGE_KERNEL);
^~~~
swap
drivers/perf/arm_spe_pmu.c:857:37: error: 'VM_MAP' undeclared (first use in this function); did you mean 'VM_MPX'?
buf->base = vmap(pglist, nr_pages, VM_MAP, PAGE_KERNEL);
^~~~~~
VM_MPX
drivers/perf/arm_spe_pmu.c:857:37: note: each undeclared identifier is reported only once for each function it appears in
drivers/perf/arm_spe_pmu.c: In function 'arm_spe_pmu_free_aux':
drivers/perf/arm_spe_pmu.c:878:2: error: implicit declaration of function 'vunmap'; did you mean 'iounmap'? [-Werror=implicit-function-declaration]vmap() is declared in linux/vmalloc.h, so we should include that header file.
Acked-by: Mark Rutland
Signed-off-by: Arnd Bergmann
[will: add additional missing #includes reported by Mark]
Signed-off-by: Will Deacon
20 Mar, 2018
1 commit
-
Signed-off-by: Ingo Molnar
17 Mar, 2018
1 commit
-
Mark noticed that the change to sibling_list changed some iteration
semantics; because previously we used group_list as list entry,
sibling events would always have an empty sibling_list.But because we now use sibling_list for both list head and list entry,
siblings will report as having siblings.Fix this with a custom for_each_sibling_event() iterator.
Fixes: 8343aae66167 ("perf/core: Remove perf_event::group_entry")
Reported-by: Mark Rutland
Suggested-by: Mark Rutland
Signed-off-by: Peter Zijlstra (Intel)
Signed-off-by: Thomas Gleixner
Cc: vincent.weaver@maine.edu
Cc: alexander.shishkin@linux.intel.com
Cc: torvalds@linux-foundation.org
Cc: alexey.budankov@linux.intel.com
Cc: valery.cherepennikov@intel.com
Cc: eranian@google.com
Cc: acme@redhat.com
Cc: linux-tip-commits@vger.kernel.org
Cc: davidcc@google.com
Cc: kan.liang@intel.com
Cc: Dmitry.Prohorov@intel.com
Cc: jolsa@redhat.com
Link: https://lkml.kernel.org/r/20180315170129.GX4043@hirez.programming.kicks-ass.net
12 Mar, 2018
1 commit
-
Now that all the grouping is done with RB trees, we no longer need
group_entry and can replace the whole thing with sibling_list.Signed-off-by: Peter Zijlstra (Intel)
Acked-by: Mark Rutland
Cc: Alexander Shishkin
Cc: Alexey Budankov
Cc: Arnaldo Carvalho de Melo
Cc: David Carrillo-Cisneros
Cc: Dmitri Prokhorov
Cc: Jiri Olsa
Cc: Kan Liang
Cc: Linus Torvalds
Cc: Stephane Eranian
Cc: Thomas Gleixner
Cc: Valery Cherepennikov
Cc: Vince Weaver
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Ingo Molnar
07 Mar, 2018
5 commits
-
Depending directly on the bus driver's global cci_ctrl_base variable
is a little unpleasant, and exporting it to allow the PMU driver to
be modular would be even more so. Let's make things a little better
abstracted by adding the control register block to the cci_pmu instance
data alongside the PMU register block, and communicating the mapped
address from the bus driver via platform data.It's not practical to try the same thing for the bus driver itself,
given that the globals are entangled with the hairy assembly code for
port control, so we leave them be there. It would however be prudent
to move them to the __ro_after_init section in passing, since the
addresses really should never be changing once set.Signed-off-by: Robin Murphy
Signed-off-by: Arnd Bergmann -
Since I am the self-appointed of_device_get_match_data() police, it's
only right that I should clean up this driver while I'm otherwise
touching it. This also reveals that we're passing around a struct
platform_device in places where we only ever care about its regular
device, so straighten that out in the process.Acked-by: Punit Agrawal
Acked-by: Will Deacon
Signed-off-by: Robin Murphy
Signed-off-by: Arnd Bergmann -
Realistically, systems with multiple CCIs are unlikely to ever exist,
and since the driver only actually supports a single instance anyway
there's really no need to do the multi-instance hotplug state dance.Take the opportunity to simplify the hotplug-related code all over,
addressing the context-migration TODO in the process for good measure.Acked-by: Punit Agrawal
Acked-by: Will Deacon
Signed-off-by: Robin Murphy
Signed-off-by: Arnd Bergmann -
The arm-cci driver is really two entirely separate drivers; one for MCPM
port control and the other for the performance monitors. Since they are
already relatively self-contained, let's take the plunge and move the
PMU parts out to drivers/perf where they belong these days. For non-MCPM
systems this leaves a small dependency on the remaining "bus" stub for
initial probing and discovery, but we end up with something that still
fits the general pattern of its fellow system PMU drivers to ease future
maintenance.Moving code to a new file also offers a perfect excuse to modernise the
license/copyright headers and clean up some funky linewraps on the way.Cc: Lorenzo Pieralisi
Reviewed-by: Suzuki Poulose
Acked-by: Punit Agrawal
Signed-off-by: Robin Murphy
Signed-off-by: Arnd Bergmann -
The arm-ccn driver is purely a perf driver for the CCN PMU, not a bus
driver in the sense of the other residents of drivers/bus/, so let's
move it to the appropriate place for SoC PMU drivers. Not to mention
moving the documentation accordingly as well.Acked-by: Pawel Moll
Acked-by: Will Deacon
Signed-off-by: Robin Murphy
Signed-off-by: Arnd Bergmann
28 Feb, 2018
1 commit
-
Commit 6de3f79112cc ("arm_pmu: explicitly enable/disable SPIs at hotplug")
moved all of the arm_pmu IRQ enable/disable calls to the CPU hotplug hooks,
regardless of whether they are implemented as PPIs or SPIs. This can
lead to us sleeping from atomic context due to disable_irq blocking:| BUG: sleeping function called from invalid context at kernel/irq/manage.c:112
| in_atomic(): 1, irqs_disabled(): 128, pid: 15, name: migration/1
| no locks held by migration/1/15.
| irq event stamp: 192
| hardirqs last enabled at (191): []
| _raw_spin_unlock_irq+0x2c/0x4c
| hardirqs last disabled at (192): [] multi_cpu_stop+0x9c/0x140
| softirqs last enabled at (0): []
| copy_process.isra.77.part.78+0x43c/0x1504
| softirqs last disabled at (0): [< (null)>] (null)
| CPU: 1 PID: 15 Comm: migration/1 Not tainted 4.16.0-rc3-salvator-x #1651
| Hardware name: Renesas Salvator-X board based on r8a7796 (DT)
| Call trace:
| dump_backtrace+0x0/0x140
| show_stack+0x14/0x1c
| dump_stack+0xb4/0xf0
| ___might_sleep+0x1fc/0x218
| __might_sleep+0x70/0x80
| synchronize_irq+0x40/0xa8
| disable_irq+0x20/0x2c
| arm_perf_teardown_cpu+0x80/0xacSince the interrupt is always CPU-affine and this code is running with
interrupts disabled, we can just use disable_irq_nosync as we know there
isn't a concurrent invocation of the handler to worry about.Fixes: 6de3f79112cc ("arm_pmu: explicitly enable/disable SPIs at hotplug")
Reported-by: Geert Uytterhoeven
Tested-by: Geert Uytterhoeven
Acked-by: Mark Rutland
Signed-off-by: Will Deacon
Signed-off-by: Catalin Marinas
20 Feb, 2018
5 commits
-
We can't request IRQs in atomic context, so for ACPI systems we'll have
to request them up-front, and later associate them with CPUs.This patch reorganises the arm_pmu code to do so. As we no longer have
the arm_pmu structure at probe time, a number of prototypes need to be
adjusted, requiring changes to the common arm_pmu code and arm_pmu
platform code.Signed-off-by: Mark Rutland
Cc: Will Deacon
Signed-off-by: Will Deacon -
To support ACPI systems, we need to request IRQs before we know the
associated PMU, and thus we need some percpu variable that the IRQ
handler can find the PMU from.As we're going to request IRQs without the PMU, we can't rely on the
arm_pmu::active_irqs mask, and similarly need to track requested IRQs
with a percpu variable.Signed-off-by: Mark Rutland
[will: made armpmu_count_irq_users static]
Signed-off-by: Will Deacon -
To support ACPI systems, we need to request IRQs before CPUs are
hotplugged, and thus we need to request IRQs before we know their
associated PMU.This is problematic if a PMU IRQ is pending out of reset, as it may be
taken before we know the PMU, and thus the IRQ handler won't be able to
handle it, leaving it screaming.To avoid such problems, lets request all IRQs in a disabled state, and
explicitly enable/disable them at hotplug time, when we're sure the PMU
has been probed.Signed-off-by: Mark Rutland
Cc: Will Deacon
Signed-off-by: Will Deacon -
The arm_pmu platform code explicitly checks for mismatched PPIs at probe
time, while the ACPI code leaves this to the core code. Future
refactoring will make this difficult for the core code to check, so
let's have the ACPI code check this explicitly.As before, upon a failure we'll continue on without an interrupt. Ho
hum.Signed-off-by: Mark Rutland
Cc: Will Deacon
Signed-off-by: Will Deacon -
In ACPI systems, we don't know the makeup of CPUs until we hotplug them
on, and thus have to allocate the PMU datastructures at hotplug time.
Thus, we must use GFP_ATOMIC allocations.Let's add an armpmu_alloc_atomic() that we can use in this case.
Signed-off-by: Mark Rutland
Cc: Will Deacon
Signed-off-by: Will Deacon