27 Jul, 2015
29 commits
-
Move the now generic definitions of atomic_{set,clear}_mask() into
linux/atomic.h to avoid endless and pointless repetition.Also, provide an atomic_andnot() wrapper for those few archs that can
implement that.Signed-off-by: Peter Zijlstra (Intel)
Signed-off-by: Thomas Gleixner -
Implement atomic logic ops -- atomic_{or,xor,and}.
These will replace the atomic_{set,clear}_mask functions that are
available on some archs.Signed-off-by: Peter Zijlstra (Intel)
Signed-off-by: Thomas Gleixner -
Implement atomic logic ops -- atomic_{or,xor,and}.
For tilegx, these are relatively straightforward; the architecture
provides atomic "or" and "and", both 32-bit and 64-bit. To support
xor we provide a loop using "cmpexch".For the older 32-bit tilepro architecture, we have to extend
the set of low-level assembly routines to include 32-bit "and",
as well as all three 64-bit routines. Somewhat confusingly,
some 32-bit versions are already used by the bitops inlines, with
parameter types appropriate for bitops, so we have to do a bit of
casting to match "int" to "unsigned long".Signed-off-by: Chris Metcalf
Signed-off-by: Peter Zijlstra (Intel)
Link: http://lkml.kernel.org/r/1436474297-32187-1-git-send-email-cmetcalf@ezchip.com
Signed-off-by: Thomas Gleixner -
Implement atomic logic ops -- atomic_{or,xor,and}
These will replace the atomic_{set,clear}_mask functions that are
available on some archs.Also rework the atomic implementation in terms of CPP macros to avoid
the typical repetition -- I seem to have missed this arch the last
time around when I did that.Signed-off-by: Peter Zijlstra (Intel)
Signed-off-by: Thomas Gleixner -
Mostly complete rewrite of the FRV atomic implementation, instead of
using assembly files, use inline assembler.The out-of-line CONFIG option makes a bit of a mess of things, but a
little CPP trickery gets that done too.FRV already had the atomic logic ops but under a non standard name,
the reimplementation provides the generic names and provides the
intermediate form required for the bitops implementation.The slightly inconsistent __atomic32_fetch_##op naming is because
__atomic_fetch_##op conlicts with GCC builtin functions.The 64bit atomic ops use the inline assembly %Ln construct to access
the low word register (r+1), afaik this construct was not previously
used in the kernel and is completely undocumented, but I found it in
the FRV GCC code and it seems to work.FRV had a non-standard definition of atomic_{clear,set}_mask() which
would work types other than atomic_t, the one user relying on that
(arch/frv/kernel/dma.c) got converted to use the new intermediate
form.Signed-off-by: Peter Zijlstra (Intel)
Signed-off-by: Thomas Gleixner -
Implement atomic logic ops -- atomic_{or,xor,and}.
These will replace the atomic_{set,clear}_mask functions that are
available on some archs.Signed-off-by: Peter Zijlstra (Intel)
Signed-off-by: Thomas Gleixner -
Implement atomic logic ops -- atomic_{or,xor,and}.
These will replace the atomic_{set,clear}_mask functions that are
available on some archs.Acked-by: Heiko Carstens
Signed-off-by: Peter Zijlstra (Intel)
Signed-off-by: Thomas Gleixner -
Implement atomic logic ops -- atomic_{or,xor,and}.
These will replace the atomic_{set,clear}_mask functions that are
available on some archs.Signed-off-by: Peter Zijlstra (Intel)
Signed-off-by: Thomas Gleixner -
Implement atomic logic ops -- atomic_{or,xor,and}.
These will replace the atomic_{set,clear}_mask functions that are
available on some archs.Acked-by: David S. Miller
Signed-off-by: Peter Zijlstra (Intel)
Signed-off-by: Thomas Gleixner -
Implement atomic logic ops -- atomic_{or,xor,and}.
These will replace the atomic_{set,clear}_mask functions that are
available on some archs.Signed-off-by: Peter Zijlstra (Intel)
Signed-off-by: Thomas Gleixner -
Implement atomic logic ops -- atomic_{or,xor,and}.
These will replace the atomic_{set,clear}_mask functions that are
available on some archs.Acked-by: Benjamin Herrenschmidt
Signed-off-by: Peter Zijlstra (Intel)
Signed-off-by: Thomas Gleixner -
Implement atomic logic ops -- atomic_{or,xor,and}.
These will replace the atomic_{set,clear}_mask functions that are
available on some archs.Signed-off-by: Peter Zijlstra (Intel)
Signed-off-by: Thomas Gleixner -
Implement atomic logic ops -- atomic_{or,xor,and}.
These will replace the atomic_{set,clear}_mask functions that are
available on some archs.Signed-off-by: Peter Zijlstra (Intel)
Signed-off-by: Thomas Gleixner -
Implement atomic logic ops -- atomic_{or,xor,and}.
These will replace the atomic_{set,clear}_mask functions that are
available on some archs.Acked-by: Ralf Baechle
Signed-off-by: Peter Zijlstra (Intel)
Signed-off-by: Thomas Gleixner -
Implement atomic logic ops -- atomic_{or,xor,and}.
These will replace the atomic_{set,clear}_mask functions that are
available on some archs.Signed-off-by: Peter Zijlstra (Intel)
Signed-off-by: Thomas Gleixner -
Implement atomic logic ops -- atomic_{or,xor,and}.
These will replace the atomic_{set,clear}_mask functions that are
available on some archs.Acked-by: Geert Uytterhoeven
Signed-off-by: Peter Zijlstra (Intel)
Signed-off-by: Thomas Gleixner -
Implement atomic logic ops -- atomic_{or,xor,and}.
These will replace the atomic_{set,clear}_mask functions that are
available on some archs.Signed-off-by: Peter Zijlstra (Intel)
Signed-off-by: Thomas Gleixner -
Implement atomic logic ops -- atomic_{or,xor,and}.
These will replace the atomic_{set,clear}_mask functions that are
available on some archs.Signed-off-by: Peter Zijlstra (Intel)
Signed-off-by: Thomas Gleixner -
Implement atomic logic ops -- atomic_{or,xor,and}.
These will replace the atomic_{set,clear}_mask functions that are
available on some archs.Signed-off-by: Peter Zijlstra (Intel)
Signed-off-by: Thomas Gleixner -
Implement atomic logic ops -- atomic_{or,xor,and}.
These will replace the atomic_{set,clear}_mask functions that are
available on some archs.TODO: use inline asm or at least asm macros to collapse the lot.
Signed-off-by: Peter Zijlstra (Intel)
Signed-off-by: Thomas Gleixner -
Implement atomic logic ops -- atomic_{or,xor,and}.
These will replace the atomic_{set,clear}_mask functions that are
available on some archs.Signed-off-by: Peter Zijlstra (Intel)
Signed-off-by: Thomas Gleixner -
Implement atomic logic ops -- atomic_{or,xor,and}.
These will replace the atomic_{set,clear}_mask functions that are
available on some archs.Signed-off-by: Peter Zijlstra (Intel)
Signed-off-by: Thomas Gleixner -
Implement atomic logic ops -- atomic_{or,xor,and}.
These will replace the atomic_{set,clear}_mask functions that are
available on some archs.Signed-off-by: Peter Zijlstra (Intel)
Signed-off-by: Thomas Gleixner -
Implement atomic logic ops -- atomic_{or,xor,and}.
These will replace the atomic_{set,clear}_mask functions that are
available on some archs.Acked-by: Vineet Gupta
Signed-off-by: Peter Zijlstra (Intel)
Signed-off-by: Thomas Gleixner -
Implement atomic logic ops -- atomic_{or,xor,and}.
These will replace the atomic_{set,clear}_mask functions that are
available on some archs.Signed-off-by: Peter Zijlstra (Intel)
Signed-off-by: Thomas Gleixner -
Clean up the #ifdef guards a bit to prepare for architectures to
supply their own logic ops.Signed-off-by: Peter Zijlstra (Intel)
Signed-off-by: Thomas Gleixner -
Pull perf fix from Thomas Gleixner:
"A single fix for the intel cqm perf facility to prevent IPIs from
interrupt context"* 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
perf/x86/intel/cqm: Return cached counter value from IRQ context -
Pull x86 fixes from Thomas Gleixner:
"This update contains:- the manual revert of the SYSCALL32 changes which caused a
regression- a fix for the MPX vma handling
- three fixes for the ioremap 'is ram' checks.
- PAT warning fixes
- a trivial fix for the size calculation of TLB tracepoints
- handle old EFI structures gracefully
This also contains a PAT fix from Jan plus a revert thereof. Toshi
explained why the code is correct"* 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86/mm/pat: Revert 'Adjust default caching mode translation tables'
x86/asm/entry/32: Revert 'Do not use R9 in SYSCALL32' commit
x86/mm: Fix newly introduced printk format warnings
mm: Fix bugs in region_is_ram()
x86/mm: Remove region_is_ram() call from ioremap
x86/mm: Move warning from __ioremap_check_ram() to the call site
x86/mm/pat, drivers/media/ivtv: Move the PAT warning and replace WARN() with pr_warn()
x86/mm/pat, drivers/infiniband/ipath: Replace WARN() with pr_warn()
x86/mm/pat: Adjust default caching mode translation tables
x86/fpu: Disable dependent CPU features on "noxsave"
x86/mpx: Do not set ->vm_ops on MPX VMAs
x86/mm: Add parenthesis for TLB tracepoint size calculation
efi: Handle memory error structures produced based on old versions of standard
26 Jul, 2015
11 commits
-
Toshi explains:
"No, the default values need to be set to the fallback types,
i.e. minimal supported mode. For WC and WT, UC is the fallback type.When PAT is disabled, pat_init() does update the tables below to
enable WT per the default BIOS setup. However, when PAT is enabled,
but CPU has PAT -errata, WT falls back to UC per the default values."Revert: ca1fec58bc6a 'x86/mm/pat: Adjust default caching mode translation tables'
Requested-by: Toshi Kani
Cc: Jan Beulich
Link: http://lkml.kernel.org/r/1437577776.3214.252.camel@hp.com
Signed-off-by: Thomas Gleixner -
Peter reported the following potential crash which I was able to
reproduce with his test program,[ 148.765788] ------------[ cut here ]------------
[ 148.765796] WARNING: CPU: 34 PID: 2840 at kernel/smp.c:417 smp_call_function_many+0xb6/0x260()
[ 148.765797] Modules linked in:
[ 148.765800] CPU: 34 PID: 2840 Comm: perf Not tainted 4.2.0-rc1+ #4
[ 148.765803] ffffffff81cdc398 ffff88085f105950 ffffffff818bdfd5 0000000000000007
[ 148.765805] 0000000000000000 ffff88085f105990 ffffffff810e413a 0000000000000000
[ 148.765807] ffffffff82301080 0000000000000022 ffffffff8107f640 ffffffff8107f640
[ 148.765809] Call Trace:
[ 148.765810] [] dump_stack+0x45/0x57
[ 148.765818] [] warn_slowpath_common+0x8a/0xc0
[ 148.765822] [] ? intel_cqm_stable+0x60/0x60
[ 148.765824] [] ? intel_cqm_stable+0x60/0x60
[ 148.765825] [] warn_slowpath_null+0x1a/0x20
[ 148.765827] [] smp_call_function_many+0xb6/0x260
[ 148.765829] [] ? intel_cqm_stable+0x60/0x60
[ 148.765831] [] on_each_cpu_mask+0x28/0x60
[ 148.765832] [] intel_cqm_event_count+0x7f/0xe0
[ 148.765836] [] perf_output_read+0x2a5/0x400
[ 148.765839] [] perf_output_sample+0x31a/0x590
[ 148.765840] [] ? perf_prepare_sample+0x26d/0x380
[ 148.765841] [] perf_event_output+0x47/0x60
[ 148.765843] [] __perf_event_overflow+0x215/0x240
[ 148.765844] [] perf_event_overflow+0x14/0x20
[ 148.765847] [] intel_pmu_handle_irq+0x1d4/0x440
[ 148.765849] [] ? __perf_event_task_sched_in+0x36/0xa0
[ 148.765853] [] ? vunmap_page_range+0x19d/0x2f0
[ 148.765854] [] ? unmap_kernel_range_noflush+0x11/0x20
[ 148.765859] [] ? ghes_copy_tofrom_phys+0x11e/0x2a0
[ 148.765863] [] ? native_apic_msr_write+0x2b/0x30
[ 148.765865] [] ? x2apic_send_IPI_self+0x1d/0x20
[ 148.765869] [] ? arch_irq_work_raise+0x35/0x40
[ 148.765872] [] ? irq_work_queue+0x66/0x80
[ 148.765875] [] perf_event_nmi_handler+0x26/0x40
[ 148.765877] [] nmi_handle+0x79/0x100
[ 148.765879] [] default_do_nmi+0x42/0x100
[ 148.765880] [] do_nmi+0x83/0xb0
[ 148.765884] [] end_repeat_nmi+0x1e/0x2e
[ 148.765886] [] ? __perf_event_task_sched_in+0x36/0xa0
[ 148.765888] [] ? __perf_event_task_sched_in+0x36/0xa0
[ 148.765890] [] ? __perf_event_task_sched_in+0x36/0xa0
[ 148.765891] <> [] finish_task_switch+0x156/0x210
[ 148.765898] [] __schedule+0x341/0x920
[ 148.765899] [] schedule+0x37/0x80
[ 148.765903] [] ? do_page_fault+0x2f/0x80
[ 148.765905] [] schedule_user+0x1a/0x50
[ 148.765907] [] retint_careful+0x14/0x32
[ 148.765908] ---[ end trace e33ff2be78e14901 ]---The CQM task events are not safe to be called from within interrupt
context because they require performing an IPI to read the counter value
on all sockets. And performing IPIs from within IRQ context is a
"no-no".Make do with the last read counter value currently event in
event->count when we're invoked in this context.Reported-by: Peter Zijlstra
Signed-off-by: Matt Fleming
Cc: Thomas Gleixner
Cc: Vikas Shivappa
Cc: Kanaka Juvva
Cc: Will Auld
Cc:
Link: http://lkml.kernel.org/r/1437490509-15373-1-git-send-email-matt@codeblueprint.co.uk
Signed-off-by: Thomas Gleixner -
Pull USB fixes from Greg KH:
"Here's a few USB and PHY fixes for 4.2-rc4.Nothing major, the shortlog has the full details.
All of these have been in linux-next successfully"
* tag 'usb-4.2-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (21 commits)
USB: OHCI: fix bad #define in ohci-tmio.c
cdc-acm: Destroy acm_minors IDR on module exit
usb-storage: Add ignore-device quirk for gm12u320 based usb mini projectors
usb-storage: ignore ZTE MF 823 card reader in mode 0x1225
USB: OHCI: Fix race between ED unlink and URB submission
usb: core: lpm: set lpm_capable for root hub device
xhci: do not report PLC when link is in internal resume state
xhci: prevent bus_suspend if SS port resuming in phase 1
xhci: report U3 when link is in resume state
xhci: Calculate old endpoints correctly on device reset
usb: xhci: Bugfix for NULL pointer deference in xhci_endpoint_init() function
xhci: Workaround to get D3 working in Intel xHCI
xhci: call BIOS workaround to enable runtime suspend on Intel Braswell
usb: dwc3: Reset the transfer resource index on SET_INTERFACE
usb: gadget: udc: core: Fix argument of dma_map_single for IOMMU
usb: gadget: mv_udc_core: fix phy_regs I/O memory leak
usb: ulpi: ulpi_init should be executed in subsys_initcall
phy: berlin-usb: fix divider for BG2
phy: berlin-usb: fix divider for BG2CD
phy/pxa: add HAS_IOMEM dependency
... -
Pull tty/serial driver fixes from Greg KH:
"Here are a number of small serial and tty fixes for reported issues.All have been in linux-next successfully"
* tag 'tty-4.2-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty:
tty: vt: Fix !TASK_RUNNING diagnostic warning from paste_selection()
serial: core: Fix crashes while echoing when closing
m32r: Add ioreadXX/iowriteXX big-endian mmio accessors
Revert "serial: imx: initialized DMA w/o HW flow enabled"
sc16is7xx: fix FIFO address of secondary UART
sc16is7xx: fix Kconfig dependencies
serial: etraxfs-uart: Fix release etraxfs_uart_ports
tty/vt: Fix the memory leak in visual_init
serial: amba-pl011: Fix devm_ioremap_resource return value check
n_tty: signal and flush atomically -
Pull staging driver fixes from Greg KH:
"Here are a number of iio and staging driver fixes for reported issues
for 4.2-rc4.All have been in linux-next for a while with no problems"
* tag 'staging-4.2-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging: (34 commits)
iio:light:stk3310: make endianness independent of host
iio:light:stk3310: move device register to end of probe
iio: mma8452: use iio event type IIO_EV_TYPE_MAG
iio: mcp320x: Fix NULL pointer dereference
iio: adc: vf610: fix the adc register read fail issue
iio: mlx96014: Replace offset sign
iio: magnetometer: mmc35240: fix SET/RESET sequence
iio: magnetometer: mmc35240: Fix SET/RESET mask
iio: magnetometer: mmc35240: Fix crash in pm suspend
iio:magnetometer:bmc150_magn: output intended variable
iio:magnetometer:bmc150_magn: add regmap dependency
staging: vt6656: check ieee80211_bss_conf bssid not NULL
staging: vt6655: check ieee80211_bss_conf bssid not NULL
iio: tmp006: Check channel info on write
iio: sx9500: Add missing init in sx9500_buffer_pre{en,dis}able()
iio:light:ltr501: fix regmap dependency
iio:light:ltr501: fix variable in ltr501_init
iio: sx9500: fix bug in compensation code
iio: sx9500: rework error handling of raw readings
iio: magnetometer: mmc35240: fix available sampling frequencies
... -
Pull char/misc driver fixes from Greg KH:
"Here are some char and misc driver fixes for reported issues.One parport patch is reverted as it was incorrect, thanks to testing
by the 0-day bot"* tag 'char-misc-4.2-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc:
parport: Revert "parport: fix memory leak"
mei: prevent unloading mei hw modules while the device is opened.
misc: mic: scif bug fix for vmalloc_to_page crash
parport: fix freeing freed memory
parport: fix memory leak
parport: fix error handling -
This reverts commit 23c405912b88 ("parport: fix memory leak")
par_dev->state was already being removed in parport_unregister_device().
Reported-by: Ying Huang
Signed-off-by: Sudip Mukherjee
Signed-off-by: Greg Kroah-Hartman -
Pull ftrace fix from Steven Rostedt:
"Back in 3.16 the ftrace code was redesigned and cleaned up to remove
the double iteration list (one for registered ftrace ops, and one for
registered "global" ops), to just use one list. That simplified the
code but also broke the function tracing filtering on pid.This updates the code to handle the filtering again with the new
logic"* tag 'trace-v4.2-rc2-fix3' of git://git.kernel.org/pub/scm/linux/kernel/git/rostedt/linux-trace:
ftrace: Fix breakage of set_ftrace_pid -
Pull libnvdimm fix from Dan Williams:
"A minor fix for the libnvdimm subsystem.This is not critical. The problem can be worked around in userspace
by putting the namespace temporarily into raw mode
(ndctl_namespace_set_raw_mode() from libndctl), but that is awkward
for management utilities.* 'libnvdimm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/nvdimm:
libnvdimm: fix namespace seed creation -
Pull md fixes from Neil Brown:
"Some md fixes for 4.2Several are tagged for -stable.
A few aren't because they are not very, serious or because they are in
the 'experimental' cluster code"* tag 'md/4.2-fixes' of git://neil.brown.name/md:
md/raid5: clear R5_NeedReplace when no longer needed.
Fix read-balancing during node failure
md-cluster: fix bitmap sub-offset in bitmap_read_sb
md: Return error if request_module fails and returns positive value
md: Skip cluster setup in case of error while reading bitmap
md/raid1: fix test for 'was read error from last working device'.
md: Skip cluster setup for dm-raid
md: flush ->event_work before stopping array.
md/raid10: always set reshape_safe when initializing reshape_position.
md/raid5: avoid races when changing cache size. -
Pull MTD fixes from Brian Norris:
"Two trivial updates. I meant to send these much earlier, but I've
been preoccupied.- Add MAINTAINERS entry for diskonchip g3 driver
- Fix an overlooked conflict in bitfield value assignments
The latter update is a bit overdue, but there's no reason to wait any
longer"* tag 'for-linus-20150724' of git://git.infradead.org/linux-mtd:
mtd: nand: Fix NAND_USE_BOUNCE_BUFFER flag conflict
MAINTAINERS: mtd: docg3: add docg3 maintainer
