01 Feb, 2020
1 commit
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Pull more power manadement updates from Rafael Wysocki:
"Prevent cpufreq from creating excessively large stack frames and fix
the handling of devices deleted during system-wide resume in the PM
core (Rafael Wysocki), revert a problematic commit affecting the
cpupower utility and correct its man page (Thomas Renninger,
Brahadambal Srinivasan), and improve the intel_pstate_tracer utility
(Doug Smythies)"* tag 'pm-5.6-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm:
tools/power/x86/intel_pstate_tracer: change several graphs to autoscale y-axis
tools/power/x86/intel_pstate_tracer: changes for python 3 compatibility
Correction to manpage of cpupower
cpufreq: Avoid creating excessively large stack frames
PM: core: Fix handling of devices deleted during system-wide resume
cpupower: Revert library ABI changes from commit ae2917093fb60bdc1ed3e
29 Jan, 2020
4 commits
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Processors have exceeded some of the fixed y-axis scale maximum values.
Change them to autoscale the y-axis.Signed-off-by: Doug Smythies
Signed-off-by: Rafael J. Wysocki -
Some syntax needs to be more rigorous for python 3.
Backwards compatibility tested with python 2.7Signed-off-by: Doug Smythies
Signed-off-by: Rafael J. Wysocki -
Pull cpupower utility updates for v5.6 from Shuah Khan:
"This cpupower update for Linux 5.6-rc1 consists of a revert
from Thomas Renninger and a manpage correction from Brahadambal
Srinivasan."* tag 'linux-cpupower-5.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/shuah/linux:
Correction to manpage of cpupower
cpupower: Revert library ABI changes from commit ae2917093fb60bdc1ed3e -
Pull x86 cpu-features updates from Ingo Molnar:
"The biggest change in this cycle was a large series from Sean
Christopherson to clean up the handling of VMX features. This both
fixes bugs/inconsistencies and makes the code more coherent and
future-proof.There are also two cleanups and a minor TSX syslog messages
enhancement"* 'x86-cpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (23 commits)
x86/cpu: Remove redundant cpu_detect_cache_sizes() call
x86/cpu: Print "VMX disabled" error message iff KVM is enabled
KVM: VMX: Allow KVM_INTEL when building for Centaur and/or Zhaoxin CPUs
perf/x86: Provide stubs of KVM helpers for non-Intel CPUs
KVM: VMX: Use VMX_FEATURE_* flags to define VMCS control bits
KVM: VMX: Check for full VMX support when verifying CPU compatibility
KVM: VMX: Use VMX feature flag to query BIOS enabling
KVM: VMX: Drop initialization of IA32_FEAT_CTL MSR
x86/cpufeatures: Add flag to track whether MSR IA32_FEAT_CTL is configured
x86/cpu: Set synthetic VMX cpufeatures during init_ia32_feat_ctl()
x86/cpu: Print VMX flags in /proc/cpuinfo using VMX_FEATURES_*
x86/cpu: Detect VMX features on Intel, Centaur and Zhaoxin CPUs
x86/vmx: Introduce VMX_FEATURES_*
x86/cpu: Clear VMX feature flag if VMX is not fully enabled
x86/zhaoxin: Use common IA32_FEAT_CTL MSR initialization
x86/centaur: Use common IA32_FEAT_CTL MSR initialization
x86/mce: WARN once if IA32_FEAT_CTL MSR is left unlocked
x86/intel: Initialize IA32_FEAT_CTL MSR at boot
tools/x86: Sync msr-index.h from kernel sources
selftests, kvm: Replace manual MSR defs with common msr-index.h
...
28 Jan, 2020
1 commit
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Pull ACPI updates from Rafael Wysocki:
"These update the ACPICA code in the kernel to the most recent upstream
revision (20200110), add new hardware support to a handful of ACPI
drivers, make the ACPI fan driver expose power states information for
fans, add some more quirks, fix bugs and clean up assorted things.Specifics:
- Update the ACPICA code in the kernel to upstream revision 20200110
including:
- Update of copyright notices to 2020 (Bob Moore).
- Dispatcher fix to always generate buffer objects for the ASL
create_field() operator (Maximilian Luz).
- Debugger cleanup (Colin Ian King).
- Disassembler change to create buffer fields in
ACPI_PARSE_LOAD_PASS1 (Erik Kaneda).
- UNIX line ending support for non-windows builds in acpisrc (Erik
Kaneda).- Update the list of ACPICA maintainers (Rafael Wysocki).
- Add Intel Tiger Lake ACPI device IDs to the ACPI DPTF, ACPI fan,
int340x_thermal and intel-hid drivers (Gayatri Kammela).- Make the ACPI fan driver create additional sysfs attributes to
expose power states information for fans (Srinivas Pandruvada).- Fix up the ACPI battery driver to deal with unexpected battery
capacity information in a better way (Hans de Goede).- Add ACPI backlight quirks for Lenovo E41-25/45 and MSI MS-7721
boards (Aaron Ma, Hans de Goede).- Add DMI quirk for Razer Blade Stealth 13 late 2019 lid switch to
the ACPI button driver (Jason Ekstrand).- Drop TIMER_DEFERRABLE from the GHES polling mode timer function
flags to make it run precisely at the configured time (Bhaskar
Upadhaya).- Fix race condition related to the reference counting of query
handlers in the ACPI EC driver (Rafael Wysocki).- Fix ACPI tools build issue (Zhengyuan Liu).
- Replace dma_request_slave_channel() with dma_request_chan() in the
firmware guide documentation for ACPI (Peter Ujfalusi).- Fix typo in a comment and clean up function parameter data type
inconsistencies (Kacper Piwiński, Tian Tao)"* tag 'acpi-5.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (25 commits)
ACPICA: Update version to 20200110
ACPICA: All acpica: Update copyrights to 2020 Including tool signons.
apei/ghes: Do not delay GHES polling
ACPI: button: Add DMI quirk for Razer Blade Stealth 13 late 2019 lid switch
ACPI: PPTT: Consistently use unsigned int as parameter type
ACPI: EC: Reference count query handlers under lock
ACPICA: Update the list of maintainers
ACPICA: Update version to 20191213
ACPICA: Dispatcher: always generate buffer objects for ASL create_field() operator
ACPICA: acpisrc: add unix line ending support for non-windows build
ACPICA: Disassembler: create buffer fields in ACPI_PARSE_LOAD_PASS1
ACPICA: debugger: fix spelling mistake "adress" -> "address"
ACPI: video: Do not export a non working backlight interface on MSI MS-7721 boards
docs: firmware-guide: ACPI: Replace dma_request_slave_channel() with dma_request_chan()
thermal: int340x_thermal: Add Tiger Lake ACPI device IDs
platform/x86: intel-hid: Add Tiger Lake ACPI device ID
ACPI: fan: Add Tiger Lake ACPI device ID
ACPI: DPTF: Add Tiger Lake ACPI device IDs
ACPI: fan: Expose fan performance state information
tools/power/acpi: fix compilation error
...
27 Jan, 2020
2 commits
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Manpage of cpupower is listing wrong sub-commands in "See Also"
section. The option for cpupower-idle(1) should actually be
cpupower-idle-info(1) and cpupower-idle-set(1). This patch corrects
this anomaly.Signed-off-by: Brahadambal Srinivasan
Signed-off-by: Shuah Khan -
* acpi-tables:
ACPI: PPTT: Consistently use unsigned int as parameter type* acpi-button:
ACPI: button: Add DMI quirk for Razer Blade Stealth 13 late 2019 lid switch* acpi-ec:
ACPI: EC: Reference count query handlers under lock* acpi-doc:
docs: firmware-guide: ACPI: Replace dma_request_slave_channel() with dma_request_chan()* acpi-tools:
tools/power/acpi: fix compilation error
20 Jan, 2020
4 commits
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As we added new set of mailbox commands, increment version.
Signed-off-by: Srinivas Pandruvada
Signed-off-by: Andy Shevchenko -
In turbo-freq or base-freq auto mode, for disable, first disable the feature and
then disable clos.Signed-off-by: Srinivas Pandruvada
Signed-off-by: Andy Shevchenko -
The turbo-freq enable with auto mode, prints result for the last possible
CPU, which is not correct when either CPU is not present or user wants
command to be limited to a single die/package. For example, in the
below command user wants to limit to die/package 0, but the
"turbo-freq --auto" result is displayed using the other package.$ sudo intel-speed-select -c 0 turbo-freq enable -a
Intel(R) Speed Select Technology
package-0
die-0
cpu-0
turbo-freq
enable:success
package--1
die-0
cpu-31
turbo-freq --auto
enable:successSince we do have to traverse all CPUs, don't display CPU info for
"turbo-freq --auto", as we already displayed the result for
turbo-freq enable with the CPU information.With the fix, the same command results in:
$ sudo intel-speed-select -c 0 turbo-freq enable -a
Intel(R) Speed Select Technology
package-0
die-0
cpu-0
turbo-freq
enable:success
turbo-freq --auto
enable:successSigned-off-by: Srinivas Pandruvada
Signed-off-by: Andy Shevchenko -
It is possible that BIOS may not enable core-power feature. In this case
this additional interface will allow to enable from this utility. Also
the information dump, includes the current status of core-power.Signed-off-by: Srinivas Pandruvada
Signed-off-by: Andy Shevchenko
18 Jan, 2020
1 commit
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Commit ae2917093fb6 ("tools/power/cpupower: Display boost frequency
separately") modified the library function:struct cpufreq_available_frequencies
*cpufreq_get_available_frequencies(unsigned int cpu)to
struct cpufreq_frequencies
*cpufreq_get_frequencies(const char *type, unsigned int cpu)This patch recovers the old API and implements the new functionality
in a newly introduce method:
struct cpufreq_boost_frequencies
*cpufreq_get_available_frequencies(unsigned int cpu)This one should get merged into stable kernels back to 5.0 when
the above had been introduced.Fixes: ae2917093fb6 ("tools/power/cpupower: Display boost frequency separately")
Cc: stable@vger.kernel.org
Signed-off-by: Thomas Renninger
Signed-off-by: Shuah Khan
14 Jan, 2020
1 commit
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Sync msr-index.h to pull in recent renames of the IA32_FEATURE_CONTROL
MSR definitions. Update KVM's VMX selftest and turbostat accordingly.
Keep the full name in turbostat's output to avoid breaking someone's
workflow, e.g. if a script is looking for the full name.While using the renamed defines is by no means necessary, do the sync
now to avoid leaving a landmine that will get stepped on the next time
msr-index.h needs to be refreshed for some other reason.No functional change intended.
Signed-off-by: Sean Christopherson
Signed-off-by: Borislav Petkov
Link: https://lkml.kernel.org/r/20191221044513.21680-4-sean.j.christopherson@intel.com
13 Jan, 2020
1 commit
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ACPICA commit 8b9c69d0984067051ffbe8526f871448ead6a26b
Link: https://github.com/acpica/acpica/commit/8b9c69d0
Signed-off-by: Bob Moore
Signed-off-by: Erik Kaneda
Signed-off-by: Rafael J. Wysocki
18 Dec, 2019
1 commit
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If we compile tools/acpi target in the top source directory, we'd get a
compilation error showing as bellow:# make tools/acpi
DESCEND power/acpi
DESCEND tools/acpidbg
CC tools/acpidbg/acpidbg.o
Assembler messages:
Fatal error: can't create /home/lzy/kernel-upstream/power/acpi/\
tools/acpidbg/acpidbg.o: No such file or directory
../../Makefile.rules:26: recipe for target '/home/lzy/kernel-upstream/\
power/acpi/tools/acpidbg/acpidbg.o' failed
make[3]: *** [/home/lzy/kernel-upstream//power/acpi/tools/acpidbg/\
acpidbg.o] Error 1
Makefile:19: recipe for target 'acpidbg' failed
make[2]: *** [acpidbg] Error 2
Makefile:54: recipe for target 'acpi' failed
make[1]: *** [acpi] Error 2
Makefile:1607: recipe for target 'tools/acpi' failed
make: *** [tools/acpi] Error 2Fixes: d5a4b1a540b8 ("tools/power/acpi: Remove direct kernel source include reference")
Signed-off-by: Zhengyuan Liu
Signed-off-by: Rafael J. Wysocki
02 Dec, 2019
1 commit
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Pull x86 platform driver updates from Andy Shevchenko:
- New bootctl driver for Mellanox BlueField SoC.
- New driver to support System76 laptops.
- Temperature monitoring and fan control on Acer Aspire 7551 is now
supported.- Previously the Huawei driver handled only hotkeys. After the
conversion to WMI it has been expanded to support newer laptop
models.- Big refactoring of intel-speed-select tools allows to use it on Intel
CascadeLake-N systems.- Touchscreen support for ezpad 6 m4 and Schneider SCT101CTM tablets
- Miscellaneous clean ups and fixes here and there.
* tag 'platform-drivers-x86-v5.5-1' of git://git.infradead.org/linux-platform-drivers-x86: (59 commits)
platform/x86: hp-wmi: Fix ACPI errors caused by passing 0 as input size
platform/x86: hp-wmi: Fix ACPI errors caused by too small buffer
platform/x86: intel_pmc_core: Add Comet Lake (CML) platform support to intel_pmc_core driver
platform/x86: intel_pmc_core: Fix the SoC naming inconsistency
platform/mellanox: Fix Kconfig indentation
tools/power/x86/intel-speed-select: Display TRL buckets for just base config level
tools/power/x86/intel-speed-select: Ignore missing config level
platform/x86: touchscreen_dmi: Add info for the ezpad 6 m4 tablet
tools/power/x86/intel-speed-select: Increment version
tools/power/x86/intel-speed-select: Use core count for base-freq mask
tools/power/x86/intel-speed-select: Support platform with limited Intel(R) Speed Select
tools/power/x86/intel-speed-select: Use Frequency weight for CLOS
tools/power/x86/intel-speed-select: Make CLOS frequency in MHz
tools/power/x86/intel-speed-select: Use mailbox for CLOS_PM_QOS_CONFIG
tools/power/x86/intel-speed-select: Auto mode for CLX
tools/power/x86/intel-speed-select: Correct CLX-N frequency units
tools/power/x86/intel-speed-select: Change display of "avx" to "avx2"
tools/power/x86/intel-speed-select: Extend command set for perf-profile
Add touchscreen platform data for the Schneider SCT101CTM tablet
platform/x86: intel_int0002_vgpio: Pass irqchip when adding gpiochip
...
21 Nov, 2019
2 commits
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When only base config level is present, this tool is displaying TRL
(Turbo-ratio-limits) by reading legacy MSR. In this case, also present
core count for TRL by reading MSR 0x1AE.Signed-off-by: Srinivas Pandruvada
Signed-off-by: Andy Shevchenko -
It is possible that certain config levels are not available, even
if the max level includes the level. There can be missing levels in
some platforms. So ignore the level when called for information dump
for all levels and fail if specifically ask for the missing level.Here the changes is to continue reading information about other levels
even if we fail to get information for the current level. But use the
"processed" flag to indicate the failure. When the "processed" flag is
not set, don't dump information about that level.Signed-off-by: Srinivas Pandruvada
Signed-off-by: Andy Shevchenko
08 Nov, 2019
10 commits
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Since the tool now adds support for another Intel SST implementation,
increment version number.Signed-off-by: Srinivas Pandruvada
Signed-off-by: Andy Shevchenko -
Some firmware implementation gives error when a command is sent get mask
for core count 32-61. So use core count to decide.But there is no function to get core count. So introduce one function to
get core count.Signed-off-by: Srinivas Pandruvada
Signed-off-by: Andy Shevchenko -
There are some platforms, where there limited support of Intel(R) SST
features. Here perf-profile has only one base configuration and limited
support of commands. But still has support for discovery of base-freq and
turbo-freq features. So it is important to show minimum features to use
base-freq and turbo-freq features.Here the change are:
- When there is no support of CONFIG_TDP_GET_LEVELS_INFO, then instead
of treating this as fatal error, treat this with number of config levels
= 0, that means only base level 0 is present.
- There is no support of mail box commands to get base frequencies or
turbo frequencies. Here present base frequency by reading cpufreq
base freq and turbo frequency by reading MSR 0x1AD.
- Don't display any field, which has value == 0.Signed-off-by: Srinivas Pandruvada
Signed-off-by: Andy Shevchenko -
Use different frequency weights for CLOS 0 and and CLOS1-3, to define
relative priority for power budgeting. This will be used for --auto
mode to enable base-freq and turbo-freq feature.Signed-off-by: Srinivas Pandruvada
Signed-off-by: Andy Shevchenko -
To be consistant with the other frequency units, change the CLOS
unit to MHz instead of ratios.Signed-off-by: Srinivas Pandruvada
Signed-off-by: Andy Shevchenko -
Use mailbox to read/write CLOS_PM_QOS_CONFIG instead of read/write to
MMIO offset.Signed-off-by: Srinivas Pandruvada
Signed-off-by: Andy Shevchenko -
There is an expectation in the CLX platform for SST base-freq feature that
Scaling min frequency be different for high and low priority cores.
This is the way the firmware will understand the priority.So this change will look at high priority and low priority cores, and set
scaling_min_freq to P1High for high priority cores and P1Low to low
priority cores.Signed-off-by: Srinivas Pandruvada
Signed-off-by: Andy Shevchenko -
In CLX_N base_frequency is read from cpufreq sysfs, where units are in
KHz. The internal units in the code matches the real ratios which are
in 100MHz scale. So when storing units for CLX-N frequencies, convert
to 100MHz scale.Signed-off-by: Srinivas Pandruvada
Signed-off-by: Andy Shevchenko -
Make the avx level display consistent. Except for "turbo-ratio-limits-avx",
everywhere else it is avx2. So change "turbo-ratio-limits-avx"
to "turbo-ratio-limits-avx2".Signed-off-by: Srinivas Pandruvada
Signed-off-by: Andy Shevchenko -
Add support for uncore P0, uncore P1, P1 for base and AVX levels and
memory frequency. These commands are optional, so continue on
failure.Signed-off-by: Srinivas Pandruvada
Signed-off-by: Andy Shevchenko
06 Nov, 2019
4 commits
-
Based on Thomas Renninger's feedback/ideas. Re-structure the code
to better handle the per_cpu_schedule mechanism which was introduced
when adding support for AMD Zen based processors.Signed-off-by: Janakarajan Natarajan
Acked-by: Thomas Renninger
Signed-off-by: Shuah Khan -
AMD Zen 2 introduces the RDPRU instruction which can be used to access some
processor registers which are typically only accessible in privilege level
0. ECX specifies the register to read and EDX:EAX will contain the value read.ECX: 0 - Register MPERF
1 - Register APERFThis has the added advantage of not having to use the msr module, since the
userspace to kernel transitions which occur during each read_msr() might
cause APERF and MPERF to go out of sync.Signed-off-by: Janakarajan Natarajan
Acked-by: Thomas Renninger
Signed-off-by: Shuah Khan -
The per_cpu_schedule flag is used to move the cpupower process to the cpu
on which we are looking to read the APERF/MPERF registers.This prevents IPIs from being generated by read_msr()s as we are already
on the cpu of interest.Ex: If cpupower is running on CPU 0 and we execute
read_msr(20, MSR_APERF, val) then,
read_msr(20, MSR_MPERF, val)the msr module will generate an IPI from CPU 0 to CPU 20 to query
for the MSR_APERF and then the MSR_MPERF in separate IPIs.This delay, caused by IPI latency, between reading the APERF and MPERF
registers may cause both of them to go out of sync.The use of the per_cpu_schedule flag reduces the probability of this
from happening. It comes at the cost of a negligible increase in cpu
consumption caused by the migration of cpupower across each of the
cpus of the system.Signed-off-by: Janakarajan Natarajan
Acked-by: Thomas Renninger
Signed-off-by: Shuah Khan -
Move the needs_root variable into a sub-struct. This is in preparation
for adding a new flag for cpuidle_monitor.Update all uses of the needs_root variable to reflect this change.
Signed-off-by: Janakarajan Natarajan
Acked-by: Thomas Renninger
Signed-off-by: Shuah Khan
05 Nov, 2019
1 commit
-
Cpupower tool has set and info options which are being used only by
x86 machines. This patch removes support for these two subcommands
from cpupower utility for POWER. Thus, these two subcommands will now be
available only for intel.
This removes the ambiguous error message while using set option in case
of using non-intel systems.Without this patch on a POWER system:
root@ubuntu:~# cpupower info
System does not support Intel's performance bias settingroot@ubuntu:~# cpupower set -b 10
Error setting perf-bias value on CPUWith this patch on a POWER box:
root@ubuntu:~# cpupower info
Subcommand not supported on POWERSame result for set subcommand.
This patch does not affect results on a intel box.Signed-off-by: Abhishek Goel
Acked-by: Thomas Renninger
Reviewed-by: Shuah Khan
Signed-off-by: Shuah Khan
15 Oct, 2019
6 commits
-
Add functionality for base-freq info|enable|disable info on CascadeLake-N.
Sample output:
Intel(R) Speed Select Technology
Executing on CPU model:85[0x55]
package-0
die-0
cpu-0
speed-select-base-freq
high-priority-base-frequency(MHz):2700000
high-priority-cpu-mask:00000000,0000e8c0
high-priority-cpu-list:6,7,11,13,14,15
low-priority-base-frequency(MHz):2100000
package-1
die-0
cpu-20
speed-select-base-freq
high-priority-base-frequency(MHz):2700000
high-priority-cpu-mask:0000000e,8c000000
high-priority-cpu-list:26,27,31,33,34,35
low-priority-base-frequency(MHz):2100000The enable command always returns success, and the disable command always
returns failed because SST-BF cannot be enabled or disabled from the OS on
CascadeLake-N.Enable command also have support for --auto|-a option, which sets cpufreq
scaling_min to max, so that the high priority base frequency can be the
required minimum for high priority cores. Disable command with -a/--auto
option reset the setting back to the min frequency.Signed-off-by: Prarit Bhargava
Signed-off-by: Srinivas Pandruvada
Signed-off-by: Andy Shevchenko -
Add functionality for "perf-profile info" on CascadeLake-N.
Sample output:
intel-speed-select perf-profile info
Intel(R) Speed Select Technology
Executing on CPU model:85[0x55]
package-0
die-0
cpu-0
perf-profile-level-0
cpu-count:20
enable-cpu-mask:00000000,000fffff
enable-cpu-list:0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19
thermal-design-power-ratio:23
base-frequency(MHz):2300
speed-select-turbo-freq:unsupported
speed-select-base-freq:enabled
speed-select-base-freq
high-priority-base-frequency(MHz):2700000
high-priority-cpu-mask:00000000,0000e8c0
high-priority-cpu-list:6,7,11,13,14,15
low-priority-base-frequency(MHz):2100000
package-1
die-0
cpu-20
perf-profile-level-0
cpu-count:20
enable-cpu-mask:000000ff,fff00000
enable-cpu-list:20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39
thermal-design-power-ratio:23
base-frequency(MHz):2300
speed-select-turbo-freq:unsupported
speed-select-base-freq:enabled
speed-select-base-freq
high-priority-base-frequency(MHz):2700000
high-priority-cpu-mask:0000000e,8c000000
high-priority-cpu-list:26,27,31,33,34,35
low-priority-base-frequency(MHz):2100000Signed-off-by: Prarit Bhargava
Signed-off-by: Srinivas Pandruvada
Signed-off-by: Andy Shevchenko -
CascadeLake-N only supports SST-BF and needs some of the perf-profile
commands, and the base-freq commands.Add help functions, and create an empty command structures (the functions
will be implemented later in this patchset). Call these functions
when running on CascadeLake-N.Signed-off-by: Prarit Bhargava
Signed-off-by: Srinivas Pandruvada
Signed-off-by: Andy Shevchenko -
Three CascadeLake-N models (6252N, 6230N, and 5218N) have SST-PBF support.
Return an error if the CascadeLake processor is not one of these specific
models.Signed-off-by: Prarit Bhargava
Signed-off-by: Srinivas Pandruvada
Signed-off-by: Andy Shevchenko -
Make the process_command take any help command and command list. This
will make it easier to help commands and a command list for CascadeLake-N.Signed-off-by: Prarit Bhargava
Signed-off-by: Srinivas Pandruvada
Signed-off-by: Andy Shevchenko -
The current code structure has similar but separate command functions for
the enable and disable operations. This can be improved by adding an int
argument to the command function structure, and interpreting 1 as enable
and 0 as disable. This change results in the removal of the disable
command functions.Add int argument to the command function structure.
Signed-off-by: Prarit Bhargava
Signed-off-by: Srinivas Pandruvada
Signed-off-by: Andy Shevchenko