10 Jul, 2019
1 commit
15 Jan, 2017
1 commit
01 Jul, 2016
6 commits
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The 32 bpp pixel format which is passed to pxp should be
'PXP_PIX_FMT_RGB32' instead of 'PXP_PIX_FMT_RGB24', since
only 'PXP_PIX_FMT_RGB32' can be recognized by lcdif.Signed-off-by: Fancy Fang
(cherry picked from commit c98efc59e1bc6d1814b2179f1b7e9f22cb177f47) -
with CONFIG_HZ=100, the precision of jiffies is 10ms, and the
generic_cmd6_time of some card is also 10ms. then, may be current
time is only 5ms, but already timed out caused by jiffies precision.Signed-off-by: Chaotian Jing
Signed-off-by: Ulf Hansson
(cherry picked from commit 8bcce64faaaf07165453e6600ae9ffb887e79b1a)
Signed-off-by: Haibo Chen
(cherry picked from commit 38f639884a2cfd65cbe29ac2fbfe4ab3fcb1f1af) -
there is a time window between __mmc_send_status() and time_afer(),
on some eMMC chip, the timeout_ms is only 10ms, if this thread was
scheduled out during this period, then, even card has already changes
to transfer state by the result of CMD13, this part of code also treat
it to timeout error.
So, need calculate timeout first, then call __mmc_send_status(), if
already timeout and card still in programing state, then treat it to
the real timeout error.Signed-off-by: Chaotian Jing
Signed-off-by: Ulf Hansson
(cherry picked from commit 3bbb0deea6d5c6d5ed38ae927a5bf9b0cd7c8639)
Signed-off-by: Haibo Chen
(cherry picked from commit b9b8249b98b9128d8931887eccb38cd45a0f8bf3) -
Now, when call esdhc_set_timeout() to set the data timeout counter value,
IPP_RST_N(bit 23) is wrongly affected. This patch add a mask to avoid this.Signed-off-by: Haibo Chen
(cherry picked from commit 6713b713dda4382677bc31a16d6ff3ef23f2d1ac) -
Our Reference Manual has a mistake, for the register SYS_CTRL,the
DTOCV(bit 19~16) means the data timeout counter value. When DTOCV
is set to 0xF, it means SDCLK << 29, not SDCLK << 28.This patch correct this in our usdhc driver.
Signed-off-by: Haibo Chen
(cherry picked from commit df9598d6dd617ed87b2e41e29bfc794b69831e86) -
Change the hardware reset gpio to 'GPIO6_IO15' for mipi dsi to
allow fec2 and mipi dsi can run at the same time. This needs
some hardware rework as follows:
"
1. Replace R631 with 100K resistor;
2. Remove D14, D24;
3. Solder the Cathode of the diode to R471,
you can use BAT54HT1(ONSEMI) or NSR0320MW2T1G(ONSEMI);
4. Solder the wire to the Anode end of the diode;
5. Scrape the solder mask(Green oil) of the MIPI Reset via,
then solder the end of the wire to the via.
"Signed-off-by: Fancy Fang
(cherry picked from commit 0af28564e73f006f742a9af0db4bc5b8588e3490)
27 Jun, 2016
2 commits
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Add HSIC support for imx7d. We have not supported HSIC as system
wakeup as well as HSIC remote wakeup function at DSM mode, since
the 24M OSC can't be off and the SoC internal regulators can't be
off at this mode, that will keep power consumption much higher.Signed-off-by: Peter Chen
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In this notifier, we can power on/off the two LDO's which are needed
for USB HSIC.Signed-off-by: Peter Chen
22 Jun, 2016
1 commit
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During suspend, as 24MHz will be disabled, but system counter
needs to be running in order to maintain accurate clock source,
so we need to switch system counter's clock from base clock(24MHz)
to alternate clock(32K) before system enter STOP mode, otherwise,
the suspend time will NOT be counted into system time when issue
a "date" command.Signed-off-by: Anson Huang
15 Jun, 2016
4 commits
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Add the dts support for the new mipi panel 'TFT3P5581'.
Signed-off-by: Fancy Fang
(cherry picked from commit 3b2b9a727c8c6d97e225237a52865486bab844fa) -
According to the 7d sdb schematic, only when the 'LCD_PWR_EN' is
low voltage, the 'LCD_3V3' can has the 3.3V voltage. And 'LCD_3V3'
is used to provide 3.3V power for lcd peripherals.Signed-off-by: Fancy Fang
(cherry picked from commit 2b34ed894f2efa27b336b61d4db9985a9c5e4f14) -
PAD_GPIO1_IO01 bit[31:7] are reserved, remove the setting mapping to
this reserved field.Signed-off-by: Fugang Duan
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It is missing at imx7d.dtsi, but used at source code.
Signed-off-by: Peter Chen
13 Jun, 2016
1 commit
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Import patch from BCM to fix the p2p group
owner 5GHz channel issue.Signed-off-by: Wang Haoran
02 Jun, 2016
1 commit
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Panic when 'reboot recovery\bootloader'
[] (clk_enable) from [] (do_switch_recovery+0x58/0xbc)
[] (do_switch_recovery) from [] (imx_reboot_notifier_call+0x58/0x68)
[] (imx_reboot_notifier_call) from [] (notifier_call_chain+0x44/0x84)
[] (notifier_call_chain) from [] (__blocking_notifier_call_chain+0x48/0x60)
[] (__blocking_notifier_call_chain) from [] (blocking_notifier_call_chain+0x18/0x20)
[] (blocking_notifier_call_chain) from [] (kernel_restart_prepare+0x18/0x38)BSP do not have snvs clock management to save power.
So remove snvs clock management when access SNVS.
Refine the switch mode code.Signed-off-by: zhang sanshan
31 May, 2016
4 commits
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This reverts commit d60d208e53db28b7db44f8c54399513d611d069d.
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When Mega/Fast Mix off in DSM mode, RDC recovery needs PCIe/PXP/EIM
clock to be enabled, otherwise, with M4 enabled, DSM resume will fail.We only enable them before entering DSM and hardware will disable
them when DSM is entered and they will be re-enabled after resume,
then in low level resume phase, we will disable them again.Signed-off-by: Anson Huang
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For i.MX7D, current runtime clock management code will skip all
PLL/PFD/GATE enable/disable when M4 is enabled, this is NOT good
for power number in low power idle and audio playback, as M4 only
uses one high speed PFD which is from system PLL, it is never
disabled runtimely, so we can just enable the hardware operation of
PLL/PFD/GATE for A7.Signed-off-by: Anson Huang
26 May, 2016
1 commit
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the original fix (MGS-755) for vg memory leak is incomplete,
further destroy the node handle to free the integer id with vg memory.Date: May 26, 2016
Signed-off-by: Xianzhong
25 May, 2016
1 commit
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Fix compile error when make imx_v7_mfg_defconfig.
Signed-off-by: zhang sanshan
24 May, 2016
15 commits
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To i.MX7D and i.MX6ULL, we need to support multiple iomux controller,
but we only have one imx_pinctrl_desc with type static. This means
different iomux controller share one imx_pinctrl_desc variable.The value filled into imx_pinctrl_desc when probing the first iomuxc
node will be overriden when probing the second one.This will incur errors, such as
'mx7d-pinctrl 30330000.iomuxc: could not map pin config for
"MX7D_PAD_LCD_DATA00"'In this patch, dynamically allocate imx_pinctrl_desc for each iomux
controller to fix the issue.Signed-off-by: Peng Fan
(cherry picked from commit 355b1f2153463bf838e928ffcab871e32cc5081f) -
Add pinctrls for usbotg1 and usbotg2 vbus control. This missing keeps
the vbus enable pin is high after power up, so vbus is on and otg port
will not enter suspend in device mode, as active usb port has high
bus freq requested, this prevents system enter low bus freq.Signed-off-by: Li Jun
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The 'pm_runtime_get_sync()' and 'pm_runtime_put_sync_suspend()'
may be called not pairs. And this will cause the 'usage_count'
to be negative.Signed-off-by: Fancy Fang
(cherry picked from commit 10135c736dfc1b3d5c449adb78118e3642b99276) -
Add 'ipg' and 'axi' clocks for pxp which should
be used to control runtime power managments.Signed-off-by: Fancy Fang
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The pxp require two clocks to enable when it works, and
they are 'ipg' and 'axi' clocks. Besides, the two clocks
share the same CCGR to control clock gating.Signed-off-by: Fancy Fang
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missed the brackets for bch legacy support, which leads the large oob
nand bch setting to wrong path.Signed-off-by: Han Xu
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document the new option for legacy bch geometry support.
Conflicts:
Documentation/devicetree/bindings/mtd/gpmi-nand.txtSigned-off-by: Han Xu
(cherry picked from commit c1c24ecd24cb808e825eb13a3e3d016c283322cc) -
Provide an option in DT to use legacy bch geometry, which compatible
with the 3.10 kernel bch setting. To enable the feature, adding
"fsl,legacy-bch-geometry" under gpmi-nand node.NOTICE: The feature must be enabled/disabled in both u-boot and kernel.
Conflicts:
drivers/mtd/nand/gpmi-nand/gpmi-nand.hSigned-off-by: Han Xu
(cherry picked from commit 4d28b1693905526558892d40525763e6bc4469e4) -
Fix chipidea usb driver compile warning if CONFIG_USB_CHIPIDEA_HOST
is disabled:
In file included from drivers/usb/chipidea/otg.c:26:0:
drivers/usb/chipidea/host.h:23:13: warning: 'ci_hdrc_host_driver_init'
defined but not used [-Wunused-function]
static void ci_hdrc_host_driver_init(void)
^
CC drivers/usb/chipidea/otg_fsm.o
In file included from drivers/usb/chipidea/otg_fsm.c:34:0:
drivers/usb/chipidea/host.h:23:13: warning: 'ci_hdrc_host_driver_init'
defined but not used [-Wunused-function]
static void ci_hdrc_host_driver_init(void)
^Signed-off-by: Li Jun
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The 'otm8018b' is the Source Driver IC which is used
by 'TFT3P5079E' panel. This patch is adding the build
support for the 'otm8018b' kernel driver.Signed-off-by: Fancy Fang
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The 'otm8018b' is the Source Driver IC for 'TFT3P5079E'
mipi panel. This patch is the kernel driver for 'otm8018b'.
No backlight brightness adjustment function, since this is
not supported by imx7d sdb revb board.Signed-off-by: Fancy Fang
Signed-off-by: Frank Li -
Create a new dts for the 'TFT3P5079E' mipi panel on
imx7d sabresd revb board.Signed-off-by: Fancy Fang
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fix the potential integer overflow issue found by coverify.
Signed-off-by: Han Xu
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fix the raw_buffer pointer double free issue found by coverify.
Signed-off-by: Han Xu
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To avoid touch other bits of HW_ANADIG_SNVS_MISC_CTRL , use set/clear register
, and correct the bit29 setting:
--before: write 1 to toggle DDR power pin to high before enter DDR retention,
and write 1 again to pull pin to low when exit from DDR retention.
--now: write 1 to pull DDR power pin to high and write 0 to low.Signed-off-by: Robin Gong
20 May, 2016
1 commit
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fi->f is set in f_midi's alloc_func, need to clean this to
NULL in free_func, otherwise on ConfigFS's function switch,
midi->usb_function it self is freed, fi->f will be a wild
pointer and run into below kernel panic:
---------------
[ 58.950628] Unable to handle kernel paging request at virtual address 63697664
[ 58.957869] pgd = c0004000
[ 58.960583] [63697664] *pgd=00000000
[ 58.964185] Internal error: Oops: 80000005 [#1] PREEMPT SMP ARM
[ 58.970111] Modules linked in:
[ 58.973191] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 4.1.15-03504-g34c857c-dirty #89
[ 58.981024] Hardware name: Freescale i.MX6 Quad/DualLite (Device Tree)
[ 58.987557] task: c110bd70 ti: c1100000 task.ti: c1100000
[ 58.992962] PC is at 0x63697664
[ 58.996120] LR is at android_setup+0x78/0x138[ 60.044980] 1fc0: ffffffff ffffffff c1000684 00000000 00000000 c108ecd0 c11f7294 c11039c0
[ 60.053181] 1fe0: c108eccc c110d148 1000406a 412fc09a 00000000 1000807c 00000000 00000000
[ 60.061420] [] (android_setup) from [] (udc_irq+0x758/0x1034)
[ 60.068951] [] (udc_irq) from [] (handle_irq_event_percpu+0x50/0x254)
[ 60.077165] [] (handle_irq_event_percpu) from [] (handle_irq_event+0x3c/0x5c)
[ 60.086072] [] (handle_irq_event) from [] (handle_fasteoi_irq+0xe0/0x198)
[ 60.094630] [] (handle_fasteoi_irq) from [] (generic_handle_irq+0x2c/0x3c)
[ 60.103271] [] (generic_handle_irq) from [] (__handle_domain_irq+0x7c/0xec)
[ 60.112000] [] (__handle_domain_irq) from [] (gic_handle_irq+0x24/0x5c)
--------------Signed-off-by: Winter Wang
19 May, 2016
1 commit
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The head list may be corrupted when two requests from
the same 'pxp_chan' are issued sequentially. So change
the issue_pending function to strictly serialized the
requests to avoid this kind of issue.Signed-off-by: Fancy Fang
(cherry picked from commit 3ed71dcdd8ceeb3725399053f31c1930d2e7a08d)