/* * Copyright 2017 NXP * Copyright 2018-2019 Variscite Ltd. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version 2 * of the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ / { sound-hdmi { status = "disabled"; }; }; &hdmi { status = "disabled"; }; &dcss { status = "okay"; disp-dev = "mipi_disp"; enable-gpios = <&gpio4 1 0>; /* Enable LCD_VDD_EN pin */ clocks = <&clk IMX8MQ_CLK_DISP_APB_ROOT>, <&clk IMX8MQ_CLK_DISP_AXI_ROOT>, <&clk IMX8MQ_CLK_DISP_RTRM_ROOT>, <&clk IMX8MQ_CLK_DC_PIXEL>, <&clk IMX8MQ_CLK_DISP_DTRC>, <&clk IMX8MQ_VIDEO_PLL1>, <&clk IMX8MQ_CLK_27M>, <&clk IMX8MQ_CLK_25M>; clock-names = "apb", "axi", "rtrm", "pix", "dtrc", "pll", "pll_src1", "pll_src2"; assigned-clocks = <&clk IMX8MQ_CLK_DC_PIXEL>, <&clk IMX8MQ_CLK_DISP_AXI>, <&clk IMX8MQ_CLK_DISP_RTRM>; assigned-clock-parents = <&clk IMX8MQ_VIDEO_PLL1_OUT>, <&clk IMX8MQ_SYS1_PLL_800M>, <&clk IMX8MQ_SYS1_PLL_800M>; assigned-clock-rates = <594000000>, <800000000>, <400000000>; dcss_disp0: port@0 { reg = <0>; dcss_disp0_mipi_dsi: mipi_dsi { remote-endpoint = <&mipi_dsi_in>; }; }; }; &mipi_dsi_phy { status = "okay"; }; &mipi_dsi { status = "okay"; port@1 { mipi_dsi_in: endpoint { remote-endpoint = <&dcss_disp0_mipi_dsi>; }; }; }; &mipi_dsi_bridge { status = "okay"; }; &pwm1 { status = "okay"; }; &backlight { status = "okay"; }; &dsi_lvds_bridge { status = "okay"; };