Blame view
doc/README.rockchip
11.7 KB
adfb2bfe5 rockchip: Add a s... |
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 |
# # Copyright (C) 2015 Google. Inc # Written by Simon Glass <sjg@chromium.org> # # SPDX-License-Identifier: GPL-2.0+ # U-Boot on Rockchip ================== There are several repositories available with versions of U-Boot that support many Rockchip devices [1] [2]. The current mainline support is experimental only and is not useful for anything. It should provide a base on which to build. |
f13871307 rockchip: Update ... |
16 |
So far only support for the RK3288 and RK3036 is provided. |
adfb2bfe5 rockchip: Add a s... |
17 18 19 20 21 22 |
Prerequisites ============= You will need: |
f13871307 rockchip: Update ... |
23 |
- Firefly RK3288 board or something else with a supported RockChip SoC |
adfb2bfe5 rockchip: Add a s... |
24 25 26 27 28 29 30 31 32 33 34 35 |
- Power connection to 5V using the supplied micro-USB power cable - Separate USB serial cable attached to your computer and the Firefly (connect to the micro-USB connector below the logo) - rkflashtool [3] - openssl (sudo apt-get install openssl) - Serial UART connection [4] - Suitable ARM cross compiler, e.g.: sudo apt-get install gcc-4.7-arm-linux-gnueabi Building ======== |
a84b589e5 doc: rockchip: Ad... |
36 |
At present nine RK3288 boards are supported: |
adfb2bfe5 rockchip: Add a s... |
37 |
|
744368d6a rockchip: add bas... |
38 |
- EVB RK3288 - use evb-rk3288 configuration |
d7ca67b7c rockchip: add bas... |
39 |
- Fennec RK3288 - use fennec-rk3288 configuration |
1c62d9995 rockchip: add sup... |
40 41 |
- Firefly RK3288 - use firefly-rk3288 configuration - Hisense Chromebook - use chromebook_jerry configuration |
7da8680b2 rockchip: Add sup... |
42 |
- MiQi RK3288 - use miqi-rk3288 configuration |
a84b589e5 doc: rockchip: Ad... |
43 |
- phyCORE-RK3288 RDK - use phycore-rk3288 configuration |
dd63fbc70 rockchip: add sup... |
44 |
- PopMetal RK3288 - use popmetal-rk3288 configuration |
1c62d9995 rockchip: add sup... |
45 |
- Radxa Rock 2 - use rock2 configuration |
43b5c78d8 rockchip: cosmeti... |
46 |
- Tinker RK3288 - use tinker-rk3288 configuration |
adfb2bfe5 rockchip: Add a s... |
47 |
|
f13871307 rockchip: Update ... |
48 |
Two RK3036 board are supported: |
1d5a69684 rockchip: doc: sh... |
49 |
|
f13871307 rockchip: Update ... |
50 51 |
- EVB RK3036 - use evb-rk3036 configuration - Kylin - use kylin_rk3036 configuration |
1d5a69684 rockchip: doc: sh... |
52 |
|
adfb2bfe5 rockchip: Add a s... |
53 54 55 56 57 |
For example: CROSS_COMPILE=arm-linux-gnueabi- make O=firefly firefly-rk3288_defconfig all (or you can use another cross compiler if you prefer) |
adfb2bfe5 rockchip: Add a s... |
58 59 60 61 62 63 64 65 66 67 68 69 70 |
Writing to the board with USB ============================= For USB to work you must get your board into ROM boot mode, either by erasing your MMC or (perhaps) holding the recovery button when you boot the board. To erase your MMC, you can boot into Linux and type (as root) dd if=/dev/zero of=/dev/mmcblk0 bs=1M Connect your board's OTG port to your computer. To create a suitable image and write it to the board: |
717f8845a rockchip: doc: ad... |
71 |
./firefly-rk3288/tools/mkimage -n rk3288 -T rkimage -d \ |
f2acc55e3 rockchip: Put REA... |
72 |
./firefly-rk3288/spl/u-boot-spl-dtb.bin out && \ |
adfb2bfe5 rockchip: Add a s... |
73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 |
cat out | openssl rc4 -K 7c4e0304550509072d2c7b38170d1711 | rkflashtool l If all goes well you should something like: U-Boot SPL 2015.07-rc1-00383-ge345740-dirty (Jun 03 2015 - 10:06:49) Card did not respond to voltage select! spl: mmc init failed with error: -17 ### ERROR ### Please RESET the board ### You will need to reset the board before each time you try. Yes, that's all it does so far. If support for the Rockchip USB protocol or DFU were added in SPL then we could in principle load U-Boot and boot to a prompt from USB as several other platforms do. However it does not seem to be possible to use the existing boot ROM code from SPL. Booting from an SD card ======================= To write an image that boots from an SD card (assumed to be /dev/sdc): |
717f8845a rockchip: doc: ad... |
93 |
./firefly-rk3288/tools/mkimage -n rk3288 -T rksd -d \ |
f2acc55e3 rockchip: Put REA... |
94 95 |
firefly-rk3288/spl/u-boot-spl-dtb.bin out && \ sudo dd if=out of=/dev/sdc seek=64 && \ |
73e6dbe85 rockchip: doc: up... |
96 |
sudo dd if=firefly-rk3288/u-boot-dtb.img of=/dev/sdc seek=16384 |
adfb2bfe5 rockchip: Add a s... |
97 98 |
This puts the Rockchip header and SPL image first and then places the U-Boot |
341e44ed6 rockchip: doc: up... |
99 |
image at block 16384 (i.e. 8MB from the start of the SD card). This |
adfb2bfe5 rockchip: Add a s... |
100 |
corresponds with this setting in U-Boot: |
73e6dbe85 rockchip: doc: up... |
101 |
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x4000 |
adfb2bfe5 rockchip: Add a s... |
102 103 104 |
Put this SD (or micro-SD) card into your board and reset it. You should see something like: |
f13871307 rockchip: Update ... |
105 |
U-Boot 2016.01-rc2-00309-ge5bad3b-dirty (Jan 02 2016 - 23:41:59 -0700) |
adfb2bfe5 rockchip: Add a s... |
106 |
|
f13871307 rockchip: Update ... |
107 |
Model: Radxa Rock 2 Square |
adfb2bfe5 rockchip: Add a s... |
108 |
DRAM: 2 GiB |
f13871307 rockchip: Update ... |
109 110 111 112 113 114 115 116 117 |
MMC: dwmmc@ff0f0000: 0, dwmmc@ff0c0000: 1 *** Warning - bad CRC, using default environment In: serial Out: vop@ff940000.vidconsole Err: serial Net: Net Initialization Skipped No ethernet found. Hit any key to stop autoboot: 0 |
adfb2bfe5 rockchip: Add a s... |
118 |
=> |
b47ea7921 rockchip: add opt... |
119 120 121 122 |
The rockchip bootrom can load and boot an initial spl, then continue to load a second-level bootloader(ie. U-BOOT) as soon as it returns to bootrom. Therefore RK3288 has another loading sequence like RK3036. The option of U-Boot is controlled with this setting in U-Boot: |
ee14d29db rockchip: back-to... |
123 |
#define CONFIG_SPL_ROCKCHIP_BACK_TO_BROM |
b47ea7921 rockchip: add opt... |
124 125 126 127 128 129 130 |
You can create the image via the following operations: ./firefly-rk3288/tools/mkimage -n rk3288 -T rksd -d \ firefly-rk3288/spl/u-boot-spl-dtb.bin out && \ cat firefly-rk3288/u-boot-dtb.bin >> out && \ sudo dd if=out of=/dev/sdc seek=64 |
f13871307 rockchip: Update ... |
131 |
If you have an HDMI cable attached you should see a video console. |
1d5a69684 rockchip: doc: sh... |
132 |
For evb_rk3036 board: |
717f8845a rockchip: doc: ad... |
133 |
./evb-rk3036/tools/mkimage -n rk3036 -T rksd -d evb-rk3036/spl/u-boot-spl.bin out && \ |
1d5a69684 rockchip: doc: sh... |
134 135 136 137 138 |
cat evb-rk3036/u-boot-dtb.bin >> out && \ sudo dd if=out of=/dev/sdc seek=64 Note: rk3036 SDMMC and debug uart use the same iomux, so if you boot from SD, the debug uart must be disabled |
adfb2bfe5 rockchip: Add a s... |
139 |
|
f46b859bf rockchip: rk3188:... |
140 |
|
532cb7f5a rk3288: vyasa: Ad... |
141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 |
Booting from an SD card on RK3288 with TPL ========================================== Since the size of SPL can't be exceeded 0x8000 bytes in RK3288, it is not possible add new SPL features like Falcon mode or etc. So introduce TPL so-that adding new features to SPL is possible because now TPL should run minimal with code like DDR, clock etc and rest of new features in SPL. As of now TPL is added on Vyasa-RK3288 board. To write an image that boots from an SD card (assumed to be /dev/mmcblk0): ./tools/mkimage -n rk3288 -T rksd -d ./tpl/u-boot-tpl.bin out && cat ./spl/u-boot-spl-dtb.bin >> out && sudo dd if=out of=/dev/mmcblk0 seek=64 && |
d80599e89 rockchip: doc: Fi... |
157 |
sudo dd if=u-boot-dtb.img of=/dev/mmcblk0 seek=16384 |
532cb7f5a rk3288: vyasa: Ad... |
158 |
|
f46b859bf rockchip: rk3188:... |
159 160 161 162 163 164 165 166 |
Booting from an SD card on RK3188 ================================= For rk3188 boards the general storage onto the card stays the same as described above, but the image creation needs a bit more care. The bootrom of rk3188 expects to find a small 1kb loader which returns control to the bootrom, after which it will load the real loader, which |
4d9253fb7 rockchip: rk3188:... |
167 168 169 170 |
can then be up to 29kb in size and does the regular ddr init. This is handled by a single image (built as the SPL stage) that tests whether it is handled for the first or second time via code executed from the boot0-hook. |
f46b859bf rockchip: rk3188:... |
171 172 173 174 175 176 |
Additionally the rk3188 requires everything the bootrom loads to be rc4-encrypted. Except for the very first stage the bootrom always reads and decodes 2kb pages, so files should be sized accordingly. # copy tpl, pad to 1020 bytes and append spl |
4d9253fb7 rockchip: rk3188:... |
177 |
tools/mkimage -n rk3188 -T rksd -d spl/u-boot-spl.bin out |
f46b859bf rockchip: rk3188:... |
178 179 180 181 |
# truncate, encode and append u-boot.bin truncate -s %2048 u-boot.bin cat u-boot.bin | split -b 512 --filter='openssl rc4 -K 7C4E0304550509072D2C7B38170D1711' >> out |
a16e2e068 rockchip: update ... |
182 183 |
Using fastboot on rk3288 ======================== |
a16e2e068 rockchip: update ... |
184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 |
- Write GPT partition layout to mmc device which fastboot want to use it to store the image => gpt write mmc 1 $partitions - Invoke fastboot command to prepare => fastboot 1 - Start fastboot request on PC fastboot -i 0x2207 flash loader evb-rk3288/spl/u-boot-spl-dtb.bin You should see something like: => fastboot 1 WARNING: unknown variable: partition-type:loader Starting download of 357796 bytes .. downloading of 357796 bytes finished Flashing Raw Image ........ wrote 357888 bytes to 'loader' |
adfb2bfe5 rockchip: Add a s... |
206 207 208 209 |
Booting from SPI ================ To write an image that boots from SPI flash (e.g. for the Haier Chromebook): |
dd8e42900 rockchip: Fix the... |
210 211 212 213 |
./chromebook_jerry/tools/mkimage -n rk3288 -T rkspi \ -d chromebook_jerry/spl/u-boot-spl-dtb.bin spl.bin && \ dd if=spl.bin of=spl-out.bin bs=128K conv=sync && \ cat spl-out.bin chromebook_jerry/u-boot-dtb.img >out.bin && \ |
adfb2bfe5 rockchip: Add a s... |
214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 |
dd if=out.bin of=out.bin.pad bs=4M conv=sync This converts the SPL image to the required SPI format by adding the Rockchip header and skipping every 2KB block. Then the U-Boot image is written at offset 128KB and the whole image is padded to 4MB which is the SPI flash size. The position of U-Boot is controlled with this setting in U-Boot: #define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10) If you have a Dediprog em100pro connected then you can write the image with: sudo em100 -s -c GD25LQ32 -d out.bin.pad -r When booting you should see something like: U-Boot SPL 2015.07-rc2-00215-g9a58220-dirty (Jun 23 2015 - 12:11:32) U-Boot 2015.07-rc2-00215-g9a58220-dirty (Jun 23 2015 - 12:11:32 -0600) Model: Google Jerry DRAM: 2 GiB MMC: Using default environment In: serial@ff690000 Out: serial@ff690000 Err: serial@ff690000 => |
adfb2bfe5 rockchip: Add a s... |
243 244 245 246 |
Future work =========== Immediate priorities are: |
adfb2bfe5 rockchip: Add a s... |
247 248 |
- USB host - USB device |
f13871307 rockchip: Update ... |
249 |
- Run CPU at full speed (code exists but we only see ~60 DMIPS maximum) |
adfb2bfe5 rockchip: Add a s... |
250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 |
- NAND flash - Support for other Rockchip parts - Boot U-Boot proper over USB OTG (at present only SPL works) Development Notes ================= There are plenty of patches in the links below to help with this work. [1] https://github.com/rkchrome/uboot.git [2] https://github.com/linux-rockchip/u-boot-rockchip.git branch u-boot-rk3288 [3] https://github.com/linux-rockchip/rkflashtool.git [4] http://wiki.t-firefly.com/index.php/Firefly-RK3288/Serial_debug/en rkimage ------- rkimage.c produces an SPL image suitable for sending directly to the boot ROM over USB OTG. This is a very simple format - just the string RK32 (as 4 bytes) followed by u-boot-spl-dtb.bin. The boot ROM loads image to 0xff704000 which is in the internal SRAM. The SRAM starts at 0xff700000 and extends to 0xff718000 where we put the stack. rksd ---- rksd.c produces an image consisting of 32KB of empty space, a header and u-boot-spl-dtb.bin. The header is defined by 'struct header0_info' although most of the fields are unused by U-Boot. We just need to specify the signature, a flag and the block offset and size of the SPL image. The header occupies a single block but we pad it out to 4 blocks. The header is encoding using RC4 with the key 7c4e0304550509072d2c7b38170d1711. The SPL image can be encoded too but we don't do that. The maximum size of u-boot-spl-dtb.bin which the boot ROM will read is 32KB, or 0x40 blocks. This is a severe and annoying limitation. There may be a way around this limitation, since there is plenty of SRAM, but at present the board refuses to boot if this limit is exceeded. The image produced is padded up to a block boundary (512 bytes). It should be written to the start of an SD card using dd. Since this image is set to load U-Boot from the SD card at block offset, CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR, dd should be used to write u-boot-dtb.img to the SD card at that offset. See above for instructions. rkspi ----- rkspi.c produces an image consisting of a header and u-boot-spl-dtb.bin. The resulting image is then spread out so that only the first 2KB of each 4KB sector is used. The header is the same as with rksd and the maximum size is also 32KB (before spreading). The image should be written to the start of SPI flash. See above for instructions on how to write a SPI image. |
002c634c1 rockchip: Add a s... |
309 310 311 312 313 |
rkmux.py -------- You can use this script to create #defines for SoC register access. See the script for usage. |
adfb2bfe5 rockchip: Add a s... |
314 315 316 317 318 319 320 321 322 |
Device tree and driver model ---------------------------- Where possible driver model is used to provide a structure to the functionality. Device tree is used for configuration. However these have an overhead and in SPL with a 32KB size limit some shortcuts have been taken. In general all Rockchip drivers should use these features, with SPL-specific modifications where required. |
3f3e1e339 rockchip: doc: ad... |
323 324 325 326 327 328 329 330 331 |
GPT partition layout ---------------------------- Rockchip use a unified GPT partition layout in open source support. With this GPT partition layout, uboot can be compatilbe with other components, like miniloader, trusted-os, arm-trust-firmware. There are some documents about partitions in the links below. http://rockchip.wikidot.com/partitions |
adfb2bfe5 rockchip: Add a s... |
332 333 334 335 |
-- Simon Glass <sjg@chromium.org> 24 June 2015 |