Blame view
drivers/mailbox/zynqmp-ipi.c
3.5 KB
660b0c77d
|
1 2 3 4 5 6 7 8 9 10 11 |
// SPDX-License-Identifier: GPL-2.0+ /* * Xilinx Zynq MPSoC Mailbox driver * * Copyright (C) 2018-2019 Xilinx, Inc. */ #include <common.h> #include <asm/io.h> #include <dm.h> #include <mailbox-uclass.h> |
336d4615f
|
12 |
#include <dm/device_compat.h> |
660b0c77d
|
13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 |
#include <mach/sys_proto.h> #include <linux/ioport.h> #include <linux/io.h> #include <wait_bit.h> /* IPI bitmasks, register base */ /* TODO: move reg base to DT */ #define IPI_BIT_MASK_PMU0 0x10000 #define IPI_INT_REG_BASE_APU 0xFF300000 struct ipi_int_regs { u32 trig; /* 0x0 */ u32 obs; /* 0x4 */ u32 ist; /* 0x8 */ u32 imr; /* 0xC */ u32 ier; /* 0x10 */ u32 idr; /* 0x14 */ }; #define ipi_int_apu ((struct ipi_int_regs *)IPI_INT_REG_BASE_APU) struct zynqmp_ipi { void __iomem *local_req_regs; void __iomem *local_res_regs; void __iomem *remote_req_regs; void __iomem *remote_res_regs; }; static int zynqmp_ipi_send(struct mbox_chan *chan, const void *data) { const struct zynqmp_ipi_msg *msg = (struct zynqmp_ipi_msg *)data; struct zynqmp_ipi *zynqmp = dev_get_priv(chan->dev); u32 ret; u32 *mbx = (u32 *)zynqmp->local_req_regs; for (size_t i = 0; i < msg->len; i++) writel(msg->buf[i], &mbx[i]); /* Write trigger interrupt */ writel(IPI_BIT_MASK_PMU0, &ipi_int_apu->trig); /* Wait until observation bit is cleared */ ret = wait_for_bit_le32(&ipi_int_apu->obs, IPI_BIT_MASK_PMU0, false, 100, false); debug("%s, send %ld bytes ", __func__, msg->len); return ret; }; static int zynqmp_ipi_recv(struct mbox_chan *chan, void *data) { struct zynqmp_ipi_msg *msg = (struct zynqmp_ipi_msg *)data; struct zynqmp_ipi *zynqmp = dev_get_priv(chan->dev); u32 *mbx = (u32 *)zynqmp->local_res_regs; for (size_t i = 0; i < msg->len; i++) msg->buf[i] = readl(&mbx[i]); debug("%s, recv %ld bytes ", __func__, msg->len); return 0; }; static int zynqmp_ipi_probe(struct udevice *dev) { struct zynqmp_ipi *zynqmp = dev_get_priv(dev); struct resource res; ofnode node; debug("%s(dev=%p) ", __func__, dev); /* Get subnode where the regs are defined */ /* Note IPI mailbox node needs to be the first one in DT */ node = ofnode_first_subnode(dev_ofnode(dev)); if (ofnode_read_resource_byname(node, "local_request_region", &res)) { dev_err(dev, "No reg property for local_request_region "); return -EINVAL; }; zynqmp->local_req_regs = devm_ioremap(dev, res.start, (res.start - res.end)); if (ofnode_read_resource_byname(node, "local_response_region", &res)) { dev_err(dev, "No reg property for local_response_region "); return -EINVAL; }; zynqmp->local_res_regs = devm_ioremap(dev, res.start, (res.start - res.end)); if (ofnode_read_resource_byname(node, "remote_request_region", &res)) { dev_err(dev, "No reg property for remote_request_region "); return -EINVAL; }; zynqmp->remote_req_regs = devm_ioremap(dev, res.start, (res.start - res.end)); if (ofnode_read_resource_byname(node, "remote_response_region", &res)) { dev_err(dev, "No reg property for remote_response_region "); return -EINVAL; }; zynqmp->remote_res_regs = devm_ioremap(dev, res.start, (res.start - res.end)); return 0; }; static const struct udevice_id zynqmp_ipi_ids[] = { { .compatible = "xlnx,zynqmp-ipi-mailbox" }, { } }; struct mbox_ops zynqmp_ipi_mbox_ops = { .send = zynqmp_ipi_send, .recv = zynqmp_ipi_recv, }; U_BOOT_DRIVER(zynqmp_ipi) = { .name = "zynqmp-ipi", .id = UCLASS_MAILBOX, .of_match = zynqmp_ipi_ids, .probe = zynqmp_ipi_probe, .priv_auto_alloc_size = sizeof(struct zynqmp_ipi), .ops = &zynqmp_ipi_mbox_ops, }; |